EFR32 Blue Gecko 1 Software Documentation  efr32bg1-doc-5.1.2
em_mpu.h
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1 /***************************************************************************/
33 #ifndef EM_MPU_H
34 #define EM_MPU_H
35 
36 #include "em_device.h"
37 
38 #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
39 #include "em_assert.h"
40 
41 #include <stdbool.h>
42 
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46 
47 /***************************************************************************/
52 /***************************************************************************/
60 #define MPU_CTRL_PRIVDEFENA MPU_CTRL_PRIVDEFENA_Msk
61 
65 #define MPU_CTRL_HFNMIENA MPU_CTRL_HFNMIENA_Msk
66 
67 /*******************************************************************************
68  ******************************** ENUMS ************************************
69  ******************************************************************************/
70 
74 typedef enum
75 {
105 
109 typedef enum
110 {
118 
119 
120 /*******************************************************************************
121  ******************************* STRUCTS ***********************************
122  ******************************************************************************/
123 
125 typedef struct
126 {
128  uint8_t regionNo;
129  uint32_t baseAddress;
132  bool disableExec;
133  bool shareable;
134  bool cacheable;
135  bool bufferable;
136  uint8_t srd;
137  uint8_t tex;
139 
141 #define MPU_INIT_FLASH_DEFAULT \
142 { \
143  true, /* Enable MPU region. */ \
144  0, /* MPU Region number. */ \
145  FLASH_MEM_BASE, /* Flash base address. */ \
146  mpuRegionSize1Mb, /* Size - Set to max. */ \
147  mpuRegionApFullAccess, /* Access permissions. */ \
148  false, /* Execution allowed. */ \
149  false, /* Not shareable. */ \
150  true, /* Cacheable. */ \
151  false, /* Not bufferable. */ \
152  0, /* No subregions. */ \
153  0 /* No TEX attributes. */ \
154 }
155 
156 
158 #define MPU_INIT_SRAM_DEFAULT \
159 { \
160  true, /* Enable MPU region. */ \
161  1, /* MPU Region number. */ \
162  RAM_MEM_BASE, /* SRAM base address. */ \
163  mpuRegionSize128Kb, /* Size - Set to max. */ \
164  mpuRegionApFullAccess, /* Access permissions. */ \
165  false, /* Execution allowed. */ \
166  true, /* Shareable. */ \
167  true, /* Cacheable. */ \
168  false, /* Not bufferable. */ \
169  0, /* No subregions. */ \
170  0 /* No TEX attributes. */ \
171 }
172 
173 
175 #define MPU_INIT_PERIPHERAL_DEFAULT \
176 { \
177  true, /* Enable MPU region. */ \
178  0, /* MPU Region number. */ \
179  0, /* Region base address. */ \
180  mpuRegionSize32b, /* Size - Set to minimum */ \
181  mpuRegionApFullAccess, /* Access permissions. */ \
182  true, /* Execution not allowed. */ \
183  true, /* Shareable. */ \
184  false, /* Not cacheable. */ \
185  true, /* Bufferable. */ \
186  0, /* No subregions. */ \
187  0 /* No TEX attributes. */ \
188 }
189 
190 
191 /*******************************************************************************
192  ***************************** PROTOTYPES **********************************
193  ******************************************************************************/
194 
195 
197 
198 
199 /***************************************************************************/
205 __STATIC_INLINE void MPU_Disable(void)
206 {
207  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; /* Disable fault exceptions */
208  MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; /* Disable the MPU */
209 }
210 
211 
212 /***************************************************************************/
221 __STATIC_INLINE void MPU_Enable(uint32_t flags)
222 {
223  EFM_ASSERT(!(flags & ~(MPU_CTRL_PRIVDEFENA_Msk
224  | MPU_CTRL_HFNMIENA_Msk
225  | MPU_CTRL_ENABLE_Msk)));
226 
227  MPU->CTRL = flags | MPU_CTRL_ENABLE_Msk; /* Enable the MPU */
228  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; /* Enable fault exceptions */
229 }
230 
231 
235 #ifdef __cplusplus
236 }
237 #endif
238 
239 #endif /* defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) */
240 
241 #endif /* EM_MPU_H */
MPU_RegionSize_TypeDef size
Definition: em_mpu.h:130
Emlib peripheral API "assert" implementation.
MPU_RegionSize_TypeDef
Definition: em_mpu.h:74
void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init)
Configure an MPU region.
Definition: em_mpu.c:91
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
__STATIC_INLINE void MPU_Enable(uint32_t flags)
Enable the MPU.
Definition: em_mpu.h:221
uint32_t baseAddress
Definition: em_mpu.h:129
MPU_RegionAp_TypeDef accessPermission
Definition: em_mpu.h:131
MPU_RegionAp_TypeDef
Definition: em_mpu.h:109
__STATIC_INLINE void MPU_Disable(void)
Disable the MPU.
Definition: em_mpu.h:205