EFM32 Zero Gecko Software Documentation  efm32zg-doc-5.1.2
EFM32ZG_PRS_BitFields

Detailed Description

Macros

#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL
 
#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL
 
#define _PRS_CH_CTRL_ASYNC_SHIFT   28
 
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL
 
#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL
 
#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL
 
#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL
 
#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL
 
#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL
 
#define _PRS_CH_CTRL_EDSEL_SHIFT   24
 
#define _PRS_CH_CTRL_MASK   0x133F0007UL
 
#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL
 
#define _PRS_CH_CTRL_SIGSEL_PCNT0TCC   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_SHIFT   0
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_USART1IRTX   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL
 
#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL
 
#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL
 
#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL
 
#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL
 
#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL
 
#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL
 
#define _PRS_CH_CTRL_SOURCESEL_PCNT0   0x00000036UL
 
#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL
 
#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL
 
#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL
 
#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL
 
#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH0PEN_MASK   0x1UL
 
#define _PRS_ROUTE_CH0PEN_SHIFT   0
 
#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH1PEN_MASK   0x2UL
 
#define _PRS_ROUTE_CH1PEN_SHIFT   1
 
#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH2PEN_MASK   0x4UL
 
#define _PRS_ROUTE_CH2PEN_SHIFT   2
 
#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH3PEN_MASK   0x8UL
 
#define _PRS_ROUTE_CH3PEN_SHIFT   3
 
#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL
 
#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL
 
#define _PRS_ROUTE_LOCATION_LOC2   0x00000002UL
 
#define _PRS_ROUTE_LOCATION_MASK   0x700UL
 
#define _PRS_ROUTE_LOCATION_SHIFT   8
 
#define _PRS_ROUTE_MASK   0x0000070FUL
 
#define _PRS_ROUTE_RESETVALUE   0x00000000UL
 
#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL
 
#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0
 
#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL
 
#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1
 
#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL
 
#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2
 
#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL
 
#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3
 
#define _PRS_SWLEVEL_MASK   0x0000000FUL
 
#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL
 
#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL
 
#define _PRS_SWPULSE_CH0PULSE_SHIFT   0
 
#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL
 
#define _PRS_SWPULSE_CH1PULSE_SHIFT   1
 
#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL
 
#define _PRS_SWPULSE_CH2PULSE_SHIFT   2
 
#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL
 
#define _PRS_SWPULSE_CH3PULSE_SHIFT   3
 
#define _PRS_SWPULSE_MASK   0x0000000FUL
 
#define _PRS_SWPULSE_RESETVALUE   0x00000000UL
 
#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)
 
#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)
 
#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)
 
#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
 
#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
 
#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)
 
#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
 
#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
 
#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
 
#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
 
#define PRS_CH_CTRL_SIGSEL_PCNT0TCC   (_PRS_CH_CTRL_SIGSEL_PCNT0TCC << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART1IRTX   (_PRS_CH_CTRL_SIGSEL_USART1IRTX << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
 
#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
 
#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
 
#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
 
#define PRS_CH_CTRL_SOURCESEL_PCNT0   (_PRS_CH_CTRL_SOURCESEL_PCNT0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
 
#define PRS_ROUTE_CH0PEN   (0x1UL << 0)
 
#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)
 
#define PRS_ROUTE_CH1PEN   (0x1UL << 1)
 
#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)
 
#define PRS_ROUTE_CH2PEN   (0x1UL << 2)
 
#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)
 
#define PRS_ROUTE_CH3PEN   (0x1UL << 3)
 
#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)
 
#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)
 
#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)
 
#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)
 
#define PRS_ROUTE_LOCATION_LOC2   (_PRS_ROUTE_LOCATION_LOC2 << 8)
 
#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)
 
#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
 
#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)
 
#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
 
#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)
 
#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
 
#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)
 
#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
 
#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)
 
#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
 
#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)
 
#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
 
#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)
 
#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
 
#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)
 
#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
 

Macro Definition Documentation

#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 256 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL

Bit mask for PRS_ASYNC

Definition at line 255 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_ASYNC_SHIFT   28

Shift value for PRS_ASYNC

Definition at line 254 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL

Mode BOTHEDGES for PRS_CH_CTRL

Definition at line 247 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 243 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL

Bit mask for PRS_EDSEL

Definition at line 242 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL

Mode NEGEDGE for PRS_CH_CTRL

Definition at line 246 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL

Mode OFF for PRS_CH_CTRL

Definition at line 244 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL

Mode POSEDGE for PRS_CH_CTRL

Definition at line 245 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_EDSEL_SHIFT   24

Shift value for PRS_EDSEL

Definition at line 241 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_MASK   0x133F0007UL

Mask for PRS_CH_CTRL

Definition at line 140 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL

Default value for PRS_CH_CTRL

Definition at line 139 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL

Mode ACMP0OUT for PRS_CH_CTRL

Definition at line 144 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL

Mode ADC0SCAN for PRS_CH_CTRL

Definition at line 153 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL

Mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 145 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL

Mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 150 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL

Mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 158 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL

Mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 165 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL

Mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 169 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL

Mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 173 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL

Mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 175 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL

Mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 177 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL

Mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 179 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL

Mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 164 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL

Mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 168 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL

Mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 172 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL

Mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 174 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL

Mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 176 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL

Mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 178 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL

Mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 151 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL

Mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 159 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL

Bit mask for PRS_SIGSEL

Definition at line 142 of file efm32zg_prs.h.

Referenced by PRS_SourceAsyncSignalSet(), and PRS_SourceSignalSet().

#define _PRS_CH_CTRL_SIGSEL_PCNT0TCC   0x00000000UL

Mode PCNT0TCC for PRS_CH_CTRL

Definition at line 152 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL

Mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 157 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL

Mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 163 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL

Mode RTCOF for PRS_CH_CTRL

Definition at line 149 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_SHIFT   0

Shift value for PRS_SIGSEL

Definition at line 141 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL

Mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 161 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL

Mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 166 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL

Mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 170 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL

Mode TIMER0OF for PRS_CH_CTRL

Definition at line 155 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL

Mode TIMER0UF for PRS_CH_CTRL

Definition at line 147 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL

Mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 162 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL

Mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 167 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL

Mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 171 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL

Mode TIMER1OF for PRS_CH_CTRL

Definition at line 156 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL

Mode TIMER1UF for PRS_CH_CTRL

Definition at line 148 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART1IRTX   0x00000000UL

Mode USART1IRTX for PRS_CH_CTRL

Definition at line 146 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL

Mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 160 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL

Mode USART1TXC for PRS_CH_CTRL

Definition at line 154 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL

Mode VCMPOUT for PRS_CH_CTRL

Definition at line 143 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL

Mode ACMP0 for PRS_CH_CTRL

Definition at line 221 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL

Mode ADC0 for PRS_CH_CTRL

Definition at line 222 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL

Mode GPIOH for PRS_CH_CTRL

Definition at line 228 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL

Mode GPIOL for PRS_CH_CTRL

Definition at line 227 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL

Bit mask for PRS_SOURCESEL

Definition at line 218 of file efm32zg_prs.h.

Referenced by PRS_SourceAsyncSignalSet(), and PRS_SourceSignalSet().

#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL

Mode NONE for PRS_CH_CTRL

Definition at line 219 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_PCNT0   0x00000036UL

Mode PCNT0 for PRS_CH_CTRL

Definition at line 229 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL

Mode RTC for PRS_CH_CTRL

Definition at line 226 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16

Shift value for PRS_SOURCESEL

Definition at line 217 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL

Mode TIMER0 for PRS_CH_CTRL

Definition at line 224 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL

Mode TIMER1 for PRS_CH_CTRL

Definition at line 225 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL

Mode USART1 for PRS_CH_CTRL

Definition at line 223 of file efm32zg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL

Mode VCMP for PRS_CH_CTRL

Definition at line 220 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 110 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH0PEN_MASK   0x1UL

Bit mask for PRS_CH0PEN

Definition at line 109 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH0PEN_SHIFT   0

Shift value for PRS_CH0PEN

Definition at line 108 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 115 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH1PEN_MASK   0x2UL

Bit mask for PRS_CH1PEN

Definition at line 114 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH1PEN_SHIFT   1

Shift value for PRS_CH1PEN

Definition at line 113 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 120 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH2PEN_MASK   0x4UL

Bit mask for PRS_CH2PEN

Definition at line 119 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH2PEN_SHIFT   2

Shift value for PRS_CH2PEN

Definition at line 118 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 125 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH3PEN_MASK   0x8UL

Bit mask for PRS_CH3PEN

Definition at line 124 of file efm32zg_prs.h.

#define _PRS_ROUTE_CH3PEN_SHIFT   3

Shift value for PRS_CH3PEN

Definition at line 123 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 130 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL

Mode LOC0 for PRS_ROUTE

Definition at line 129 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL

Mode LOC1 for PRS_ROUTE

Definition at line 131 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_LOC2   0x00000002UL

Mode LOC2 for PRS_ROUTE

Definition at line 132 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_MASK   0x700UL

Bit mask for PRS_LOCATION

Definition at line 128 of file efm32zg_prs.h.

#define _PRS_ROUTE_LOCATION_SHIFT   8

Shift value for PRS_LOCATION

Definition at line 127 of file efm32zg_prs.h.

#define _PRS_ROUTE_MASK   0x0000070FUL

Mask for PRS_ROUTE

Definition at line 106 of file efm32zg_prs.h.

#define _PRS_ROUTE_RESETVALUE   0x00000000UL

Default value for PRS_ROUTE

Definition at line 105 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 86 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL

Bit mask for PRS_CH0LEVEL

Definition at line 85 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0

Shift value for PRS_CH0LEVEL

Definition at line 84 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 91 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL

Bit mask for PRS_CH1LEVEL

Definition at line 90 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1

Shift value for PRS_CH1LEVEL

Definition at line 89 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 96 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL

Bit mask for PRS_CH2LEVEL

Definition at line 95 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2

Shift value for PRS_CH2LEVEL

Definition at line 94 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 101 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL

Bit mask for PRS_CH3LEVEL

Definition at line 100 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3

Shift value for PRS_CH3LEVEL

Definition at line 99 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_MASK   0x0000000FUL

Mask for PRS_SWLEVEL

Definition at line 82 of file efm32zg_prs.h.

#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL

Default value for PRS_SWLEVEL

Definition at line 81 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 62 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL

Bit mask for PRS_CH0PULSE

Definition at line 61 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_SHIFT   0

Shift value for PRS_CH0PULSE

Definition at line 60 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 67 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL

Bit mask for PRS_CH1PULSE

Definition at line 66 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_SHIFT   1

Shift value for PRS_CH1PULSE

Definition at line 65 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 72 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL

Bit mask for PRS_CH2PULSE

Definition at line 71 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_SHIFT   2

Shift value for PRS_CH2PULSE

Definition at line 70 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 77 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL

Bit mask for PRS_CH3PULSE

Definition at line 76 of file efm32zg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_SHIFT   3

Shift value for PRS_CH3PULSE

Definition at line 75 of file efm32zg_prs.h.

#define _PRS_SWPULSE_MASK   0x0000000FUL

Mask for PRS_SWPULSE

Definition at line 58 of file efm32zg_prs.h.

Referenced by PRS_PulseTrigger().

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL

Default value for PRS_SWPULSE

Definition at line 57 of file efm32zg_prs.h.

#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)

Asynchronous reflex

Definition at line 253 of file efm32zg_prs.h.

Referenced by PRS_SourceAsyncSignalSet().

#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 257 of file efm32zg_prs.h.

#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)

Shifted mode BOTHEDGES for PRS_CH_CTRL

Definition at line 252 of file efm32zg_prs.h.

#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 248 of file efm32zg_prs.h.

#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)

Shifted mode NEGEDGE for PRS_CH_CTRL

Definition at line 251 of file efm32zg_prs.h.

#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)

Shifted mode OFF for PRS_CH_CTRL

Definition at line 249 of file efm32zg_prs.h.

Referenced by PRS_SourceAsyncSignalSet().

#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)

Shifted mode POSEDGE for PRS_CH_CTRL

Definition at line 250 of file efm32zg_prs.h.

Referenced by CAPSENSE_Init().

#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)

Shifted mode ACMP0OUT for PRS_CH_CTRL

Definition at line 181 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)

Shifted mode ADC0SCAN for PRS_CH_CTRL

Definition at line 190 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)

Shifted mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 182 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)

Shifted mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 187 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)

Shifted mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 195 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)

Shifted mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 202 of file efm32zg_prs.h.

Referenced by BOARD_init().

#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)

Shifted mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 206 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)

Shifted mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 210 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)

Shifted mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 212 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)

Shifted mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 214 of file efm32zg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)

Shifted mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 216 of file efm32zg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)

Shifted mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 201 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)

Shifted mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 205 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)

Shifted mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 209 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)

Shifted mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 211 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)

Shifted mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 213 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)

Shifted mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 215 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)

Shifted mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 188 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)

Shifted mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 196 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_PCNT0TCC   (_PRS_CH_CTRL_SIGSEL_PCNT0TCC << 0)

Shifted mode PCNT0TCC for PRS_CH_CTRL

Definition at line 189 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)

Shifted mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 194 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)

Shifted mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 200 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)

Shifted mode RTCOF for PRS_CH_CTRL

Definition at line 186 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)

Shifted mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 198 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)

Shifted mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 203 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)

Shifted mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 207 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)

Shifted mode TIMER0OF for PRS_CH_CTRL

Definition at line 192 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)

Shifted mode TIMER0UF for PRS_CH_CTRL

Definition at line 184 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)

Shifted mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 199 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)

Shifted mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 204 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)

Shifted mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 208 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)

Shifted mode TIMER1OF for PRS_CH_CTRL

Definition at line 193 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)

Shifted mode TIMER1UF for PRS_CH_CTRL

Definition at line 185 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART1IRTX   (_PRS_CH_CTRL_SIGSEL_USART1IRTX << 0)

Shifted mode USART1IRTX for PRS_CH_CTRL

Definition at line 183 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)

Shifted mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 197 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)

Shifted mode USART1TXC for PRS_CH_CTRL

Definition at line 191 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)

Shifted mode VCMPOUT for PRS_CH_CTRL

Definition at line 180 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)

Shifted mode ACMP0 for PRS_CH_CTRL

Definition at line 232 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)

Shifted mode ADC0 for PRS_CH_CTRL

Definition at line 233 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)

Shifted mode GPIOH for PRS_CH_CTRL

Definition at line 239 of file efm32zg_prs.h.

Referenced by BOARD_init(), and ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)

Shifted mode GPIOL for PRS_CH_CTRL

Definition at line 238 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)

Shifted mode NONE for PRS_CH_CTRL

Definition at line 230 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_PCNT0   (_PRS_CH_CTRL_SOURCESEL_PCNT0 << 16)

Shifted mode PCNT0 for PRS_CH_CTRL

Definition at line 240 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)

Shifted mode RTC for PRS_CH_CTRL

Definition at line 237 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)

Shifted mode TIMER0 for PRS_CH_CTRL

Definition at line 235 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)

Shifted mode TIMER1 for PRS_CH_CTRL

Definition at line 236 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)

Shifted mode USART1 for PRS_CH_CTRL

Definition at line 234 of file efm32zg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)

Shifted mode VCMP for PRS_CH_CTRL

Definition at line 231 of file efm32zg_prs.h.

#define PRS_ROUTE_CH0PEN   (0x1UL << 0)

CH0 Pin Enable

Definition at line 107 of file efm32zg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 111 of file efm32zg_prs.h.

#define PRS_ROUTE_CH1PEN   (0x1UL << 1)

CH1 Pin Enable

Definition at line 112 of file efm32zg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 116 of file efm32zg_prs.h.

#define PRS_ROUTE_CH2PEN   (0x1UL << 2)

CH2 Pin Enable

Definition at line 117 of file efm32zg_prs.h.

#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 121 of file efm32zg_prs.h.

#define PRS_ROUTE_CH3PEN   (0x1UL << 3)

CH3 Pin Enable

Definition at line 122 of file efm32zg_prs.h.

#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 126 of file efm32zg_prs.h.

#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 134 of file efm32zg_prs.h.

#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)

Shifted mode LOC0 for PRS_ROUTE

Definition at line 133 of file efm32zg_prs.h.

#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)

Shifted mode LOC1 for PRS_ROUTE

Definition at line 135 of file efm32zg_prs.h.

#define PRS_ROUTE_LOCATION_LOC2   (_PRS_ROUTE_LOCATION_LOC2 << 8)

Shifted mode LOC2 for PRS_ROUTE

Definition at line 136 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)

Channel 0 Software Level

Definition at line 83 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 87 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)

Channel 1 Software Level

Definition at line 88 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 92 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)

Channel 2 Software Level

Definition at line 93 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 97 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)

Channel 3 Software Level

Definition at line 98 of file efm32zg_prs.h.

#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 102 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)

Channel 0 Pulse Generation

Definition at line 59 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 63 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)

Channel 1 Pulse Generation

Definition at line 64 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 68 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)

Channel 2 Pulse Generation

Definition at line 69 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 73 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)

Channel 3 Pulse Generation

Definition at line 74 of file efm32zg_prs.h.

#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 78 of file efm32zg_prs.h.