efm32zg/html/efm32zg__msc_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   __IOM uint32_t READCTRL;

   __IOM uint32_t WRITECTRL;

   __IOM uint32_t WRITECMD;

   __IOM uint32_t ADDRB;

   uint32_t       RESERVED0[1];

   __IOM uint32_t WDATA;

   __IM uint32_t  STATUS;

   uint32_t       RESERVED1[3];

   __IM uint32_t  IF;

   __IOM uint32_t IFS;

   __IOM uint32_t IFC;

   __IOM uint32_t IEN;

   __IOM uint32_t LOCK;

   __IOM uint32_t CMD;

   __IM uint32_t  CACHEHITS;

   __IM uint32_t  CACHEMISSES;

   uint32_t       RESERVED2[1];

   __IOM uint32_t TIMEBASE;

   __IOM uint32_t MASSLOCK;

   __IOM uint32_t IRQLATENCY;

 } MSC_TypeDef;

 /**************************************************************************/

 /* Bit fields for MSC CTRL */

 #define _MSC_CTRL_RESETVALUE                    0x00000001UL

 #define _MSC_CTRL_MASK                          0x00000001UL

 #define MSC_CTRL_BUSFAULT                       (0x1UL << 0)

 #define _MSC_CTRL_BUSFAULT_SHIFT                0

 #define _MSC_CTRL_BUSFAULT_MASK                 0x1UL

 #define _MSC_CTRL_BUSFAULT_GENERATE             0x00000000UL

 #define _MSC_CTRL_BUSFAULT_DEFAULT              0x00000001UL

 #define _MSC_CTRL_BUSFAULT_IGNORE               0x00000001UL

 #define MSC_CTRL_BUSFAULT_GENERATE              (_MSC_CTRL_BUSFAULT_GENERATE << 0)

 #define MSC_CTRL_BUSFAULT_DEFAULT               (_MSC_CTRL_BUSFAULT_DEFAULT << 0)

 #define MSC_CTRL_BUSFAULT_IGNORE                (_MSC_CTRL_BUSFAULT_IGNORE << 0)

 /* Bit fields for MSC READCTRL */

 #define _MSC_READCTRL_RESETVALUE                0x00000001UL

 #define _MSC_READCTRL_MASK                      0x0000009FUL

 #define _MSC_READCTRL_MODE_SHIFT                0

 #define _MSC_READCTRL_MODE_MASK                 0x7UL

 #define _MSC_READCTRL_MODE_WS0                  0x00000000UL

 #define _MSC_READCTRL_MODE_DEFAULT              0x00000001UL

 #define _MSC_READCTRL_MODE_WS1                  0x00000001UL

 #define MSC_READCTRL_MODE_WS0                   (_MSC_READCTRL_MODE_WS0 << 0)

 #define MSC_READCTRL_MODE_DEFAULT               (_MSC_READCTRL_MODE_DEFAULT << 0)

 #define MSC_READCTRL_MODE_WS1                   (_MSC_READCTRL_MODE_WS1 << 0)

 #define MSC_READCTRL_IFCDIS                     (0x1UL << 3)

 #define _MSC_READCTRL_IFCDIS_SHIFT              3

 #define _MSC_READCTRL_IFCDIS_MASK               0x8UL

 #define _MSC_READCTRL_IFCDIS_DEFAULT            0x00000000UL

 #define MSC_READCTRL_IFCDIS_DEFAULT             (_MSC_READCTRL_IFCDIS_DEFAULT << 3)

 #define MSC_READCTRL_AIDIS                      (0x1UL << 4)

 #define _MSC_READCTRL_AIDIS_SHIFT               4

 #define _MSC_READCTRL_AIDIS_MASK                0x10UL

 #define _MSC_READCTRL_AIDIS_DEFAULT             0x00000000UL

 #define MSC_READCTRL_AIDIS_DEFAULT              (_MSC_READCTRL_AIDIS_DEFAULT << 4)

 #define MSC_READCTRL_RAMCEN                     (0x1UL << 7)

 #define _MSC_READCTRL_RAMCEN_SHIFT              7

 #define _MSC_READCTRL_RAMCEN_MASK               0x80UL

 #define _MSC_READCTRL_RAMCEN_DEFAULT            0x00000000UL

 #define MSC_READCTRL_RAMCEN_DEFAULT             (_MSC_READCTRL_RAMCEN_DEFAULT << 7)

 /* Bit fields for MSC WRITECTRL */

 #define _MSC_WRITECTRL_RESETVALUE               0x00000000UL

 #define _MSC_WRITECTRL_MASK                     0x00000003UL

 #define MSC_WRITECTRL_WREN                      (0x1UL << 0)

 #define _MSC_WRITECTRL_WREN_SHIFT               0

 #define _MSC_WRITECTRL_WREN_MASK                0x1UL

 #define _MSC_WRITECTRL_WREN_DEFAULT             0x00000000UL

 #define MSC_WRITECTRL_WREN_DEFAULT              (_MSC_WRITECTRL_WREN_DEFAULT << 0)

 #define MSC_WRITECTRL_IRQERASEABORT             (0x1UL << 1)

 #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT      1

 #define _MSC_WRITECTRL_IRQERASEABORT_MASK       0x2UL

 #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT    0x00000000UL

 #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT     (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)

 /* Bit fields for MSC WRITECMD */

 #define _MSC_WRITECMD_RESETVALUE                0x00000000UL

 #define _MSC_WRITECMD_MASK                      0x0000113FUL

 #define MSC_WRITECMD_LADDRIM                    (0x1UL << 0)

 #define _MSC_WRITECMD_LADDRIM_SHIFT             0

 #define _MSC_WRITECMD_LADDRIM_MASK              0x1UL

 #define _MSC_WRITECMD_LADDRIM_DEFAULT           0x00000000UL

 #define MSC_WRITECMD_LADDRIM_DEFAULT            (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)

 #define MSC_WRITECMD_ERASEPAGE                  (0x1UL << 1)

 #define _MSC_WRITECMD_ERASEPAGE_SHIFT           1

 #define _MSC_WRITECMD_ERASEPAGE_MASK            0x2UL

 #define _MSC_WRITECMD_ERASEPAGE_DEFAULT         0x00000000UL

 #define MSC_WRITECMD_ERASEPAGE_DEFAULT          (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)

 #define MSC_WRITECMD_WRITEEND                   (0x1UL << 2)

 #define _MSC_WRITECMD_WRITEEND_SHIFT            2

 #define _MSC_WRITECMD_WRITEEND_MASK             0x4UL

 #define _MSC_WRITECMD_WRITEEND_DEFAULT          0x00000000UL

 #define MSC_WRITECMD_WRITEEND_DEFAULT           (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)

 #define MSC_WRITECMD_WRITEONCE                  (0x1UL << 3)

 #define _MSC_WRITECMD_WRITEONCE_SHIFT           3

 #define _MSC_WRITECMD_WRITEONCE_MASK            0x8UL

 #define _MSC_WRITECMD_WRITEONCE_DEFAULT         0x00000000UL

 #define MSC_WRITECMD_WRITEONCE_DEFAULT          (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)

 #define MSC_WRITECMD_WRITETRIG                  (0x1UL << 4)

 #define _MSC_WRITECMD_WRITETRIG_SHIFT           4

 #define _MSC_WRITECMD_WRITETRIG_MASK            0x10UL

 #define _MSC_WRITECMD_WRITETRIG_DEFAULT         0x00000000UL

 #define MSC_WRITECMD_WRITETRIG_DEFAULT          (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)

 #define MSC_WRITECMD_ERASEABORT                 (0x1UL << 5)

 #define _MSC_WRITECMD_ERASEABORT_SHIFT          5

 #define _MSC_WRITECMD_ERASEABORT_MASK           0x20UL

 #define _MSC_WRITECMD_ERASEABORT_DEFAULT        0x00000000UL

 #define MSC_WRITECMD_ERASEABORT_DEFAULT         (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)

 #define MSC_WRITECMD_ERASEMAIN0                 (0x1UL << 8)

 #define _MSC_WRITECMD_ERASEMAIN0_SHIFT          8

 #define _MSC_WRITECMD_ERASEMAIN0_MASK           0x100UL

 #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT        0x00000000UL

 #define MSC_WRITECMD_ERASEMAIN0_DEFAULT         (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)

 #define MSC_WRITECMD_CLEARWDATA                 (0x1UL << 12)

 #define _MSC_WRITECMD_CLEARWDATA_SHIFT          12

 #define _MSC_WRITECMD_CLEARWDATA_MASK           0x1000UL

 #define _MSC_WRITECMD_CLEARWDATA_DEFAULT        0x00000000UL

 #define MSC_WRITECMD_CLEARWDATA_DEFAULT         (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)

 /* Bit fields for MSC ADDRB */

 #define _MSC_ADDRB_RESETVALUE                   0x00000000UL

 #define _MSC_ADDRB_MASK                         0xFFFFFFFFUL

 #define _MSC_ADDRB_ADDRB_SHIFT                  0

 #define _MSC_ADDRB_ADDRB_MASK                   0xFFFFFFFFUL

 #define _MSC_ADDRB_ADDRB_DEFAULT                0x00000000UL

 #define MSC_ADDRB_ADDRB_DEFAULT                 (_MSC_ADDRB_ADDRB_DEFAULT << 0)

 /* Bit fields for MSC WDATA */

 #define _MSC_WDATA_RESETVALUE                   0x00000000UL

 #define _MSC_WDATA_MASK                         0xFFFFFFFFUL

 #define _MSC_WDATA_WDATA_SHIFT                  0

 #define _MSC_WDATA_WDATA_MASK                   0xFFFFFFFFUL

 #define _MSC_WDATA_WDATA_DEFAULT                0x00000000UL

 #define MSC_WDATA_WDATA_DEFAULT                 (_MSC_WDATA_WDATA_DEFAULT << 0)

 /* Bit fields for MSC STATUS */

 #define _MSC_STATUS_RESETVALUE                  0x00000008UL

 #define _MSC_STATUS_MASK                        0x0000007FUL

 #define MSC_STATUS_BUSY                         (0x1UL << 0)

 #define _MSC_STATUS_BUSY_SHIFT                  0

 #define _MSC_STATUS_BUSY_MASK                   0x1UL

 #define _MSC_STATUS_BUSY_DEFAULT                0x00000000UL

 #define MSC_STATUS_BUSY_DEFAULT                 (_MSC_STATUS_BUSY_DEFAULT << 0)

 #define MSC_STATUS_LOCKED                       (0x1UL << 1)

 #define _MSC_STATUS_LOCKED_SHIFT                1

 #define _MSC_STATUS_LOCKED_MASK                 0x2UL

 #define _MSC_STATUS_LOCKED_DEFAULT              0x00000000UL

 #define MSC_STATUS_LOCKED_DEFAULT               (_MSC_STATUS_LOCKED_DEFAULT << 1)

 #define MSC_STATUS_INVADDR                      (0x1UL << 2)

 #define _MSC_STATUS_INVADDR_SHIFT               2

 #define _MSC_STATUS_INVADDR_MASK                0x4UL

 #define _MSC_STATUS_INVADDR_DEFAULT             0x00000000UL

 #define MSC_STATUS_INVADDR_DEFAULT              (_MSC_STATUS_INVADDR_DEFAULT << 2)

 #define MSC_STATUS_WDATAREADY                   (0x1UL << 3)

 #define _MSC_STATUS_WDATAREADY_SHIFT            3

 #define _MSC_STATUS_WDATAREADY_MASK             0x8UL

 #define _MSC_STATUS_WDATAREADY_DEFAULT          0x00000001UL

 #define MSC_STATUS_WDATAREADY_DEFAULT           (_MSC_STATUS_WDATAREADY_DEFAULT << 3)

 #define MSC_STATUS_WORDTIMEOUT                  (0x1UL << 4)

 #define _MSC_STATUS_WORDTIMEOUT_SHIFT           4

 #define _MSC_STATUS_WORDTIMEOUT_MASK            0x10UL

 #define _MSC_STATUS_WORDTIMEOUT_DEFAULT         0x00000000UL

 #define MSC_STATUS_WORDTIMEOUT_DEFAULT          (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)

 #define MSC_STATUS_ERASEABORTED                 (0x1UL << 5)

 #define _MSC_STATUS_ERASEABORTED_SHIFT          5

 #define _MSC_STATUS_ERASEABORTED_MASK           0x20UL

 #define _MSC_STATUS_ERASEABORTED_DEFAULT        0x00000000UL

 #define MSC_STATUS_ERASEABORTED_DEFAULT         (_MSC_STATUS_ERASEABORTED_DEFAULT << 5)

 #define MSC_STATUS_PCRUNNING                    (0x1UL << 6)

 #define _MSC_STATUS_PCRUNNING_SHIFT             6

 #define _MSC_STATUS_PCRUNNING_MASK              0x40UL

 #define _MSC_STATUS_PCRUNNING_DEFAULT           0x00000000UL

 #define MSC_STATUS_PCRUNNING_DEFAULT            (_MSC_STATUS_PCRUNNING_DEFAULT << 6)

 /* Bit fields for MSC IF */

 #define _MSC_IF_RESETVALUE                      0x00000000UL

 #define _MSC_IF_MASK                            0x0000000FUL

 #define MSC_IF_ERASE                            (0x1UL << 0)

 #define _MSC_IF_ERASE_SHIFT                     0

 #define _MSC_IF_ERASE_MASK                      0x1UL

 #define _MSC_IF_ERASE_DEFAULT                   0x00000000UL

 #define MSC_IF_ERASE_DEFAULT                    (_MSC_IF_ERASE_DEFAULT << 0)

 #define MSC_IF_WRITE                            (0x1UL << 1)

 #define _MSC_IF_WRITE_SHIFT                     1

 #define _MSC_IF_WRITE_MASK                      0x2UL

 #define _MSC_IF_WRITE_DEFAULT                   0x00000000UL

 #define MSC_IF_WRITE_DEFAULT                    (_MSC_IF_WRITE_DEFAULT << 1)

 #define MSC_IF_CHOF                             (0x1UL << 2)

 #define _MSC_IF_CHOF_SHIFT                      2

 #define _MSC_IF_CHOF_MASK                       0x4UL

 #define _MSC_IF_CHOF_DEFAULT                    0x00000000UL

 #define MSC_IF_CHOF_DEFAULT                     (_MSC_IF_CHOF_DEFAULT << 2)

 #define MSC_IF_CMOF                             (0x1UL << 3)

 #define _MSC_IF_CMOF_SHIFT                      3

 #define _MSC_IF_CMOF_MASK                       0x8UL

 #define _MSC_IF_CMOF_DEFAULT                    0x00000000UL

 #define MSC_IF_CMOF_DEFAULT                     (_MSC_IF_CMOF_DEFAULT << 3)

 /* Bit fields for MSC IFS */

 #define _MSC_IFS_RESETVALUE                     0x00000000UL

 #define _MSC_IFS_MASK                           0x0000000FUL

 #define MSC_IFS_ERASE                           (0x1UL << 0)

 #define _MSC_IFS_ERASE_SHIFT                    0

 #define _MSC_IFS_ERASE_MASK                     0x1UL

 #define _MSC_IFS_ERASE_DEFAULT                  0x00000000UL

 #define MSC_IFS_ERASE_DEFAULT                   (_MSC_IFS_ERASE_DEFAULT << 0)

 #define MSC_IFS_WRITE                           (0x1UL << 1)

 #define _MSC_IFS_WRITE_SHIFT                    1

 #define _MSC_IFS_WRITE_MASK                     0x2UL

 #define _MSC_IFS_WRITE_DEFAULT                  0x00000000UL

 #define MSC_IFS_WRITE_DEFAULT                   (_MSC_IFS_WRITE_DEFAULT << 1)

 #define MSC_IFS_CHOF                            (0x1UL << 2)

 #define _MSC_IFS_CHOF_SHIFT                     2

 #define _MSC_IFS_CHOF_MASK                      0x4UL

 #define _MSC_IFS_CHOF_DEFAULT                   0x00000000UL

 #define MSC_IFS_CHOF_DEFAULT                    (_MSC_IFS_CHOF_DEFAULT << 2)

 #define MSC_IFS_CMOF                            (0x1UL << 3)

 #define _MSC_IFS_CMOF_SHIFT                     3

 #define _MSC_IFS_CMOF_MASK                      0x8UL

 #define _MSC_IFS_CMOF_DEFAULT                   0x00000000UL

 #define MSC_IFS_CMOF_DEFAULT                    (_MSC_IFS_CMOF_DEFAULT << 3)

 /* Bit fields for MSC IFC */

 #define _MSC_IFC_RESETVALUE                     0x00000000UL

 #define _MSC_IFC_MASK                           0x0000000FUL

 #define MSC_IFC_ERASE                           (0x1UL << 0)

 #define _MSC_IFC_ERASE_SHIFT                    0

 #define _MSC_IFC_ERASE_MASK                     0x1UL

 #define _MSC_IFC_ERASE_DEFAULT                  0x00000000UL

 #define MSC_IFC_ERASE_DEFAULT                   (_MSC_IFC_ERASE_DEFAULT << 0)

 #define MSC_IFC_WRITE                           (0x1UL << 1)

 #define _MSC_IFC_WRITE_SHIFT                    1

 #define _MSC_IFC_WRITE_MASK                     0x2UL

 #define _MSC_IFC_WRITE_DEFAULT                  0x00000000UL

 #define MSC_IFC_WRITE_DEFAULT                   (_MSC_IFC_WRITE_DEFAULT << 1)

 #define MSC_IFC_CHOF                            (0x1UL << 2)

 #define _MSC_IFC_CHOF_SHIFT                     2

 #define _MSC_IFC_CHOF_MASK                      0x4UL

 #define _MSC_IFC_CHOF_DEFAULT                   0x00000000UL

 #define MSC_IFC_CHOF_DEFAULT                    (_MSC_IFC_CHOF_DEFAULT << 2)

 #define MSC_IFC_CMOF                            (0x1UL << 3)

 #define _MSC_IFC_CMOF_SHIFT                     3

 #define _MSC_IFC_CMOF_MASK                      0x8UL

 #define _MSC_IFC_CMOF_DEFAULT                   0x00000000UL

 #define MSC_IFC_CMOF_DEFAULT                    (_MSC_IFC_CMOF_DEFAULT << 3)

 /* Bit fields for MSC IEN */

 #define _MSC_IEN_RESETVALUE                     0x00000000UL

 #define _MSC_IEN_MASK                           0x0000000FUL

 #define MSC_IEN_ERASE                           (0x1UL << 0)

 #define _MSC_IEN_ERASE_SHIFT                    0

 #define _MSC_IEN_ERASE_MASK                     0x1UL

 #define _MSC_IEN_ERASE_DEFAULT                  0x00000000UL

 #define MSC_IEN_ERASE_DEFAULT                   (_MSC_IEN_ERASE_DEFAULT << 0)

 #define MSC_IEN_WRITE                           (0x1UL << 1)

 #define _MSC_IEN_WRITE_SHIFT                    1

 #define _MSC_IEN_WRITE_MASK                     0x2UL

 #define _MSC_IEN_WRITE_DEFAULT                  0x00000000UL

 #define MSC_IEN_WRITE_DEFAULT                   (_MSC_IEN_WRITE_DEFAULT << 1)

 #define MSC_IEN_CHOF                            (0x1UL << 2)

 #define _MSC_IEN_CHOF_SHIFT                     2

 #define _MSC_IEN_CHOF_MASK                      0x4UL

 #define _MSC_IEN_CHOF_DEFAULT                   0x00000000UL

 #define MSC_IEN_CHOF_DEFAULT                    (_MSC_IEN_CHOF_DEFAULT << 2)

 #define MSC_IEN_CMOF                            (0x1UL << 3)

 #define _MSC_IEN_CMOF_SHIFT                     3

 #define _MSC_IEN_CMOF_MASK                      0x8UL

 #define _MSC_IEN_CMOF_DEFAULT                   0x00000000UL

 #define MSC_IEN_CMOF_DEFAULT                    (_MSC_IEN_CMOF_DEFAULT << 3)

 /* Bit fields for MSC LOCK */

 #define _MSC_LOCK_RESETVALUE                    0x00000000UL

 #define _MSC_LOCK_MASK                          0x0000FFFFUL

 #define _MSC_LOCK_LOCKKEY_SHIFT                 0

 #define _MSC_LOCK_LOCKKEY_MASK                  0xFFFFUL

 #define _MSC_LOCK_LOCKKEY_DEFAULT               0x00000000UL

 #define _MSC_LOCK_LOCKKEY_LOCK                  0x00000000UL

 #define _MSC_LOCK_LOCKKEY_UNLOCKED              0x00000000UL

 #define _MSC_LOCK_LOCKKEY_LOCKED                0x00000001UL

 #define _MSC_LOCK_LOCKKEY_UNLOCK                0x00001B71UL

 #define MSC_LOCK_LOCKKEY_DEFAULT                (_MSC_LOCK_LOCKKEY_DEFAULT << 0)

 #define MSC_LOCK_LOCKKEY_LOCK                   (_MSC_LOCK_LOCKKEY_LOCK << 0)

 #define MSC_LOCK_LOCKKEY_UNLOCKED               (_MSC_LOCK_LOCKKEY_UNLOCKED << 0)

 #define MSC_LOCK_LOCKKEY_LOCKED                 (_MSC_LOCK_LOCKKEY_LOCKED << 0)

 #define MSC_LOCK_LOCKKEY_UNLOCK                 (_MSC_LOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for MSC CMD */

 #define _MSC_CMD_RESETVALUE                     0x00000000UL

 #define _MSC_CMD_MASK                           0x00000007UL

 #define MSC_CMD_INVCACHE                        (0x1UL << 0)

 #define _MSC_CMD_INVCACHE_SHIFT                 0

 #define _MSC_CMD_INVCACHE_MASK                  0x1UL

 #define _MSC_CMD_INVCACHE_DEFAULT               0x00000000UL

 #define MSC_CMD_INVCACHE_DEFAULT                (_MSC_CMD_INVCACHE_DEFAULT << 0)

 #define MSC_CMD_STARTPC                         (0x1UL << 1)

 #define _MSC_CMD_STARTPC_SHIFT                  1

 #define _MSC_CMD_STARTPC_MASK                   0x2UL

 #define _MSC_CMD_STARTPC_DEFAULT                0x00000000UL

 #define MSC_CMD_STARTPC_DEFAULT                 (_MSC_CMD_STARTPC_DEFAULT << 1)

 #define MSC_CMD_STOPPC                          (0x1UL << 2)

 #define _MSC_CMD_STOPPC_SHIFT                   2

 #define _MSC_CMD_STOPPC_MASK                    0x4UL

 #define _MSC_CMD_STOPPC_DEFAULT                 0x00000000UL

 #define MSC_CMD_STOPPC_DEFAULT                  (_MSC_CMD_STOPPC_DEFAULT << 2)

 /* Bit fields for MSC CACHEHITS */

 #define _MSC_CACHEHITS_RESETVALUE               0x00000000UL

 #define _MSC_CACHEHITS_MASK                     0x000FFFFFUL

 #define _MSC_CACHEHITS_CACHEHITS_SHIFT          0

 #define _MSC_CACHEHITS_CACHEHITS_MASK           0xFFFFFUL

 #define _MSC_CACHEHITS_CACHEHITS_DEFAULT        0x00000000UL

 #define MSC_CACHEHITS_CACHEHITS_DEFAULT         (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0)

 /* Bit fields for MSC CACHEMISSES */

 #define _MSC_CACHEMISSES_RESETVALUE             0x00000000UL

 #define _MSC_CACHEMISSES_MASK                   0x000FFFFFUL

 #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT      0

 #define _MSC_CACHEMISSES_CACHEMISSES_MASK       0xFFFFFUL

 #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT    0x00000000UL

 #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT     (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0)

 /* Bit fields for MSC TIMEBASE */

 #define _MSC_TIMEBASE_RESETVALUE                0x00000010UL

 #define _MSC_TIMEBASE_MASK                      0x0001003FUL

 #define _MSC_TIMEBASE_BASE_SHIFT                0

 #define _MSC_TIMEBASE_BASE_MASK                 0x3FUL

 #define _MSC_TIMEBASE_BASE_DEFAULT              0x00000010UL

 #define MSC_TIMEBASE_BASE_DEFAULT               (_MSC_TIMEBASE_BASE_DEFAULT << 0)

 #define MSC_TIMEBASE_PERIOD                     (0x1UL << 16)

 #define _MSC_TIMEBASE_PERIOD_SHIFT              16

 #define _MSC_TIMEBASE_PERIOD_MASK               0x10000UL

 #define _MSC_TIMEBASE_PERIOD_DEFAULT            0x00000000UL

 #define _MSC_TIMEBASE_PERIOD_1US                0x00000000UL

 #define _MSC_TIMEBASE_PERIOD_5US                0x00000001UL

 #define MSC_TIMEBASE_PERIOD_DEFAULT             (_MSC_TIMEBASE_PERIOD_DEFAULT << 16)

 #define MSC_TIMEBASE_PERIOD_1US                 (_MSC_TIMEBASE_PERIOD_1US << 16)

 #define MSC_TIMEBASE_PERIOD_5US                 (_MSC_TIMEBASE_PERIOD_5US << 16)

 /* Bit fields for MSC MASSLOCK */

 #define _MSC_MASSLOCK_RESETVALUE                0x00000001UL

 #define _MSC_MASSLOCK_MASK                      0x0000FFFFUL

 #define _MSC_MASSLOCK_LOCKKEY_SHIFT             0

 #define _MSC_MASSLOCK_LOCKKEY_MASK              0xFFFFUL

 #define _MSC_MASSLOCK_LOCKKEY_LOCK              0x00000000UL

 #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED          0x00000000UL

 #define _MSC_MASSLOCK_LOCKKEY_DEFAULT           0x00000001UL

 #define _MSC_MASSLOCK_LOCKKEY_LOCKED            0x00000001UL

 #define _MSC_MASSLOCK_LOCKKEY_UNLOCK            0x0000631AUL

 #define MSC_MASSLOCK_LOCKKEY_LOCK               (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)

 #define MSC_MASSLOCK_LOCKKEY_UNLOCKED           (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0)

 #define MSC_MASSLOCK_LOCKKEY_DEFAULT            (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)

 #define MSC_MASSLOCK_LOCKKEY_LOCKED             (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)

 #define MSC_MASSLOCK_LOCKKEY_UNLOCK             (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for MSC IRQLATENCY */

 #define _MSC_IRQLATENCY_RESETVALUE              0x00000000UL

 #define _MSC_IRQLATENCY_MASK                    0x000000FFUL

 #define _MSC_IRQLATENCY_IRQLATENCY_SHIFT        0

 #define _MSC_IRQLATENCY_IRQLATENCY_MASK         0xFFUL

 #define _MSC_IRQLATENCY_IRQLATENCY_DEFAULT      0x00000000UL

 #define MSC_IRQLATENCY_IRQLATENCY_DEFAULT       (_MSC_IRQLATENCY_IRQLATENCY_DEFAULT << 0)

MSC_TypeDef::MASSLOCK
__IOM uint32_t MASSLOCK
Definition: efm32zg_msc.h:64

MSC_TypeDef::CACHEHITS
__IM uint32_t CACHEHITS
Definition: efm32zg_msc.h:60

MSC_TypeDef::LOCK
__IOM uint32_t LOCK
Definition: efm32zg_msc.h:58

MSC_TypeDef::IRQLATENCY
__IOM uint32_t IRQLATENCY
Definition: efm32zg_msc.h:65

MSC_TypeDef::IEN
__IOM uint32_t IEN
Definition: efm32zg_msc.h:57

MSC_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efm32zg_msc.h:51

MSC_TypeDef::WDATA
__IOM uint32_t WDATA
Definition: efm32zg_msc.h:50

MSC_TypeDef::TIMEBASE
__IOM uint32_t TIMEBASE
Definition: efm32zg_msc.h:63

MSC_TypeDef::READCTRL
__IOM uint32_t READCTRL
Definition: efm32zg_msc.h:44

MSC_TypeDef::IFC
__IOM uint32_t IFC
Definition: efm32zg_msc.h:56

MSC_TypeDef::ADDRB
__IOM uint32_t ADDRB
Definition: efm32zg_msc.h:47

MSC_TypeDef::CACHEMISSES
__IM uint32_t CACHEMISSES
Definition: efm32zg_msc.h:61

MSC_TypeDef::IFS
__IOM uint32_t IFS
Definition: efm32zg_msc.h:55

MSC_TypeDef::WRITECTRL
__IOM uint32_t WRITECTRL
Definition: efm32zg_msc.h:45

MSC_TypeDef
Definition: efm32zg_msc.h:41

MSC_TypeDef::CMD
__IOM uint32_t CMD
Definition: efm32zg_msc.h:59

MSC_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32zg_msc.h:43

MSC_TypeDef::IF
__IM uint32_t IF
Definition: efm32zg_msc.h:54

MSC_TypeDef::WRITECMD
__IOM uint32_t WRITECMD
Definition: efm32zg_msc.h:46