EFM32 Zero Gecko Software Documentation  efm32zg-doc-5.1.2
efm32zg_idac.h File Reference

Detailed Description

EFM32ZG_IDAC register and bit field definitions.

Version
5.1.2

License

Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

  1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
  2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
  3. This notice may not be removed or altered from any source distribution.

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Definition in file efm32zg_idac.h.

Go to the source code of this file.

Data Structures

struct  IDAC_TypeDef
 

Macros

#define _IDAC_CAL_MASK   0x0000007FUL
 
#define _IDAC_CAL_RESETVALUE   0x00000000UL
 
#define _IDAC_CAL_TUNING_DEFAULT   0x00000000UL
 
#define _IDAC_CAL_TUNING_MASK   0x7FUL
 
#define _IDAC_CAL_TUNING_SHIFT   0
 
#define _IDAC_CTRL_CURSINK_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_CURSINK_MASK   0x2UL
 
#define _IDAC_CTRL_CURSINK_SHIFT   1
 
#define _IDAC_CTRL_EN_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_EN_MASK   0x1UL
 
#define _IDAC_CTRL_EN_SHIFT   0
 
#define _IDAC_CTRL_MASK   0x0034001FUL
 
#define _IDAC_CTRL_MINOUTTRANS_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_MINOUTTRANS_MASK   0x4UL
 
#define _IDAC_CTRL_MINOUTTRANS_SHIFT   2
 
#define _IDAC_CTRL_OUTEN_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_OUTEN_MASK   0x8UL
 
#define _IDAC_CTRL_OUTEN_SHIFT   3
 
#define _IDAC_CTRL_OUTENPRS_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_OUTENPRS_MASK   0x40000UL
 
#define _IDAC_CTRL_OUTENPRS_SHIFT   18
 
#define _IDAC_CTRL_OUTMODE_ADC   0x00000001UL
 
#define _IDAC_CTRL_OUTMODE_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_OUTMODE_MASK   0x10UL
 
#define _IDAC_CTRL_OUTMODE_PIN   0x00000000UL
 
#define _IDAC_CTRL_OUTMODE_SHIFT   4
 
#define _IDAC_CTRL_PRSSEL_DEFAULT   0x00000000UL
 
#define _IDAC_CTRL_PRSSEL_MASK   0x300000UL
 
#define _IDAC_CTRL_PRSSEL_PRSCH0   0x00000000UL
 
#define _IDAC_CTRL_PRSSEL_PRSCH1   0x00000001UL
 
#define _IDAC_CTRL_PRSSEL_PRSCH2   0x00000002UL
 
#define _IDAC_CTRL_PRSSEL_PRSCH3   0x00000003UL
 
#define _IDAC_CTRL_PRSSEL_SHIFT   20
 
#define _IDAC_CTRL_RESETVALUE   0x00000000UL
 
#define _IDAC_CURPROG_MASK   0x00001F03UL
 
#define _IDAC_CURPROG_RANGESEL_DEFAULT   0x00000000UL
 
#define _IDAC_CURPROG_RANGESEL_MASK   0x3UL
 
#define _IDAC_CURPROG_RANGESEL_RANGE0   0x00000000UL
 
#define _IDAC_CURPROG_RANGESEL_RANGE1   0x00000001UL
 
#define _IDAC_CURPROG_RANGESEL_RANGE2   0x00000002UL
 
#define _IDAC_CURPROG_RANGESEL_RANGE3   0x00000003UL
 
#define _IDAC_CURPROG_RANGESEL_SHIFT   0
 
#define _IDAC_CURPROG_RESETVALUE   0x00000000UL
 
#define _IDAC_CURPROG_STEPSEL_DEFAULT   0x00000000UL
 
#define _IDAC_CURPROG_STEPSEL_MASK   0x1F00UL
 
#define _IDAC_CURPROG_STEPSEL_SHIFT   8
 
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT   0x00000000UL
 
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK   0x1UL
 
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT   0
 
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT   0x00000000UL
 
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK   0x2UL
 
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT   1
 
#define _IDAC_DUTYCONFIG_MASK   0x00000003UL
 
#define _IDAC_DUTYCONFIG_RESETVALUE   0x00000000UL
 
#define IDAC_CAL_TUNING_DEFAULT   (_IDAC_CAL_TUNING_DEFAULT << 0)
 
#define IDAC_CTRL_CURSINK   (0x1UL << 1)
 
#define IDAC_CTRL_CURSINK_DEFAULT   (_IDAC_CTRL_CURSINK_DEFAULT << 1)
 
#define IDAC_CTRL_EN   (0x1UL << 0)
 
#define IDAC_CTRL_EN_DEFAULT   (_IDAC_CTRL_EN_DEFAULT << 0)
 
#define IDAC_CTRL_MINOUTTRANS   (0x1UL << 2)
 
#define IDAC_CTRL_MINOUTTRANS_DEFAULT   (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)
 
#define IDAC_CTRL_OUTEN   (0x1UL << 3)
 
#define IDAC_CTRL_OUTEN_DEFAULT   (_IDAC_CTRL_OUTEN_DEFAULT << 3)
 
#define IDAC_CTRL_OUTENPRS   (0x1UL << 18)
 
#define IDAC_CTRL_OUTENPRS_DEFAULT   (_IDAC_CTRL_OUTENPRS_DEFAULT << 18)
 
#define IDAC_CTRL_OUTMODE   (0x1UL << 4)
 
#define IDAC_CTRL_OUTMODE_ADC   (_IDAC_CTRL_OUTMODE_ADC << 4)
 
#define IDAC_CTRL_OUTMODE_DEFAULT   (_IDAC_CTRL_OUTMODE_DEFAULT << 4)
 
#define IDAC_CTRL_OUTMODE_PIN   (_IDAC_CTRL_OUTMODE_PIN << 4)
 
#define IDAC_CTRL_PRSSEL_DEFAULT   (_IDAC_CTRL_PRSSEL_DEFAULT << 20)
 
#define IDAC_CTRL_PRSSEL_PRSCH0   (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)
 
#define IDAC_CTRL_PRSSEL_PRSCH1   (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)
 
#define IDAC_CTRL_PRSSEL_PRSCH2   (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)
 
#define IDAC_CTRL_PRSSEL_PRSCH3   (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)
 
#define IDAC_CURPROG_RANGESEL_DEFAULT   (_IDAC_CURPROG_RANGESEL_DEFAULT << 0)
 
#define IDAC_CURPROG_RANGESEL_RANGE0   (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)
 
#define IDAC_CURPROG_RANGESEL_RANGE1   (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)
 
#define IDAC_CURPROG_RANGESEL_RANGE2   (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)
 
#define IDAC_CURPROG_RANGESEL_RANGE3   (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)
 
#define IDAC_CURPROG_STEPSEL_DEFAULT   (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)
 
#define IDAC_DUTYCONFIG_DUTYCYCLEEN   (0x1UL << 0)
 
#define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT   (_IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)
 
#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS   (0x1UL << 1)
 
#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT   (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)