EFM32 Wonder Gecko Software Documentation  efm32wg-doc-5.1.2
PCNT

Detailed Description

Pulse Counter (PCNT) Peripheral API.

This module contains functions to control the PCNT peripheral of Silicon Labs 32-bit MCUs and SoCs. The PCNT decodes incoming pulses. The module has a quadrature mode which may be used to decode the speed and direction of a mechanical shaft.

Data Structures

struct  PCNT_Init_TypeDef
 

Macros

#define PCNT0_CNT_SIZE   (16) /* PCNT0 counter is 16 bits. */
 
#define PCNT1_CNT_SIZE   (8) /* PCNT1 counter is 8 bits. */
 
#define PCNT2_CNT_SIZE   (8) /* PCNT2 counter is 8 bits. */
 
#define PCNT_INIT_DEFAULT
 

Enumerations

enum  PCNT_CntEvent_TypeDef {
  pcntCntEventBoth = _PCNT_CTRL_CNTEV_BOTH,
  pcntCntEventUp = _PCNT_CTRL_CNTEV_UP,
  pcntCntEventDown = _PCNT_CTRL_CNTEV_DOWN,
  pcntCntEventNone = _PCNT_CTRL_CNTEV_NONE
}
 
enum  PCNT_Mode_TypeDef {
  pcntModeDisable = _PCNT_CTRL_MODE_DISABLE,
  pcntModeOvsSingle = _PCNT_CTRL_MODE_OVSSINGLE,
  pcntModeExtSingle = _PCNT_CTRL_MODE_EXTCLKSINGLE,
  pcntModeExtQuad = _PCNT_CTRL_MODE_EXTCLKQUAD
}
 
enum  PCNT_PRSInput_TypeDef {
  pcntPRSInputS0 = 0,
  pcntPRSInputS1 = 1
}
 
enum  PCNT_PRSSel_TypeDef {
  pcntPRSCh0 = 0,
  pcntPRSCh1 = 1,
  pcntPRSCh2 = 2,
  pcntPRSCh3 = 3,
  pcntPRSCh4 = 4,
  pcntPRSCh5 = 5,
  pcntPRSCh6 = 6,
  pcntPRSCh7 = 7,
  pcntPRSCh8 = 8,
  pcntPRSCh9 = 9,
  pcntPRSCh10 = 10,
  pcntPRSCh11 = 11
}
 

Functions

__STATIC_INLINE uint32_t PCNT_AuxCounterGet (PCNT_TypeDef *pcnt)
 Get auxiliary counter value. More...
 
__STATIC_INLINE uint32_t PCNT_CounterGet (PCNT_TypeDef *pcnt)
 Get pulse counter value. More...
 
void PCNT_CounterReset (PCNT_TypeDef *pcnt)
 Reset PCNT counters and TOP register. More...
 
__STATIC_INLINE void PCNT_CounterSet (PCNT_TypeDef *pcnt, uint32_t count)
 Set counter value. More...
 
void PCNT_CounterTopSet (PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)
 Set counter and top values. More...
 
void PCNT_Enable (PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode)
 Set PCNT operational mode. More...
 
void PCNT_FreezeEnable (PCNT_TypeDef *pcnt, bool enable)
 PCNT register synchronization freeze control. More...
 
void PCNT_Init (PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init)
 Init pulse counter. More...
 
__STATIC_INLINE void PCNT_IntClear (PCNT_TypeDef *pcnt, uint32_t flags)
 Clear one or more pending PCNT interrupts. More...
 
__STATIC_INLINE void PCNT_IntDisable (PCNT_TypeDef *pcnt, uint32_t flags)
 Disable one or more PCNT interrupts. More...
 
__STATIC_INLINE void PCNT_IntEnable (PCNT_TypeDef *pcnt, uint32_t flags)
 Enable one or more PCNT interrupts. More...
 
__STATIC_INLINE uint32_t PCNT_IntGet (PCNT_TypeDef *pcnt)
 Get pending PCNT interrupt flags. More...
 
__STATIC_INLINE uint32_t PCNT_IntGetEnabled (PCNT_TypeDef *pcnt)
 Get enabled and pending PCNT interrupt flags. More...
 
__STATIC_INLINE void PCNT_IntSet (PCNT_TypeDef *pcnt, uint32_t flags)
 Set one or more pending PCNT interrupts from SW. More...
 
void PCNT_PRSInputEnable (PCNT_TypeDef *pcnt, PCNT_PRSInput_TypeDef prsInput, bool enable)
 Enable/disable the selected PRS input of PCNT. More...
 
void PCNT_Reset (PCNT_TypeDef *pcnt)
 Reset PCNT to same state as after a HW reset. More...
 
__STATIC_INLINE uint32_t PCNT_TopBufferGet (PCNT_TypeDef *pcnt)
 Get pulse counter top buffer value. More...
 
void PCNT_TopBufferSet (PCNT_TypeDef *pcnt, uint32_t val)
 Set top buffer value. More...
 
__STATIC_INLINE uint32_t PCNT_TopGet (PCNT_TypeDef *pcnt)
 Get pulse counter top value. More...
 
void PCNT_TopSet (PCNT_TypeDef *pcnt, uint32_t val)
 Set top value. More...
 

Macro Definition Documentation

#define PCNT0_CNT_SIZE   (16) /* PCNT0 counter is 16 bits. */

PCNT0 Counter register size.

Definition at line 62 of file em_pcnt.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define PCNT1_CNT_SIZE   (8) /* PCNT1 counter is 8 bits. */

PCNT1 Counter register size.

Definition at line 67 of file em_pcnt.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define PCNT2_CNT_SIZE   (8) /* PCNT2 counter is 8 bits. */

PCNT2 Counter register size.

Definition at line 72 of file em_pcnt.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define PCNT_INIT_DEFAULT
Value:
{ \
pcntModeDisable, /* Disabled by default. */ \
_PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
_PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
false, /* Use positive edge. */ \
false, /* Up-counting. */ \
false, /* Filter disabled. */ \
false, /* Hysteresis disabled. */ \
true, /* Counter direction is given by CNTDIR. */ \
pcntCntEventUp, /* Regular counter counts up on upcount events. */ \
pcntCntEventNone, /* Auxiliary counter doesn't respond to events. */ \
pcntPRSCh0, /* PRS channel 0 selected as S0IN. */ \
pcntPRSCh0 /* PRS channel 0 selected as S1IN. */ \
}
#define _PCNT_CNT_RESETVALUE
Definition: efm32wg_pcnt.h:174
#define _PCNT_TOP_RESETVALUE
Definition: efm32wg_pcnt.h:182

Default config for PCNT init structure.

Definition at line 248 of file em_pcnt.h.

Enumeration Type Documentation

Counter event selection. Note: unshifted values are being used for enumeration because multiple configuration structure members use this type definition.

Enumerator
pcntCntEventBoth 

Counts up on up-count and down on down-count events.

pcntCntEventUp 

Only counts up on up-count events.

pcntCntEventDown 

Only counts down on down-count events.

pcntCntEventNone 

Never counts.

Definition at line 112 of file em_pcnt.h.

Mode selection.

Enumerator
pcntModeDisable 

Disable pulse counter.

pcntModeOvsSingle 

Single input LFACLK oversampling mode (available in EM0-EM2).

pcntModeExtSingle 

Externally clocked single input counter mode (available in EM0-EM3).

pcntModeExtQuad 

Externally clocked quadrature decoder mode (available in EM0-EM3).

Definition at line 81 of file em_pcnt.h.

PRS inputs of PCNT.

Enumerator
pcntPRSInputS1 

PRS input 0.

Definition at line 165 of file em_pcnt.h.

PRS sources for s0PRS and s1PRS.

Enumerator
pcntPRSCh0 

PRS channel 0.

pcntPRSCh1 

PRS channel 1.

pcntPRSCh2 

PRS channel 2.

pcntPRSCh3 

PRS channel 3.

pcntPRSCh4 

PRS channel 4.

pcntPRSCh5 

PRS channel 5.

pcntPRSCh6 

PRS channel 6.

pcntPRSCh7 

PRS channel 7.

pcntPRSCh8 

PRS channel 8.

pcntPRSCh9 

PRS channel 9.

pcntPRSCh10 

PRS channel 10.

pcntPRSCh11 

PRS channel 11.

Definition at line 131 of file em_pcnt.h.

Function Documentation

__STATIC_INLINE uint32_t PCNT_AuxCounterGet ( PCNT_TypeDef pcnt)

Get auxiliary counter value.

Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
Current auxiliary counter value.

Definition at line 401 of file em_pcnt.h.

References PCNT_TypeDef::AUXCNT.

__STATIC_INLINE uint32_t PCNT_CounterGet ( PCNT_TypeDef pcnt)

Get pulse counter value.

Default config for PCNT init structure.

Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
Current pulse counter value.

Definition at line 385 of file em_pcnt.h.

References PCNT_TypeDef::CNT.

void PCNT_CounterReset ( PCNT_TypeDef pcnt)

Reset PCNT counters and TOP register.

Note
Notice that special SYNCBUSY handling is not applicable for the RSTEN bit of the control register, so we don't need to wait for it when only modifying RSTEN. (It would mean undefined wait time if clocked by external clock.) The SYNCBUSY bit will however be set, leading to a synchronization in the LF domain, with in reality no changes.
Parameters
[in]pcntPointer to PCNT peripheral register block.

Definition at line 146 of file em_pcnt.c.

References _PCNT_CTRL_RSTEN_SHIFT, BUS_RegBitWrite(), and PCNT_TypeDef::CTRL.

__STATIC_INLINE void PCNT_CounterSet ( PCNT_TypeDef pcnt,
uint32_t  count 
)

Set counter value.

The pulse counter is disabled while changing counter value, and reenabled (if originally enabled) when counter value has been set.

Note
This function will stall until synchronization to low frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module, since stall time may be undefined in that case. The counter should normally only be set when operating in (or about to enable) pcntModeOvsSingle mode.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]countValue to set in counter register.

Definition at line 431 of file em_pcnt.h.

References PCNT_CounterTopSet(), and PCNT_TypeDef::TOP.

void PCNT_CounterTopSet ( PCNT_TypeDef pcnt,
uint32_t  count,
uint32_t  top 
)

Set counter and top values.

The pulse counter is disabled while changing these values, and reenabled (if originally enabled) when values have been set.

Note
This function will stall until synchronization to low frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module, since stall time may be undefined in that case. The counter should normally only be set when operating in (or about to enable) pcntModeOvsSingle mode.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]countValue to set in counter register.
[in]topValue to set in top register.

Definition at line 182 of file em_pcnt.c.

References _PCNT_CTRL_MODE_MASK, PCNT_TypeDef::CMD, PCNT_TypeDef::CTRL, PCNT0, PCNT0_CNT_SIZE, PCNT1, PCNT1_CNT_SIZE, PCNT2, PCNT2_CNT_SIZE, PCNT_CMD_LCNTIM, PCNT_CMD_LTOPBIM, PCNT_CTRL_MODE_DISABLE, PCNT_SYNCBUSY_CMD, PCNT_SYNCBUSY_CTRL, PCNT_SYNCBUSY_TOPB, and PCNT_TypeDef::TOPB.

Referenced by PCNT_CounterSet(), and PCNT_Init().

void PCNT_Enable ( PCNT_TypeDef pcnt,
PCNT_Mode_TypeDef  mode 
)

Set PCNT operational mode.

Notice that this function does not do any configuration. Setting operational mode is normally only required after initialization is done, and if not done as part of initialization. Or if requiring to disable/reenable pulse counter.

Note
This function may stall until synchronization to low frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module, since stall time may be undefined in that case.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]modeOperational mode to use for PCNT.

Definition at line 284 of file em_pcnt.c.

References _PCNT_CTRL_MODE_MASK, _PCNT_CTRL_MODE_SHIFT, PCNT_TypeDef::CTRL, and PCNT_SYNCBUSY_CTRL.

void PCNT_FreezeEnable ( PCNT_TypeDef pcnt,
bool  enable 
)

PCNT register synchronization freeze control.

Some PCNT registers require synchronization into the low frequency (LF) domain. The freeze feature allows for several such registers to be modified before passing them to the LF domain simultaneously (which takes place when the freeze mode is disabled).

Note
When enabling freeze mode, this function will wait for all current ongoing PCNT synchronization to LF domain to complete (Normally synchronization will not be in progress.) However for this reason, when using freeze mode, modifications of registers requiring LF synchronization should be done within one freeze enable/disable block to avoid unecessary stalling.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]enable
  • true - enable freeze, modified registers are not propagated to the LF domain
  • false - disables freeze, modified registers are propagated to LF domain

Definition at line 371 of file em_pcnt.c.

References PCNT_TypeDef::FREEZE, PCNT_FREEZE_REGFREEZE, and PCNT_TypeDef::SYNCBUSY.

void PCNT_Init ( PCNT_TypeDef pcnt,
const PCNT_Init_TypeDef init 
)

Init pulse counter.

This function will configure the pulse counter. The clock selection is configured as follows, depending on operational mode:

Notice that the LFACLK must be enabled in all modes, since some basic setup is done with this clock even if external pin clock usage mode is chosen. The pulse counter clock for the selected instance must also be enabled prior to init.

Notice that pins used by the PCNT module must be properly configured by the user explicitly through setting the ROUTE register, in order for the PCNT to work as intended.

Writing to CNT will not occur in external clock modes (EXTCLKQUAD and EXTCLKSINGLE) because the external clock rate is unknown. The user should handle it manually depending on the application

TOPB is written for all modes but in external clock mode it will take 3 external clock cycles to sync to TOP

Note
Initializing requires synchronization into the low frequency domain. This may cause some delay.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]initPointer to initialization structure used to initialize.

Definition at line 435 of file em_pcnt.c.

References _PCNT_CTRL_AUXCNTEV_SHIFT, _PCNT_CTRL_CNTEV_SHIFT, _PCNT_CTRL_MODE_MASK, _PCNT_CTRL_MODE_SHIFT, _PCNT_CTRL_RSTEN_SHIFT, _PCNT_INPUT_S0PRSSEL_MASK, _PCNT_INPUT_S0PRSSEL_SHIFT, _PCNT_INPUT_S1PRSSEL_MASK, _PCNT_INPUT_S1PRSSEL_SHIFT, PCNT_Init_TypeDef::auxCntEvent, BUS_RegBitWrite(), PCNT_TypeDef::CMD, CMU_PCNTClockExternalSet(), PCNT_Init_TypeDef::cntEvent, PCNT_Init_TypeDef::countDown, PCNT_Init_TypeDef::counter, PCNT_TypeDef::CTRL, PCNT_Init_TypeDef::filter, PCNT_Init_TypeDef::hyst, PCNT_TypeDef::INPUT, PCNT_Init_TypeDef::mode, PCNT_Init_TypeDef::negEdge, PCNT0, PCNT0_CNT_SIZE, PCNT1, PCNT1_CNT_SIZE, PCNT2, PCNT2_CNT_SIZE, PCNT_CMD_LTOPBIM, PCNT_CounterTopSet(), PCNT_CTRL_CNTDIR_DOWN, PCNT_CTRL_EDGE_NEG, PCNT_CTRL_FILT, PCNT_CTRL_HYST, PCNT_CTRL_MODE_DISABLE, PCNT_CTRL_RSTEN, PCNT_CTRL_S1CDIR, PCNT_SYNCBUSY_CTRL, pcntCntEventBoth, pcntCntEventDown, pcntCntEventNone, pcntCntEventUp, pcntModeExtQuad, pcntModeExtSingle, pcntModeOvsSingle, PCNT_Init_TypeDef::s0PRS, PCNT_Init_TypeDef::s1CntDir, PCNT_Init_TypeDef::s1PRS, PCNT_Init_TypeDef::top, and PCNT_TypeDef::TOPB.

__STATIC_INLINE void PCNT_IntClear ( PCNT_TypeDef pcnt,
uint32_t  flags 
)

Clear one or more pending PCNT interrupts.

Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]flagsPending PCNT interrupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 464 of file em_pcnt.h.

References PCNT_TypeDef::IFC.

__STATIC_INLINE void PCNT_IntDisable ( PCNT_TypeDef pcnt,
uint32_t  flags 
)

Disable one or more PCNT interrupts.

Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]flagsPCNT interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 480 of file em_pcnt.h.

References PCNT_TypeDef::IEN.

__STATIC_INLINE void PCNT_IntEnable ( PCNT_TypeDef pcnt,
uint32_t  flags 
)

Enable one or more PCNT interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. Consider using PCNT_IntClear() prior to enabling if such a pending interrupt should be ignored.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]flagsPCNT interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 501 of file em_pcnt.h.

References PCNT_TypeDef::IEN.

__STATIC_INLINE uint32_t PCNT_IntGet ( PCNT_TypeDef pcnt)

Get pending PCNT interrupt flags.

Note
The event bits are not cleared by the use of this function.
Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
PCNT interrupt sources pending. A bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 520 of file em_pcnt.h.

References PCNT_TypeDef::IF.

__STATIC_INLINE uint32_t PCNT_IntGetEnabled ( PCNT_TypeDef pcnt)

Get enabled and pending PCNT interrupt flags.

Useful for handling more interrupt sources in the same interrupt handler.

Note
The event bits are not cleared by the use of this function.
Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
Pending and enabled PCNT interrupt sources. The return value is the bitwise AND combination of
  • the OR combination of enabled interrupt sources in PCNT_IEN_nnn register (PCNT_IEN_nnn) and
  • the OR combination of valid interrupt flags of the PCNT module (PCNT_IF_nnn).

Definition at line 546 of file em_pcnt.h.

References PCNT_TypeDef::IEN, and PCNT_TypeDef::IF.

__STATIC_INLINE void PCNT_IntSet ( PCNT_TypeDef pcnt,
uint32_t  flags 
)

Set one or more pending PCNT interrupts from SW.

Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]flagsPCNT interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 570 of file em_pcnt.h.

References PCNT_TypeDef::IFS.

void PCNT_PRSInputEnable ( PCNT_TypeDef pcnt,
PCNT_PRSInput_TypeDef  prsInput,
bool  enable 
)

Enable/disable the selected PRS input of PCNT.

Notice that this function does not do any configuration.

Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]prsInputPRS input (S0 or S1) of the selected PCNT module.
[in]enableSet to true to enable, false to disable the selected PRS input.

Definition at line 316 of file em_pcnt.c.

References _PCNT_INPUT_S0PRSEN_SHIFT, _PCNT_INPUT_S1PRSEN_SHIFT, BUS_RegBitWrite(), PCNT_TypeDef::INPUT, and pcntPRSInputS1.

void PCNT_Reset ( PCNT_TypeDef pcnt)

Reset PCNT to same state as after a HW reset.

Notice the LFACLK must be enabled, since some basic reset is done with this clock. The pulse counter clock for the selected instance must also be enabled prior to init.

Note
The ROUTE register is NOT reset by this function, in order to allow for centralized setup of this feature.
Parameters
[in]pcntPointer to PCNT peripheral register block.

Definition at line 644 of file em_pcnt.c.

References _PCNT_CTRL_RESETVALUE, _PCNT_CTRL_RSTEN_SHIFT, _PCNT_IEN_RESETVALUE, _PCNT_IFC_MASK, _PCNT_TOPB_RESETVALUE, BUS_RegBitWrite(), CMU_PCNTClockExternalSet(), PCNT_TypeDef::CTRL, PCNT_TypeDef::IEN, PCNT_TypeDef::IFC, PCNT_CTRL_RSTEN, PCNT_SYNCBUSY_CTRL, and PCNT_TopBufferSet().

__STATIC_INLINE uint32_t PCNT_TopBufferGet ( PCNT_TypeDef pcnt)

Get pulse counter top buffer value.

Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
Current pulse counter top buffer value.

Definition at line 587 of file em_pcnt.h.

References PCNT_TypeDef::TOPB.

void PCNT_TopBufferSet ( PCNT_TypeDef pcnt,
uint32_t  val 
)

Set top buffer value.

Note
This function may stall until synchronization to low frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module, since stall time may be undefined in that case.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]valValue to set in top buffer register.

Definition at line 788 of file em_pcnt.c.

References PCNT_SYNCBUSY_TOPB, and PCNT_TypeDef::TOPB.

Referenced by PCNT_Reset().

__STATIC_INLINE uint32_t PCNT_TopGet ( PCNT_TypeDef pcnt)

Get pulse counter top value.

Parameters
[in]pcntPointer to PCNT peripheral register block.
Returns
Current pulse counter top value.

Definition at line 604 of file em_pcnt.h.

References PCNT_TypeDef::TOP.

void PCNT_TopSet ( PCNT_TypeDef pcnt,
uint32_t  val 
)

Set top value.

Note
This function will stall until synchronization to low frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module, since stall time may be undefined in that case.
Parameters
[in]pcntPointer to PCNT peripheral register block.
[in]valValue to set in top register.

Definition at line 814 of file em_pcnt.c.

References PCNT_TypeDef::CMD, PCNT0, PCNT0_CNT_SIZE, PCNT1, PCNT1_CNT_SIZE, PCNT2, PCNT2_CNT_SIZE, PCNT_CMD_LTOPBIM, PCNT_SYNCBUSY_CMD, PCNT_SYNCBUSY_TOPB, and PCNT_TypeDef::TOPB.