EFM32 Wonder Gecko Software Documentation  efm32wg-doc-5.1.2
EFM32WG_I2C_BitFields

Detailed Description

Macros

#define _I2C_CLKDIV_DIV_DEFAULT   0x00000000UL
 
#define _I2C_CLKDIV_DIV_MASK   0x1FFUL
 
#define _I2C_CLKDIV_DIV_SHIFT   0
 
#define _I2C_CLKDIV_MASK   0x000001FFUL
 
#define _I2C_CLKDIV_RESETVALUE   0x00000000UL
 
#define _I2C_CMD_ABORT_DEFAULT   0x00000000UL
 
#define _I2C_CMD_ABORT_MASK   0x20UL
 
#define _I2C_CMD_ABORT_SHIFT   5
 
#define _I2C_CMD_ACK_DEFAULT   0x00000000UL
 
#define _I2C_CMD_ACK_MASK   0x4UL
 
#define _I2C_CMD_ACK_SHIFT   2
 
#define _I2C_CMD_CLEARPC_DEFAULT   0x00000000UL
 
#define _I2C_CMD_CLEARPC_MASK   0x80UL
 
#define _I2C_CMD_CLEARPC_SHIFT   7
 
#define _I2C_CMD_CLEARTX_DEFAULT   0x00000000UL
 
#define _I2C_CMD_CLEARTX_MASK   0x40UL
 
#define _I2C_CMD_CLEARTX_SHIFT   6
 
#define _I2C_CMD_CONT_DEFAULT   0x00000000UL
 
#define _I2C_CMD_CONT_MASK   0x10UL
 
#define _I2C_CMD_CONT_SHIFT   4
 
#define _I2C_CMD_MASK   0x000000FFUL
 
#define _I2C_CMD_NACK_DEFAULT   0x00000000UL
 
#define _I2C_CMD_NACK_MASK   0x8UL
 
#define _I2C_CMD_NACK_SHIFT   3
 
#define _I2C_CMD_RESETVALUE   0x00000000UL
 
#define _I2C_CMD_START_DEFAULT   0x00000000UL
 
#define _I2C_CMD_START_MASK   0x1UL
 
#define _I2C_CMD_START_SHIFT   0
 
#define _I2C_CMD_STOP_DEFAULT   0x00000000UL
 
#define _I2C_CMD_STOP_MASK   0x2UL
 
#define _I2C_CMD_STOP_SHIFT   1
 
#define _I2C_CTRL_ARBDIS_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_ARBDIS_MASK   0x20UL
 
#define _I2C_CTRL_ARBDIS_SHIFT   5
 
#define _I2C_CTRL_AUTOACK_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_AUTOACK_MASK   0x4UL
 
#define _I2C_CTRL_AUTOACK_SHIFT   2
 
#define _I2C_CTRL_AUTOSE_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_AUTOSE_MASK   0x8UL
 
#define _I2C_CTRL_AUTOSE_SHIFT   3
 
#define _I2C_CTRL_AUTOSN_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_AUTOSN_MASK   0x10UL
 
#define _I2C_CTRL_AUTOSN_SHIFT   4
 
#define _I2C_CTRL_BITO_160PCC   0x00000003UL
 
#define _I2C_CTRL_BITO_40PCC   0x00000001UL
 
#define _I2C_CTRL_BITO_80PCC   0x00000002UL
 
#define _I2C_CTRL_BITO_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_BITO_MASK   0x3000UL
 
#define _I2C_CTRL_BITO_OFF   0x00000000UL
 
#define _I2C_CTRL_BITO_SHIFT   12
 
#define _I2C_CTRL_CLHR_ASYMMETRIC   0x00000001UL
 
#define _I2C_CTRL_CLHR_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_CLHR_FAST   0x00000002UL
 
#define _I2C_CTRL_CLHR_MASK   0x300UL
 
#define _I2C_CTRL_CLHR_SHIFT   8
 
#define _I2C_CTRL_CLHR_STANDARD   0x00000000UL
 
#define _I2C_CTRL_CLTO_1024PPC   0x00000005UL
 
#define _I2C_CTRL_CLTO_160PCC   0x00000003UL
 
#define _I2C_CTRL_CLTO_320PPC   0x00000004UL
 
#define _I2C_CTRL_CLTO_40PCC   0x00000001UL
 
#define _I2C_CTRL_CLTO_80PCC   0x00000002UL
 
#define _I2C_CTRL_CLTO_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_CLTO_MASK   0x70000UL
 
#define _I2C_CTRL_CLTO_OFF   0x00000000UL
 
#define _I2C_CTRL_CLTO_SHIFT   16
 
#define _I2C_CTRL_EN_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_EN_MASK   0x1UL
 
#define _I2C_CTRL_EN_SHIFT   0
 
#define _I2C_CTRL_GCAMEN_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_GCAMEN_MASK   0x40UL
 
#define _I2C_CTRL_GCAMEN_SHIFT   6
 
#define _I2C_CTRL_GIBITO_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_GIBITO_MASK   0x8000UL
 
#define _I2C_CTRL_GIBITO_SHIFT   15
 
#define _I2C_CTRL_MASK   0x0007B37FUL
 
#define _I2C_CTRL_RESETVALUE   0x00000000UL
 
#define _I2C_CTRL_SLAVE_DEFAULT   0x00000000UL
 
#define _I2C_CTRL_SLAVE_MASK   0x2UL
 
#define _I2C_CTRL_SLAVE_SHIFT   1
 
#define _I2C_IEN_ACK_DEFAULT   0x00000000UL
 
#define _I2C_IEN_ACK_MASK   0x40UL
 
#define _I2C_IEN_ACK_SHIFT   6
 
#define _I2C_IEN_ADDR_DEFAULT   0x00000000UL
 
#define _I2C_IEN_ADDR_MASK   0x4UL
 
#define _I2C_IEN_ADDR_SHIFT   2
 
#define _I2C_IEN_ARBLOST_DEFAULT   0x00000000UL
 
#define _I2C_IEN_ARBLOST_MASK   0x200UL
 
#define _I2C_IEN_ARBLOST_SHIFT   9
 
#define _I2C_IEN_BITO_DEFAULT   0x00000000UL
 
#define _I2C_IEN_BITO_MASK   0x4000UL
 
#define _I2C_IEN_BITO_SHIFT   14
 
#define _I2C_IEN_BUSERR_DEFAULT   0x00000000UL
 
#define _I2C_IEN_BUSERR_MASK   0x400UL
 
#define _I2C_IEN_BUSERR_SHIFT   10
 
#define _I2C_IEN_BUSHOLD_DEFAULT   0x00000000UL
 
#define _I2C_IEN_BUSHOLD_MASK   0x800UL
 
#define _I2C_IEN_BUSHOLD_SHIFT   11
 
#define _I2C_IEN_CLTO_DEFAULT   0x00000000UL
 
#define _I2C_IEN_CLTO_MASK   0x8000UL
 
#define _I2C_IEN_CLTO_SHIFT   15
 
#define _I2C_IEN_MASK   0x0001FFFFUL
 
#define _I2C_IEN_MSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IEN_MSTOP_MASK   0x100UL
 
#define _I2C_IEN_MSTOP_SHIFT   8
 
#define _I2C_IEN_NACK_DEFAULT   0x00000000UL
 
#define _I2C_IEN_NACK_MASK   0x80UL
 
#define _I2C_IEN_NACK_SHIFT   7
 
#define _I2C_IEN_RESETVALUE   0x00000000UL
 
#define _I2C_IEN_RSTART_DEFAULT   0x00000000UL
 
#define _I2C_IEN_RSTART_MASK   0x2UL
 
#define _I2C_IEN_RSTART_SHIFT   1
 
#define _I2C_IEN_RXDATAV_DEFAULT   0x00000000UL
 
#define _I2C_IEN_RXDATAV_MASK   0x20UL
 
#define _I2C_IEN_RXDATAV_SHIFT   5
 
#define _I2C_IEN_RXUF_DEFAULT   0x00000000UL
 
#define _I2C_IEN_RXUF_MASK   0x2000UL
 
#define _I2C_IEN_RXUF_SHIFT   13
 
#define _I2C_IEN_SSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IEN_SSTOP_MASK   0x10000UL
 
#define _I2C_IEN_SSTOP_SHIFT   16
 
#define _I2C_IEN_START_DEFAULT   0x00000000UL
 
#define _I2C_IEN_START_MASK   0x1UL
 
#define _I2C_IEN_START_SHIFT   0
 
#define _I2C_IEN_TXBL_DEFAULT   0x00000000UL
 
#define _I2C_IEN_TXBL_MASK   0x10UL
 
#define _I2C_IEN_TXBL_SHIFT   4
 
#define _I2C_IEN_TXC_DEFAULT   0x00000000UL
 
#define _I2C_IEN_TXC_MASK   0x8UL
 
#define _I2C_IEN_TXC_SHIFT   3
 
#define _I2C_IEN_TXOF_DEFAULT   0x00000000UL
 
#define _I2C_IEN_TXOF_MASK   0x1000UL
 
#define _I2C_IEN_TXOF_SHIFT   12
 
#define _I2C_IF_ACK_DEFAULT   0x00000000UL
 
#define _I2C_IF_ACK_MASK   0x40UL
 
#define _I2C_IF_ACK_SHIFT   6
 
#define _I2C_IF_ADDR_DEFAULT   0x00000000UL
 
#define _I2C_IF_ADDR_MASK   0x4UL
 
#define _I2C_IF_ADDR_SHIFT   2
 
#define _I2C_IF_ARBLOST_DEFAULT   0x00000000UL
 
#define _I2C_IF_ARBLOST_MASK   0x200UL
 
#define _I2C_IF_ARBLOST_SHIFT   9
 
#define _I2C_IF_BITO_DEFAULT   0x00000000UL
 
#define _I2C_IF_BITO_MASK   0x4000UL
 
#define _I2C_IF_BITO_SHIFT   14
 
#define _I2C_IF_BUSERR_DEFAULT   0x00000000UL
 
#define _I2C_IF_BUSERR_MASK   0x400UL
 
#define _I2C_IF_BUSERR_SHIFT   10
 
#define _I2C_IF_BUSHOLD_DEFAULT   0x00000000UL
 
#define _I2C_IF_BUSHOLD_MASK   0x800UL
 
#define _I2C_IF_BUSHOLD_SHIFT   11
 
#define _I2C_IF_CLTO_DEFAULT   0x00000000UL
 
#define _I2C_IF_CLTO_MASK   0x8000UL
 
#define _I2C_IF_CLTO_SHIFT   15
 
#define _I2C_IF_MASK   0x0001FFFFUL
 
#define _I2C_IF_MSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IF_MSTOP_MASK   0x100UL
 
#define _I2C_IF_MSTOP_SHIFT   8
 
#define _I2C_IF_NACK_DEFAULT   0x00000000UL
 
#define _I2C_IF_NACK_MASK   0x80UL
 
#define _I2C_IF_NACK_SHIFT   7
 
#define _I2C_IF_RESETVALUE   0x00000010UL
 
#define _I2C_IF_RSTART_DEFAULT   0x00000000UL
 
#define _I2C_IF_RSTART_MASK   0x2UL
 
#define _I2C_IF_RSTART_SHIFT   1
 
#define _I2C_IF_RXDATAV_DEFAULT   0x00000000UL
 
#define _I2C_IF_RXDATAV_MASK   0x20UL
 
#define _I2C_IF_RXDATAV_SHIFT   5
 
#define _I2C_IF_RXUF_DEFAULT   0x00000000UL
 
#define _I2C_IF_RXUF_MASK   0x2000UL
 
#define _I2C_IF_RXUF_SHIFT   13
 
#define _I2C_IF_SSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IF_SSTOP_MASK   0x10000UL
 
#define _I2C_IF_SSTOP_SHIFT   16
 
#define _I2C_IF_START_DEFAULT   0x00000000UL
 
#define _I2C_IF_START_MASK   0x1UL
 
#define _I2C_IF_START_SHIFT   0
 
#define _I2C_IF_TXBL_DEFAULT   0x00000000UL
 
#define _I2C_IF_TXBL_MASK   0x10UL
 
#define _I2C_IF_TXBL_SHIFT   4
 
#define _I2C_IF_TXC_DEFAULT   0x00000000UL
 
#define _I2C_IF_TXC_MASK   0x8UL
 
#define _I2C_IF_TXC_SHIFT   3
 
#define _I2C_IF_TXOF_DEFAULT   0x00000000UL
 
#define _I2C_IF_TXOF_MASK   0x1000UL
 
#define _I2C_IF_TXOF_SHIFT   12
 
#define _I2C_IFC_ACK_DEFAULT   0x00000000UL
 
#define _I2C_IFC_ACK_MASK   0x40UL
 
#define _I2C_IFC_ACK_SHIFT   6
 
#define _I2C_IFC_ADDR_DEFAULT   0x00000000UL
 
#define _I2C_IFC_ADDR_MASK   0x4UL
 
#define _I2C_IFC_ADDR_SHIFT   2
 
#define _I2C_IFC_ARBLOST_DEFAULT   0x00000000UL
 
#define _I2C_IFC_ARBLOST_MASK   0x200UL
 
#define _I2C_IFC_ARBLOST_SHIFT   9
 
#define _I2C_IFC_BITO_DEFAULT   0x00000000UL
 
#define _I2C_IFC_BITO_MASK   0x4000UL
 
#define _I2C_IFC_BITO_SHIFT   14
 
#define _I2C_IFC_BUSERR_DEFAULT   0x00000000UL
 
#define _I2C_IFC_BUSERR_MASK   0x400UL
 
#define _I2C_IFC_BUSERR_SHIFT   10
 
#define _I2C_IFC_BUSHOLD_DEFAULT   0x00000000UL
 
#define _I2C_IFC_BUSHOLD_MASK   0x800UL
 
#define _I2C_IFC_BUSHOLD_SHIFT   11
 
#define _I2C_IFC_CLTO_DEFAULT   0x00000000UL
 
#define _I2C_IFC_CLTO_MASK   0x8000UL
 
#define _I2C_IFC_CLTO_SHIFT   15
 
#define _I2C_IFC_MASK   0x0001FFCFUL
 
#define _I2C_IFC_MSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IFC_MSTOP_MASK   0x100UL
 
#define _I2C_IFC_MSTOP_SHIFT   8
 
#define _I2C_IFC_NACK_DEFAULT   0x00000000UL
 
#define _I2C_IFC_NACK_MASK   0x80UL
 
#define _I2C_IFC_NACK_SHIFT   7
 
#define _I2C_IFC_RESETVALUE   0x00000000UL
 
#define _I2C_IFC_RSTART_DEFAULT   0x00000000UL
 
#define _I2C_IFC_RSTART_MASK   0x2UL
 
#define _I2C_IFC_RSTART_SHIFT   1
 
#define _I2C_IFC_RXUF_DEFAULT   0x00000000UL
 
#define _I2C_IFC_RXUF_MASK   0x2000UL
 
#define _I2C_IFC_RXUF_SHIFT   13
 
#define _I2C_IFC_SSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IFC_SSTOP_MASK   0x10000UL
 
#define _I2C_IFC_SSTOP_SHIFT   16
 
#define _I2C_IFC_START_DEFAULT   0x00000000UL
 
#define _I2C_IFC_START_MASK   0x1UL
 
#define _I2C_IFC_START_SHIFT   0
 
#define _I2C_IFC_TXC_DEFAULT   0x00000000UL
 
#define _I2C_IFC_TXC_MASK   0x8UL
 
#define _I2C_IFC_TXC_SHIFT   3
 
#define _I2C_IFC_TXOF_DEFAULT   0x00000000UL
 
#define _I2C_IFC_TXOF_MASK   0x1000UL
 
#define _I2C_IFC_TXOF_SHIFT   12
 
#define _I2C_IFS_ACK_DEFAULT   0x00000000UL
 
#define _I2C_IFS_ACK_MASK   0x40UL
 
#define _I2C_IFS_ACK_SHIFT   6
 
#define _I2C_IFS_ADDR_DEFAULT   0x00000000UL
 
#define _I2C_IFS_ADDR_MASK   0x4UL
 
#define _I2C_IFS_ADDR_SHIFT   2
 
#define _I2C_IFS_ARBLOST_DEFAULT   0x00000000UL
 
#define _I2C_IFS_ARBLOST_MASK   0x200UL
 
#define _I2C_IFS_ARBLOST_SHIFT   9
 
#define _I2C_IFS_BITO_DEFAULT   0x00000000UL
 
#define _I2C_IFS_BITO_MASK   0x4000UL
 
#define _I2C_IFS_BITO_SHIFT   14
 
#define _I2C_IFS_BUSERR_DEFAULT   0x00000000UL
 
#define _I2C_IFS_BUSERR_MASK   0x400UL
 
#define _I2C_IFS_BUSERR_SHIFT   10
 
#define _I2C_IFS_BUSHOLD_DEFAULT   0x00000000UL
 
#define _I2C_IFS_BUSHOLD_MASK   0x800UL
 
#define _I2C_IFS_BUSHOLD_SHIFT   11
 
#define _I2C_IFS_CLTO_DEFAULT   0x00000000UL
 
#define _I2C_IFS_CLTO_MASK   0x8000UL
 
#define _I2C_IFS_CLTO_SHIFT   15
 
#define _I2C_IFS_MASK   0x0001FFCFUL
 
#define _I2C_IFS_MSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IFS_MSTOP_MASK   0x100UL
 
#define _I2C_IFS_MSTOP_SHIFT   8
 
#define _I2C_IFS_NACK_DEFAULT   0x00000000UL
 
#define _I2C_IFS_NACK_MASK   0x80UL
 
#define _I2C_IFS_NACK_SHIFT   7
 
#define _I2C_IFS_RESETVALUE   0x00000000UL
 
#define _I2C_IFS_RSTART_DEFAULT   0x00000000UL
 
#define _I2C_IFS_RSTART_MASK   0x2UL
 
#define _I2C_IFS_RSTART_SHIFT   1
 
#define _I2C_IFS_RXUF_DEFAULT   0x00000000UL
 
#define _I2C_IFS_RXUF_MASK   0x2000UL
 
#define _I2C_IFS_RXUF_SHIFT   13
 
#define _I2C_IFS_SSTOP_DEFAULT   0x00000000UL
 
#define _I2C_IFS_SSTOP_MASK   0x10000UL
 
#define _I2C_IFS_SSTOP_SHIFT   16
 
#define _I2C_IFS_START_DEFAULT   0x00000000UL
 
#define _I2C_IFS_START_MASK   0x1UL
 
#define _I2C_IFS_START_SHIFT   0
 
#define _I2C_IFS_TXC_DEFAULT   0x00000000UL
 
#define _I2C_IFS_TXC_MASK   0x8UL
 
#define _I2C_IFS_TXC_SHIFT   3
 
#define _I2C_IFS_TXOF_DEFAULT   0x00000000UL
 
#define _I2C_IFS_TXOF_MASK   0x1000UL
 
#define _I2C_IFS_TXOF_SHIFT   12
 
#define _I2C_ROUTE_LOCATION_DEFAULT   0x00000000UL
 
#define _I2C_ROUTE_LOCATION_LOC0   0x00000000UL
 
#define _I2C_ROUTE_LOCATION_LOC1   0x00000001UL
 
#define _I2C_ROUTE_LOCATION_LOC2   0x00000002UL
 
#define _I2C_ROUTE_LOCATION_LOC3   0x00000003UL
 
#define _I2C_ROUTE_LOCATION_LOC4   0x00000004UL
 
#define _I2C_ROUTE_LOCATION_LOC5   0x00000005UL
 
#define _I2C_ROUTE_LOCATION_LOC6   0x00000006UL
 
#define _I2C_ROUTE_LOCATION_MASK   0x700UL
 
#define _I2C_ROUTE_LOCATION_SHIFT   8
 
#define _I2C_ROUTE_MASK   0x00000703UL
 
#define _I2C_ROUTE_RESETVALUE   0x00000000UL
 
#define _I2C_ROUTE_SCLPEN_DEFAULT   0x00000000UL
 
#define _I2C_ROUTE_SCLPEN_MASK   0x2UL
 
#define _I2C_ROUTE_SCLPEN_SHIFT   1
 
#define _I2C_ROUTE_SDAPEN_DEFAULT   0x00000000UL
 
#define _I2C_ROUTE_SDAPEN_MASK   0x1UL
 
#define _I2C_ROUTE_SDAPEN_SHIFT   0
 
#define _I2C_RXDATA_MASK   0x000000FFUL
 
#define _I2C_RXDATA_RESETVALUE   0x00000000UL
 
#define _I2C_RXDATA_RXDATA_DEFAULT   0x00000000UL
 
#define _I2C_RXDATA_RXDATA_MASK   0xFFUL
 
#define _I2C_RXDATA_RXDATA_SHIFT   0
 
#define _I2C_RXDATAP_MASK   0x000000FFUL
 
#define _I2C_RXDATAP_RESETVALUE   0x00000000UL
 
#define _I2C_RXDATAP_RXDATAP_DEFAULT   0x00000000UL
 
#define _I2C_RXDATAP_RXDATAP_MASK   0xFFUL
 
#define _I2C_RXDATAP_RXDATAP_SHIFT   0
 
#define _I2C_SADDR_ADDR_DEFAULT   0x00000000UL
 
#define _I2C_SADDR_ADDR_MASK   0xFEUL
 
#define _I2C_SADDR_ADDR_SHIFT   1
 
#define _I2C_SADDR_MASK   0x000000FEUL
 
#define _I2C_SADDR_RESETVALUE   0x00000000UL
 
#define _I2C_SADDRMASK_MASK   0x000000FEUL
 
#define _I2C_SADDRMASK_MASK_DEFAULT   0x00000000UL
 
#define _I2C_SADDRMASK_MASK_MASK   0xFEUL
 
#define _I2C_SADDRMASK_MASK_SHIFT   1
 
#define _I2C_SADDRMASK_RESETVALUE   0x00000000UL
 
#define _I2C_STATE_BUSHOLD_DEFAULT   0x00000000UL
 
#define _I2C_STATE_BUSHOLD_MASK   0x10UL
 
#define _I2C_STATE_BUSHOLD_SHIFT   4
 
#define _I2C_STATE_BUSY_DEFAULT   0x00000001UL
 
#define _I2C_STATE_BUSY_MASK   0x1UL
 
#define _I2C_STATE_BUSY_SHIFT   0
 
#define _I2C_STATE_MASK   0x000000FFUL
 
#define _I2C_STATE_MASTER_DEFAULT   0x00000000UL
 
#define _I2C_STATE_MASTER_MASK   0x2UL
 
#define _I2C_STATE_MASTER_SHIFT   1
 
#define _I2C_STATE_NACKED_DEFAULT   0x00000000UL
 
#define _I2C_STATE_NACKED_MASK   0x8UL
 
#define _I2C_STATE_NACKED_SHIFT   3
 
#define _I2C_STATE_RESETVALUE   0x00000001UL
 
#define _I2C_STATE_STATE_ADDR   0x00000003UL
 
#define _I2C_STATE_STATE_ADDRACK   0x00000004UL
 
#define _I2C_STATE_STATE_DATA   0x00000005UL
 
#define _I2C_STATE_STATE_DATAACK   0x00000006UL
 
#define _I2C_STATE_STATE_DEFAULT   0x00000000UL
 
#define _I2C_STATE_STATE_IDLE   0x00000000UL
 
#define _I2C_STATE_STATE_MASK   0xE0UL
 
#define _I2C_STATE_STATE_SHIFT   5
 
#define _I2C_STATE_STATE_START   0x00000002UL
 
#define _I2C_STATE_STATE_WAIT   0x00000001UL
 
#define _I2C_STATE_TRANSMITTER_DEFAULT   0x00000000UL
 
#define _I2C_STATE_TRANSMITTER_MASK   0x4UL
 
#define _I2C_STATE_TRANSMITTER_SHIFT   2
 
#define _I2C_STATUS_MASK   0x000001FFUL
 
#define _I2C_STATUS_PABORT_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PABORT_MASK   0x20UL
 
#define _I2C_STATUS_PABORT_SHIFT   5
 
#define _I2C_STATUS_PACK_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PACK_MASK   0x4UL
 
#define _I2C_STATUS_PACK_SHIFT   2
 
#define _I2C_STATUS_PCONT_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PCONT_MASK   0x10UL
 
#define _I2C_STATUS_PCONT_SHIFT   4
 
#define _I2C_STATUS_PNACK_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PNACK_MASK   0x8UL
 
#define _I2C_STATUS_PNACK_SHIFT   3
 
#define _I2C_STATUS_PSTART_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PSTART_MASK   0x1UL
 
#define _I2C_STATUS_PSTART_SHIFT   0
 
#define _I2C_STATUS_PSTOP_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_PSTOP_MASK   0x2UL
 
#define _I2C_STATUS_PSTOP_SHIFT   1
 
#define _I2C_STATUS_RESETVALUE   0x00000080UL
 
#define _I2C_STATUS_RXDATAV_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_RXDATAV_MASK   0x100UL
 
#define _I2C_STATUS_RXDATAV_SHIFT   8
 
#define _I2C_STATUS_TXBL_DEFAULT   0x00000001UL
 
#define _I2C_STATUS_TXBL_MASK   0x80UL
 
#define _I2C_STATUS_TXBL_SHIFT   7
 
#define _I2C_STATUS_TXC_DEFAULT   0x00000000UL
 
#define _I2C_STATUS_TXC_MASK   0x40UL
 
#define _I2C_STATUS_TXC_SHIFT   6
 
#define _I2C_TXDATA_MASK   0x000000FFUL
 
#define _I2C_TXDATA_RESETVALUE   0x00000000UL
 
#define _I2C_TXDATA_TXDATA_DEFAULT   0x00000000UL
 
#define _I2C_TXDATA_TXDATA_MASK   0xFFUL
 
#define _I2C_TXDATA_TXDATA_SHIFT   0
 
#define I2C_CLKDIV_DIV_DEFAULT   (_I2C_CLKDIV_DIV_DEFAULT << 0)
 
#define I2C_CMD_ABORT   (0x1UL << 5)
 
#define I2C_CMD_ABORT_DEFAULT   (_I2C_CMD_ABORT_DEFAULT << 5)
 
#define I2C_CMD_ACK   (0x1UL << 2)
 
#define I2C_CMD_ACK_DEFAULT   (_I2C_CMD_ACK_DEFAULT << 2)
 
#define I2C_CMD_CLEARPC   (0x1UL << 7)
 
#define I2C_CMD_CLEARPC_DEFAULT   (_I2C_CMD_CLEARPC_DEFAULT << 7)
 
#define I2C_CMD_CLEARTX   (0x1UL << 6)
 
#define I2C_CMD_CLEARTX_DEFAULT   (_I2C_CMD_CLEARTX_DEFAULT << 6)
 
#define I2C_CMD_CONT   (0x1UL << 4)
 
#define I2C_CMD_CONT_DEFAULT   (_I2C_CMD_CONT_DEFAULT << 4)
 
#define I2C_CMD_NACK   (0x1UL << 3)
 
#define I2C_CMD_NACK_DEFAULT   (_I2C_CMD_NACK_DEFAULT << 3)
 
#define I2C_CMD_START   (0x1UL << 0)
 
#define I2C_CMD_START_DEFAULT   (_I2C_CMD_START_DEFAULT << 0)
 
#define I2C_CMD_STOP   (0x1UL << 1)
 
#define I2C_CMD_STOP_DEFAULT   (_I2C_CMD_STOP_DEFAULT << 1)
 
#define I2C_CTRL_ARBDIS   (0x1UL << 5)
 
#define I2C_CTRL_ARBDIS_DEFAULT   (_I2C_CTRL_ARBDIS_DEFAULT << 5)
 
#define I2C_CTRL_AUTOACK   (0x1UL << 2)
 
#define I2C_CTRL_AUTOACK_DEFAULT   (_I2C_CTRL_AUTOACK_DEFAULT << 2)
 
#define I2C_CTRL_AUTOSE   (0x1UL << 3)
 
#define I2C_CTRL_AUTOSE_DEFAULT   (_I2C_CTRL_AUTOSE_DEFAULT << 3)
 
#define I2C_CTRL_AUTOSN   (0x1UL << 4)
 
#define I2C_CTRL_AUTOSN_DEFAULT   (_I2C_CTRL_AUTOSN_DEFAULT << 4)
 
#define I2C_CTRL_BITO_160PCC   (_I2C_CTRL_BITO_160PCC << 12)
 
#define I2C_CTRL_BITO_40PCC   (_I2C_CTRL_BITO_40PCC << 12)
 
#define I2C_CTRL_BITO_80PCC   (_I2C_CTRL_BITO_80PCC << 12)
 
#define I2C_CTRL_BITO_DEFAULT   (_I2C_CTRL_BITO_DEFAULT << 12)
 
#define I2C_CTRL_BITO_OFF   (_I2C_CTRL_BITO_OFF << 12)
 
#define I2C_CTRL_CLHR_ASYMMETRIC   (_I2C_CTRL_CLHR_ASYMMETRIC << 8)
 
#define I2C_CTRL_CLHR_DEFAULT   (_I2C_CTRL_CLHR_DEFAULT << 8)
 
#define I2C_CTRL_CLHR_FAST   (_I2C_CTRL_CLHR_FAST << 8)
 
#define I2C_CTRL_CLHR_STANDARD   (_I2C_CTRL_CLHR_STANDARD << 8)
 
#define I2C_CTRL_CLTO_1024PPC   (_I2C_CTRL_CLTO_1024PPC << 16)
 
#define I2C_CTRL_CLTO_160PCC   (_I2C_CTRL_CLTO_160PCC << 16)
 
#define I2C_CTRL_CLTO_320PPC   (_I2C_CTRL_CLTO_320PPC << 16)
 
#define I2C_CTRL_CLTO_40PCC   (_I2C_CTRL_CLTO_40PCC << 16)
 
#define I2C_CTRL_CLTO_80PCC   (_I2C_CTRL_CLTO_80PCC << 16)
 
#define I2C_CTRL_CLTO_DEFAULT   (_I2C_CTRL_CLTO_DEFAULT << 16)
 
#define I2C_CTRL_CLTO_OFF   (_I2C_CTRL_CLTO_OFF << 16)
 
#define I2C_CTRL_EN   (0x1UL << 0)
 
#define I2C_CTRL_EN_DEFAULT   (_I2C_CTRL_EN_DEFAULT << 0)
 
#define I2C_CTRL_GCAMEN   (0x1UL << 6)
 
#define I2C_CTRL_GCAMEN_DEFAULT   (_I2C_CTRL_GCAMEN_DEFAULT << 6)
 
#define I2C_CTRL_GIBITO   (0x1UL << 15)
 
#define I2C_CTRL_GIBITO_DEFAULT   (_I2C_CTRL_GIBITO_DEFAULT << 15)
 
#define I2C_CTRL_SLAVE   (0x1UL << 1)
 
#define I2C_CTRL_SLAVE_DEFAULT   (_I2C_CTRL_SLAVE_DEFAULT << 1)
 
#define I2C_IEN_ACK   (0x1UL << 6)
 
#define I2C_IEN_ACK_DEFAULT   (_I2C_IEN_ACK_DEFAULT << 6)
 
#define I2C_IEN_ADDR   (0x1UL << 2)
 
#define I2C_IEN_ADDR_DEFAULT   (_I2C_IEN_ADDR_DEFAULT << 2)
 
#define I2C_IEN_ARBLOST   (0x1UL << 9)
 
#define I2C_IEN_ARBLOST_DEFAULT   (_I2C_IEN_ARBLOST_DEFAULT << 9)
 
#define I2C_IEN_BITO   (0x1UL << 14)
 
#define I2C_IEN_BITO_DEFAULT   (_I2C_IEN_BITO_DEFAULT << 14)
 
#define I2C_IEN_BUSERR   (0x1UL << 10)
 
#define I2C_IEN_BUSERR_DEFAULT   (_I2C_IEN_BUSERR_DEFAULT << 10)
 
#define I2C_IEN_BUSHOLD   (0x1UL << 11)
 
#define I2C_IEN_BUSHOLD_DEFAULT   (_I2C_IEN_BUSHOLD_DEFAULT << 11)
 
#define I2C_IEN_CLTO   (0x1UL << 15)
 
#define I2C_IEN_CLTO_DEFAULT   (_I2C_IEN_CLTO_DEFAULT << 15)
 
#define I2C_IEN_MSTOP   (0x1UL << 8)
 
#define I2C_IEN_MSTOP_DEFAULT   (_I2C_IEN_MSTOP_DEFAULT << 8)
 
#define I2C_IEN_NACK   (0x1UL << 7)
 
#define I2C_IEN_NACK_DEFAULT   (_I2C_IEN_NACK_DEFAULT << 7)
 
#define I2C_IEN_RSTART   (0x1UL << 1)
 
#define I2C_IEN_RSTART_DEFAULT   (_I2C_IEN_RSTART_DEFAULT << 1)
 
#define I2C_IEN_RXDATAV   (0x1UL << 5)
 
#define I2C_IEN_RXDATAV_DEFAULT   (_I2C_IEN_RXDATAV_DEFAULT << 5)
 
#define I2C_IEN_RXUF   (0x1UL << 13)
 
#define I2C_IEN_RXUF_DEFAULT   (_I2C_IEN_RXUF_DEFAULT << 13)
 
#define I2C_IEN_SSTOP   (0x1UL << 16)
 
#define I2C_IEN_SSTOP_DEFAULT   (_I2C_IEN_SSTOP_DEFAULT << 16)
 
#define I2C_IEN_START   (0x1UL << 0)
 
#define I2C_IEN_START_DEFAULT   (_I2C_IEN_START_DEFAULT << 0)
 
#define I2C_IEN_TXBL   (0x1UL << 4)
 
#define I2C_IEN_TXBL_DEFAULT   (_I2C_IEN_TXBL_DEFAULT << 4)
 
#define I2C_IEN_TXC   (0x1UL << 3)
 
#define I2C_IEN_TXC_DEFAULT   (_I2C_IEN_TXC_DEFAULT << 3)
 
#define I2C_IEN_TXOF   (0x1UL << 12)
 
#define I2C_IEN_TXOF_DEFAULT   (_I2C_IEN_TXOF_DEFAULT << 12)
 
#define I2C_IF_ACK   (0x1UL << 6)
 
#define I2C_IF_ACK_DEFAULT   (_I2C_IF_ACK_DEFAULT << 6)
 
#define I2C_IF_ADDR   (0x1UL << 2)
 
#define I2C_IF_ADDR_DEFAULT   (_I2C_IF_ADDR_DEFAULT << 2)
 
#define I2C_IF_ARBLOST   (0x1UL << 9)
 
#define I2C_IF_ARBLOST_DEFAULT   (_I2C_IF_ARBLOST_DEFAULT << 9)
 
#define I2C_IF_BITO   (0x1UL << 14)
 
#define I2C_IF_BITO_DEFAULT   (_I2C_IF_BITO_DEFAULT << 14)
 
#define I2C_IF_BUSERR   (0x1UL << 10)
 
#define I2C_IF_BUSERR_DEFAULT   (_I2C_IF_BUSERR_DEFAULT << 10)
 
#define I2C_IF_BUSHOLD   (0x1UL << 11)
 
#define I2C_IF_BUSHOLD_DEFAULT   (_I2C_IF_BUSHOLD_DEFAULT << 11)
 
#define I2C_IF_CLTO   (0x1UL << 15)
 
#define I2C_IF_CLTO_DEFAULT   (_I2C_IF_CLTO_DEFAULT << 15)
 
#define I2C_IF_MSTOP   (0x1UL << 8)
 
#define I2C_IF_MSTOP_DEFAULT   (_I2C_IF_MSTOP_DEFAULT << 8)
 
#define I2C_IF_NACK   (0x1UL << 7)
 
#define I2C_IF_NACK_DEFAULT   (_I2C_IF_NACK_DEFAULT << 7)
 
#define I2C_IF_RSTART   (0x1UL << 1)
 
#define I2C_IF_RSTART_DEFAULT   (_I2C_IF_RSTART_DEFAULT << 1)
 
#define I2C_IF_RXDATAV   (0x1UL << 5)
 
#define I2C_IF_RXDATAV_DEFAULT   (_I2C_IF_RXDATAV_DEFAULT << 5)
 
#define I2C_IF_RXUF   (0x1UL << 13)
 
#define I2C_IF_RXUF_DEFAULT   (_I2C_IF_RXUF_DEFAULT << 13)
 
#define I2C_IF_SSTOP   (0x1UL << 16)
 
#define I2C_IF_SSTOP_DEFAULT   (_I2C_IF_SSTOP_DEFAULT << 16)
 
#define I2C_IF_START   (0x1UL << 0)
 
#define I2C_IF_START_DEFAULT   (_I2C_IF_START_DEFAULT << 0)
 
#define I2C_IF_TXBL   (0x1UL << 4)
 
#define I2C_IF_TXBL_DEFAULT   (_I2C_IF_TXBL_DEFAULT << 4)
 
#define I2C_IF_TXC   (0x1UL << 3)
 
#define I2C_IF_TXC_DEFAULT   (_I2C_IF_TXC_DEFAULT << 3)
 
#define I2C_IF_TXOF   (0x1UL << 12)
 
#define I2C_IF_TXOF_DEFAULT   (_I2C_IF_TXOF_DEFAULT << 12)
 
#define I2C_IFC_ACK   (0x1UL << 6)
 
#define I2C_IFC_ACK_DEFAULT   (_I2C_IFC_ACK_DEFAULT << 6)
 
#define I2C_IFC_ADDR   (0x1UL << 2)
 
#define I2C_IFC_ADDR_DEFAULT   (_I2C_IFC_ADDR_DEFAULT << 2)
 
#define I2C_IFC_ARBLOST   (0x1UL << 9)
 
#define I2C_IFC_ARBLOST_DEFAULT   (_I2C_IFC_ARBLOST_DEFAULT << 9)
 
#define I2C_IFC_BITO   (0x1UL << 14)
 
#define I2C_IFC_BITO_DEFAULT   (_I2C_IFC_BITO_DEFAULT << 14)
 
#define I2C_IFC_BUSERR   (0x1UL << 10)
 
#define I2C_IFC_BUSERR_DEFAULT   (_I2C_IFC_BUSERR_DEFAULT << 10)
 
#define I2C_IFC_BUSHOLD   (0x1UL << 11)
 
#define I2C_IFC_BUSHOLD_DEFAULT   (_I2C_IFC_BUSHOLD_DEFAULT << 11)
 
#define I2C_IFC_CLTO   (0x1UL << 15)
 
#define I2C_IFC_CLTO_DEFAULT   (_I2C_IFC_CLTO_DEFAULT << 15)
 
#define I2C_IFC_MSTOP   (0x1UL << 8)
 
#define I2C_IFC_MSTOP_DEFAULT   (_I2C_IFC_MSTOP_DEFAULT << 8)
 
#define I2C_IFC_NACK   (0x1UL << 7)
 
#define I2C_IFC_NACK_DEFAULT   (_I2C_IFC_NACK_DEFAULT << 7)
 
#define I2C_IFC_RSTART   (0x1UL << 1)
 
#define I2C_IFC_RSTART_DEFAULT   (_I2C_IFC_RSTART_DEFAULT << 1)
 
#define I2C_IFC_RXUF   (0x1UL << 13)
 
#define I2C_IFC_RXUF_DEFAULT   (_I2C_IFC_RXUF_DEFAULT << 13)
 
#define I2C_IFC_SSTOP   (0x1UL << 16)
 
#define I2C_IFC_SSTOP_DEFAULT   (_I2C_IFC_SSTOP_DEFAULT << 16)
 
#define I2C_IFC_START   (0x1UL << 0)
 
#define I2C_IFC_START_DEFAULT   (_I2C_IFC_START_DEFAULT << 0)
 
#define I2C_IFC_TXC   (0x1UL << 3)
 
#define I2C_IFC_TXC_DEFAULT   (_I2C_IFC_TXC_DEFAULT << 3)
 
#define I2C_IFC_TXOF   (0x1UL << 12)
 
#define I2C_IFC_TXOF_DEFAULT   (_I2C_IFC_TXOF_DEFAULT << 12)
 
#define I2C_IFS_ACK   (0x1UL << 6)
 
#define I2C_IFS_ACK_DEFAULT   (_I2C_IFS_ACK_DEFAULT << 6)
 
#define I2C_IFS_ADDR   (0x1UL << 2)
 
#define I2C_IFS_ADDR_DEFAULT   (_I2C_IFS_ADDR_DEFAULT << 2)
 
#define I2C_IFS_ARBLOST   (0x1UL << 9)
 
#define I2C_IFS_ARBLOST_DEFAULT   (_I2C_IFS_ARBLOST_DEFAULT << 9)
 
#define I2C_IFS_BITO   (0x1UL << 14)
 
#define I2C_IFS_BITO_DEFAULT   (_I2C_IFS_BITO_DEFAULT << 14)
 
#define I2C_IFS_BUSERR   (0x1UL << 10)
 
#define I2C_IFS_BUSERR_DEFAULT   (_I2C_IFS_BUSERR_DEFAULT << 10)
 
#define I2C_IFS_BUSHOLD   (0x1UL << 11)
 
#define I2C_IFS_BUSHOLD_DEFAULT   (_I2C_IFS_BUSHOLD_DEFAULT << 11)
 
#define I2C_IFS_CLTO   (0x1UL << 15)
 
#define I2C_IFS_CLTO_DEFAULT   (_I2C_IFS_CLTO_DEFAULT << 15)
 
#define I2C_IFS_MSTOP   (0x1UL << 8)
 
#define I2C_IFS_MSTOP_DEFAULT   (_I2C_IFS_MSTOP_DEFAULT << 8)
 
#define I2C_IFS_NACK   (0x1UL << 7)
 
#define I2C_IFS_NACK_DEFAULT   (_I2C_IFS_NACK_DEFAULT << 7)
 
#define I2C_IFS_RSTART   (0x1UL << 1)
 
#define I2C_IFS_RSTART_DEFAULT   (_I2C_IFS_RSTART_DEFAULT << 1)
 
#define I2C_IFS_RXUF   (0x1UL << 13)
 
#define I2C_IFS_RXUF_DEFAULT   (_I2C_IFS_RXUF_DEFAULT << 13)
 
#define I2C_IFS_SSTOP   (0x1UL << 16)
 
#define I2C_IFS_SSTOP_DEFAULT   (_I2C_IFS_SSTOP_DEFAULT << 16)
 
#define I2C_IFS_START   (0x1UL << 0)
 
#define I2C_IFS_START_DEFAULT   (_I2C_IFS_START_DEFAULT << 0)
 
#define I2C_IFS_TXC   (0x1UL << 3)
 
#define I2C_IFS_TXC_DEFAULT   (_I2C_IFS_TXC_DEFAULT << 3)
 
#define I2C_IFS_TXOF   (0x1UL << 12)
 
#define I2C_IFS_TXOF_DEFAULT   (_I2C_IFS_TXOF_DEFAULT << 12)
 
#define I2C_ROUTE_LOCATION_DEFAULT   (_I2C_ROUTE_LOCATION_DEFAULT << 8)
 
#define I2C_ROUTE_LOCATION_LOC0   (_I2C_ROUTE_LOCATION_LOC0 << 8)
 
#define I2C_ROUTE_LOCATION_LOC1   (_I2C_ROUTE_LOCATION_LOC1 << 8)
 
#define I2C_ROUTE_LOCATION_LOC2   (_I2C_ROUTE_LOCATION_LOC2 << 8)
 
#define I2C_ROUTE_LOCATION_LOC3   (_I2C_ROUTE_LOCATION_LOC3 << 8)
 
#define I2C_ROUTE_LOCATION_LOC4   (_I2C_ROUTE_LOCATION_LOC4 << 8)
 
#define I2C_ROUTE_LOCATION_LOC5   (_I2C_ROUTE_LOCATION_LOC5 << 8)
 
#define I2C_ROUTE_LOCATION_LOC6   (_I2C_ROUTE_LOCATION_LOC6 << 8)
 
#define I2C_ROUTE_SCLPEN   (0x1UL << 1)
 
#define I2C_ROUTE_SCLPEN_DEFAULT   (_I2C_ROUTE_SCLPEN_DEFAULT << 1)
 
#define I2C_ROUTE_SDAPEN   (0x1UL << 0)
 
#define I2C_ROUTE_SDAPEN_DEFAULT   (_I2C_ROUTE_SDAPEN_DEFAULT << 0)
 
#define I2C_RXDATA_RXDATA_DEFAULT   (_I2C_RXDATA_RXDATA_DEFAULT << 0)
 
#define I2C_RXDATAP_RXDATAP_DEFAULT   (_I2C_RXDATAP_RXDATAP_DEFAULT << 0)
 
#define I2C_SADDR_ADDR_DEFAULT   (_I2C_SADDR_ADDR_DEFAULT << 1)
 
#define I2C_SADDRMASK_MASK_DEFAULT   (_I2C_SADDRMASK_MASK_DEFAULT << 1)
 
#define I2C_STATE_BUSHOLD   (0x1UL << 4)
 
#define I2C_STATE_BUSHOLD_DEFAULT   (_I2C_STATE_BUSHOLD_DEFAULT << 4)
 
#define I2C_STATE_BUSY   (0x1UL << 0)
 
#define I2C_STATE_BUSY_DEFAULT   (_I2C_STATE_BUSY_DEFAULT << 0)
 
#define I2C_STATE_MASTER   (0x1UL << 1)
 
#define I2C_STATE_MASTER_DEFAULT   (_I2C_STATE_MASTER_DEFAULT << 1)
 
#define I2C_STATE_NACKED   (0x1UL << 3)
 
#define I2C_STATE_NACKED_DEFAULT   (_I2C_STATE_NACKED_DEFAULT << 3)
 
#define I2C_STATE_STATE_ADDR   (_I2C_STATE_STATE_ADDR << 5)
 
#define I2C_STATE_STATE_ADDRACK   (_I2C_STATE_STATE_ADDRACK << 5)
 
#define I2C_STATE_STATE_DATA   (_I2C_STATE_STATE_DATA << 5)
 
#define I2C_STATE_STATE_DATAACK   (_I2C_STATE_STATE_DATAACK << 5)
 
#define I2C_STATE_STATE_DEFAULT   (_I2C_STATE_STATE_DEFAULT << 5)
 
#define I2C_STATE_STATE_IDLE   (_I2C_STATE_STATE_IDLE << 5)
 
#define I2C_STATE_STATE_START   (_I2C_STATE_STATE_START << 5)
 
#define I2C_STATE_STATE_WAIT   (_I2C_STATE_STATE_WAIT << 5)
 
#define I2C_STATE_TRANSMITTER   (0x1UL << 2)
 
#define I2C_STATE_TRANSMITTER_DEFAULT   (_I2C_STATE_TRANSMITTER_DEFAULT << 2)
 
#define I2C_STATUS_PABORT   (0x1UL << 5)
 
#define I2C_STATUS_PABORT_DEFAULT   (_I2C_STATUS_PABORT_DEFAULT << 5)
 
#define I2C_STATUS_PACK   (0x1UL << 2)
 
#define I2C_STATUS_PACK_DEFAULT   (_I2C_STATUS_PACK_DEFAULT << 2)
 
#define I2C_STATUS_PCONT   (0x1UL << 4)
 
#define I2C_STATUS_PCONT_DEFAULT   (_I2C_STATUS_PCONT_DEFAULT << 4)
 
#define I2C_STATUS_PNACK   (0x1UL << 3)
 
#define I2C_STATUS_PNACK_DEFAULT   (_I2C_STATUS_PNACK_DEFAULT << 3)
 
#define I2C_STATUS_PSTART   (0x1UL << 0)
 
#define I2C_STATUS_PSTART_DEFAULT   (_I2C_STATUS_PSTART_DEFAULT << 0)
 
#define I2C_STATUS_PSTOP   (0x1UL << 1)
 
#define I2C_STATUS_PSTOP_DEFAULT   (_I2C_STATUS_PSTOP_DEFAULT << 1)
 
#define I2C_STATUS_RXDATAV   (0x1UL << 8)
 
#define I2C_STATUS_RXDATAV_DEFAULT   (_I2C_STATUS_RXDATAV_DEFAULT << 8)
 
#define I2C_STATUS_TXBL   (0x1UL << 7)
 
#define I2C_STATUS_TXBL_DEFAULT   (_I2C_STATUS_TXBL_DEFAULT << 7)
 
#define I2C_STATUS_TXC   (0x1UL << 6)
 
#define I2C_STATUS_TXC_DEFAULT   (_I2C_STATUS_TXC_DEFAULT << 6)
 
#define I2C_TXDATA_TXDATA_DEFAULT   (_I2C_TXDATA_TXDATA_DEFAULT << 0)
 

Macro Definition Documentation

#define _I2C_CLKDIV_DIV_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CLKDIV

Definition at line 292 of file efm32wg_i2c.h.

#define _I2C_CLKDIV_DIV_MASK   0x1FFUL

Bit mask for I2C_DIV

Definition at line 291 of file efm32wg_i2c.h.

Referenced by I2C_BusFreqSet().

#define _I2C_CLKDIV_DIV_SHIFT   0

Shift value for I2C_DIV

Definition at line 290 of file efm32wg_i2c.h.

#define _I2C_CLKDIV_MASK   0x000001FFUL

Mask for I2C_CLKDIV

Definition at line 289 of file efm32wg_i2c.h.

#define _I2C_CLKDIV_RESETVALUE   0x00000000UL

Default value for I2C_CLKDIV

Definition at line 288 of file efm32wg_i2c.h.

Referenced by I2C_Reset().

#define _I2C_CMD_ABORT_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 178 of file efm32wg_i2c.h.

#define _I2C_CMD_ABORT_MASK   0x20UL

Bit mask for I2C_ABORT

Definition at line 177 of file efm32wg_i2c.h.

#define _I2C_CMD_ABORT_SHIFT   5

Shift value for I2C_ABORT

Definition at line 176 of file efm32wg_i2c.h.

#define _I2C_CMD_ACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 163 of file efm32wg_i2c.h.

#define _I2C_CMD_ACK_MASK   0x4UL

Bit mask for I2C_ACK

Definition at line 162 of file efm32wg_i2c.h.

#define _I2C_CMD_ACK_SHIFT   2

Shift value for I2C_ACK

Definition at line 161 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARPC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 188 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARPC_MASK   0x80UL

Bit mask for I2C_CLEARPC

Definition at line 187 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARPC_SHIFT   7

Shift value for I2C_CLEARPC

Definition at line 186 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARTX_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 183 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARTX_MASK   0x40UL

Bit mask for I2C_CLEARTX

Definition at line 182 of file efm32wg_i2c.h.

#define _I2C_CMD_CLEARTX_SHIFT   6

Shift value for I2C_CLEARTX

Definition at line 181 of file efm32wg_i2c.h.

#define _I2C_CMD_CONT_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 173 of file efm32wg_i2c.h.

#define _I2C_CMD_CONT_MASK   0x10UL

Bit mask for I2C_CONT

Definition at line 172 of file efm32wg_i2c.h.

#define _I2C_CMD_CONT_SHIFT   4

Shift value for I2C_CONT

Definition at line 171 of file efm32wg_i2c.h.

#define _I2C_CMD_MASK   0x000000FFUL

Mask for I2C_CMD

Definition at line 149 of file efm32wg_i2c.h.

#define _I2C_CMD_NACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 168 of file efm32wg_i2c.h.

#define _I2C_CMD_NACK_MASK   0x8UL

Bit mask for I2C_NACK

Definition at line 167 of file efm32wg_i2c.h.

#define _I2C_CMD_NACK_SHIFT   3

Shift value for I2C_NACK

Definition at line 166 of file efm32wg_i2c.h.

#define _I2C_CMD_RESETVALUE   0x00000000UL

Default value for I2C_CMD

Definition at line 148 of file efm32wg_i2c.h.

#define _I2C_CMD_START_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 153 of file efm32wg_i2c.h.

#define _I2C_CMD_START_MASK   0x1UL

Bit mask for I2C_START

Definition at line 152 of file efm32wg_i2c.h.

#define _I2C_CMD_START_SHIFT   0

Shift value for I2C_START

Definition at line 151 of file efm32wg_i2c.h.

#define _I2C_CMD_STOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CMD

Definition at line 158 of file efm32wg_i2c.h.

#define _I2C_CMD_STOP_MASK   0x2UL

Bit mask for I2C_STOP

Definition at line 157 of file efm32wg_i2c.h.

#define _I2C_CMD_STOP_SHIFT   1

Shift value for I2C_STOP

Definition at line 156 of file efm32wg_i2c.h.

#define _I2C_CTRL_ARBDIS_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 96 of file efm32wg_i2c.h.

#define _I2C_CTRL_ARBDIS_MASK   0x20UL

Bit mask for I2C_ARBDIS

Definition at line 95 of file efm32wg_i2c.h.

#define _I2C_CTRL_ARBDIS_SHIFT   5

Shift value for I2C_ARBDIS

Definition at line 94 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 81 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOACK_MASK   0x4UL

Bit mask for I2C_AUTOACK

Definition at line 80 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOACK_SHIFT   2

Shift value for I2C_AUTOACK

Definition at line 79 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSE_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 86 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSE_MASK   0x8UL

Bit mask for I2C_AUTOSE

Definition at line 85 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSE_SHIFT   3

Shift value for I2C_AUTOSE

Definition at line 84 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSN_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 91 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSN_MASK   0x10UL

Bit mask for I2C_AUTOSN

Definition at line 90 of file efm32wg_i2c.h.

#define _I2C_CTRL_AUTOSN_SHIFT   4

Shift value for I2C_AUTOSN

Definition at line 89 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_160PCC   0x00000003UL

Mode 160PCC for I2C_CTRL

Definition at line 119 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_40PCC   0x00000001UL

Mode 40PCC for I2C_CTRL

Definition at line 117 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_80PCC   0x00000002UL

Mode 80PCC for I2C_CTRL

Definition at line 118 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 115 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_MASK   0x3000UL

Bit mask for I2C_BITO

Definition at line 114 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_OFF   0x00000000UL

Mode OFF for I2C_CTRL

Definition at line 116 of file efm32wg_i2c.h.

#define _I2C_CTRL_BITO_SHIFT   12

Shift value for I2C_BITO

Definition at line 113 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLHR_ASYMMETRIC   0x00000001UL

Mode ASYMMETRIC for I2C_CTRL

Definition at line 107 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLHR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 105 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLHR_FAST   0x00000002UL

Mode FAST for I2C_CTRL

Definition at line 108 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLHR_MASK   0x300UL

Bit mask for I2C_CLHR

Definition at line 104 of file efm32wg_i2c.h.

Referenced by I2C_BusFreqGet(), and I2C_BusFreqSet().

#define _I2C_CTRL_CLHR_SHIFT   8

Shift value for I2C_CLHR

Definition at line 103 of file efm32wg_i2c.h.

Referenced by I2C_BusFreqGet(), and I2C_BusFreqSet().

#define _I2C_CTRL_CLHR_STANDARD   0x00000000UL

Mode STANDARD for I2C_CTRL

Definition at line 106 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_1024PPC   0x00000005UL

Mode 1024PPC for I2C_CTRL

Definition at line 138 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_160PCC   0x00000003UL

Mode 160PCC for I2C_CTRL

Definition at line 136 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_320PPC   0x00000004UL

Mode 320PPC for I2C_CTRL

Definition at line 137 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_40PCC   0x00000001UL

Mode 40PCC for I2C_CTRL

Definition at line 134 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_80PCC   0x00000002UL

Mode 80PCC for I2C_CTRL

Definition at line 135 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 132 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_MASK   0x70000UL

Bit mask for I2C_CLTO

Definition at line 131 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_OFF   0x00000000UL

Mode OFF for I2C_CTRL

Definition at line 133 of file efm32wg_i2c.h.

#define _I2C_CTRL_CLTO_SHIFT   16

Shift value for I2C_CLTO

Definition at line 130 of file efm32wg_i2c.h.

#define _I2C_CTRL_EN_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 71 of file efm32wg_i2c.h.

#define _I2C_CTRL_EN_MASK   0x1UL

Bit mask for I2C_EN

Definition at line 70 of file efm32wg_i2c.h.

#define _I2C_CTRL_EN_SHIFT   0

Shift value for I2C_EN

Definition at line 69 of file efm32wg_i2c.h.

Referenced by I2C_Enable(), and I2C_Init().

#define _I2C_CTRL_GCAMEN_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 101 of file efm32wg_i2c.h.

#define _I2C_CTRL_GCAMEN_MASK   0x40UL

Bit mask for I2C_GCAMEN

Definition at line 100 of file efm32wg_i2c.h.

#define _I2C_CTRL_GCAMEN_SHIFT   6

Shift value for I2C_GCAMEN

Definition at line 99 of file efm32wg_i2c.h.

#define _I2C_CTRL_GIBITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 128 of file efm32wg_i2c.h.

#define _I2C_CTRL_GIBITO_MASK   0x8000UL

Bit mask for I2C_GIBITO

Definition at line 127 of file efm32wg_i2c.h.

#define _I2C_CTRL_GIBITO_SHIFT   15

Shift value for I2C_GIBITO

Definition at line 126 of file efm32wg_i2c.h.

#define _I2C_CTRL_MASK   0x0007B37FUL

Mask for I2C_CTRL

Definition at line 67 of file efm32wg_i2c.h.

#define _I2C_CTRL_RESETVALUE   0x00000000UL

Default value for I2C_CTRL

Definition at line 66 of file efm32wg_i2c.h.

Referenced by I2C_Reset().

#define _I2C_CTRL_SLAVE_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_CTRL

Definition at line 76 of file efm32wg_i2c.h.

#define _I2C_CTRL_SLAVE_MASK   0x2UL

Bit mask for I2C_SLAVE

Definition at line 75 of file efm32wg_i2c.h.

#define _I2C_CTRL_SLAVE_SHIFT   1

Shift value for I2C_SLAVE

Definition at line 74 of file efm32wg_i2c.h.

Referenced by I2C_Init().

#define _I2C_IEN_ACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 618 of file efm32wg_i2c.h.

#define _I2C_IEN_ACK_MASK   0x40UL

Bit mask for I2C_ACK

Definition at line 617 of file efm32wg_i2c.h.

#define _I2C_IEN_ACK_SHIFT   6

Shift value for I2C_ACK

Definition at line 616 of file efm32wg_i2c.h.

#define _I2C_IEN_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 598 of file efm32wg_i2c.h.

#define _I2C_IEN_ADDR_MASK   0x4UL

Bit mask for I2C_ADDR

Definition at line 597 of file efm32wg_i2c.h.

#define _I2C_IEN_ADDR_SHIFT   2

Shift value for I2C_ADDR

Definition at line 596 of file efm32wg_i2c.h.

#define _I2C_IEN_ARBLOST_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 633 of file efm32wg_i2c.h.

#define _I2C_IEN_ARBLOST_MASK   0x200UL

Bit mask for I2C_ARBLOST

Definition at line 632 of file efm32wg_i2c.h.

#define _I2C_IEN_ARBLOST_SHIFT   9

Shift value for I2C_ARBLOST

Definition at line 631 of file efm32wg_i2c.h.

#define _I2C_IEN_BITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 658 of file efm32wg_i2c.h.

#define _I2C_IEN_BITO_MASK   0x4000UL

Bit mask for I2C_BITO

Definition at line 657 of file efm32wg_i2c.h.

#define _I2C_IEN_BITO_SHIFT   14

Shift value for I2C_BITO

Definition at line 656 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSERR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 638 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSERR_MASK   0x400UL

Bit mask for I2C_BUSERR

Definition at line 637 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSERR_SHIFT   10

Shift value for I2C_BUSERR

Definition at line 636 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSHOLD_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 643 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSHOLD_MASK   0x800UL

Bit mask for I2C_BUSHOLD

Definition at line 642 of file efm32wg_i2c.h.

#define _I2C_IEN_BUSHOLD_SHIFT   11

Shift value for I2C_BUSHOLD

Definition at line 641 of file efm32wg_i2c.h.

#define _I2C_IEN_CLTO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 663 of file efm32wg_i2c.h.

#define _I2C_IEN_CLTO_MASK   0x8000UL

Bit mask for I2C_CLTO

Definition at line 662 of file efm32wg_i2c.h.

#define _I2C_IEN_CLTO_SHIFT   15

Shift value for I2C_CLTO

Definition at line 661 of file efm32wg_i2c.h.

#define _I2C_IEN_MASK   0x0001FFFFUL

Mask for I2C_IEN

Definition at line 584 of file efm32wg_i2c.h.

#define _I2C_IEN_MSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 628 of file efm32wg_i2c.h.

#define _I2C_IEN_MSTOP_MASK   0x100UL

Bit mask for I2C_MSTOP

Definition at line 627 of file efm32wg_i2c.h.

#define _I2C_IEN_MSTOP_SHIFT   8

Shift value for I2C_MSTOP

Definition at line 626 of file efm32wg_i2c.h.

#define _I2C_IEN_NACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 623 of file efm32wg_i2c.h.

#define _I2C_IEN_NACK_MASK   0x80UL

Bit mask for I2C_NACK

Definition at line 622 of file efm32wg_i2c.h.

#define _I2C_IEN_NACK_SHIFT   7

Shift value for I2C_NACK

Definition at line 621 of file efm32wg_i2c.h.

#define _I2C_IEN_RESETVALUE   0x00000000UL

Default value for I2C_IEN

Definition at line 583 of file efm32wg_i2c.h.

Referenced by I2C_Reset().

#define _I2C_IEN_RSTART_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 593 of file efm32wg_i2c.h.

#define _I2C_IEN_RSTART_MASK   0x2UL

Bit mask for I2C_RSTART

Definition at line 592 of file efm32wg_i2c.h.

#define _I2C_IEN_RSTART_SHIFT   1

Shift value for I2C_RSTART

Definition at line 591 of file efm32wg_i2c.h.

#define _I2C_IEN_RXDATAV_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 613 of file efm32wg_i2c.h.

#define _I2C_IEN_RXDATAV_MASK   0x20UL

Bit mask for I2C_RXDATAV

Definition at line 612 of file efm32wg_i2c.h.

#define _I2C_IEN_RXDATAV_SHIFT   5

Shift value for I2C_RXDATAV

Definition at line 611 of file efm32wg_i2c.h.

#define _I2C_IEN_RXUF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 653 of file efm32wg_i2c.h.

#define _I2C_IEN_RXUF_MASK   0x2000UL

Bit mask for I2C_RXUF

Definition at line 652 of file efm32wg_i2c.h.

#define _I2C_IEN_RXUF_SHIFT   13

Shift value for I2C_RXUF

Definition at line 651 of file efm32wg_i2c.h.

#define _I2C_IEN_SSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 668 of file efm32wg_i2c.h.

#define _I2C_IEN_SSTOP_MASK   0x10000UL

Bit mask for I2C_SSTOP

Definition at line 667 of file efm32wg_i2c.h.

#define _I2C_IEN_SSTOP_SHIFT   16

Shift value for I2C_SSTOP

Definition at line 666 of file efm32wg_i2c.h.

#define _I2C_IEN_START_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 588 of file efm32wg_i2c.h.

#define _I2C_IEN_START_MASK   0x1UL

Bit mask for I2C_START

Definition at line 587 of file efm32wg_i2c.h.

#define _I2C_IEN_START_SHIFT   0

Shift value for I2C_START

Definition at line 586 of file efm32wg_i2c.h.

#define _I2C_IEN_TXBL_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 608 of file efm32wg_i2c.h.

#define _I2C_IEN_TXBL_MASK   0x10UL

Bit mask for I2C_TXBL

Definition at line 607 of file efm32wg_i2c.h.

#define _I2C_IEN_TXBL_SHIFT   4

Shift value for I2C_TXBL

Definition at line 606 of file efm32wg_i2c.h.

#define _I2C_IEN_TXC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 603 of file efm32wg_i2c.h.

#define _I2C_IEN_TXC_MASK   0x8UL

Bit mask for I2C_TXC

Definition at line 602 of file efm32wg_i2c.h.

#define _I2C_IEN_TXC_SHIFT   3

Shift value for I2C_TXC

Definition at line 601 of file efm32wg_i2c.h.

#define _I2C_IEN_TXOF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IEN

Definition at line 648 of file efm32wg_i2c.h.

#define _I2C_IEN_TXOF_MASK   0x1000UL

Bit mask for I2C_TXOF

Definition at line 647 of file efm32wg_i2c.h.

#define _I2C_IEN_TXOF_SHIFT   12

Shift value for I2C_TXOF

Definition at line 646 of file efm32wg_i2c.h.

#define _I2C_IF_ACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 371 of file efm32wg_i2c.h.

#define _I2C_IF_ACK_MASK   0x40UL

Bit mask for I2C_ACK

Definition at line 370 of file efm32wg_i2c.h.

#define _I2C_IF_ACK_SHIFT   6

Shift value for I2C_ACK

Definition at line 369 of file efm32wg_i2c.h.

#define _I2C_IF_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 351 of file efm32wg_i2c.h.

#define _I2C_IF_ADDR_MASK   0x4UL

Bit mask for I2C_ADDR

Definition at line 350 of file efm32wg_i2c.h.

#define _I2C_IF_ADDR_SHIFT   2

Shift value for I2C_ADDR

Definition at line 349 of file efm32wg_i2c.h.

#define _I2C_IF_ARBLOST_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 386 of file efm32wg_i2c.h.

#define _I2C_IF_ARBLOST_MASK   0x200UL

Bit mask for I2C_ARBLOST

Definition at line 385 of file efm32wg_i2c.h.

#define _I2C_IF_ARBLOST_SHIFT   9

Shift value for I2C_ARBLOST

Definition at line 384 of file efm32wg_i2c.h.

#define _I2C_IF_BITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 411 of file efm32wg_i2c.h.

#define _I2C_IF_BITO_MASK   0x4000UL

Bit mask for I2C_BITO

Definition at line 410 of file efm32wg_i2c.h.

#define _I2C_IF_BITO_SHIFT   14

Shift value for I2C_BITO

Definition at line 409 of file efm32wg_i2c.h.

#define _I2C_IF_BUSERR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 391 of file efm32wg_i2c.h.

#define _I2C_IF_BUSERR_MASK   0x400UL

Bit mask for I2C_BUSERR

Definition at line 390 of file efm32wg_i2c.h.

#define _I2C_IF_BUSERR_SHIFT   10

Shift value for I2C_BUSERR

Definition at line 389 of file efm32wg_i2c.h.

#define _I2C_IF_BUSHOLD_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 396 of file efm32wg_i2c.h.

#define _I2C_IF_BUSHOLD_MASK   0x800UL

Bit mask for I2C_BUSHOLD

Definition at line 395 of file efm32wg_i2c.h.

#define _I2C_IF_BUSHOLD_SHIFT   11

Shift value for I2C_BUSHOLD

Definition at line 394 of file efm32wg_i2c.h.

#define _I2C_IF_CLTO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 416 of file efm32wg_i2c.h.

#define _I2C_IF_CLTO_MASK   0x8000UL

Bit mask for I2C_CLTO

Definition at line 415 of file efm32wg_i2c.h.

#define _I2C_IF_CLTO_SHIFT   15

Shift value for I2C_CLTO

Definition at line 414 of file efm32wg_i2c.h.

#define _I2C_IF_MASK   0x0001FFFFUL

Mask for I2C_IF

Definition at line 337 of file efm32wg_i2c.h.

#define _I2C_IF_MSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 381 of file efm32wg_i2c.h.

#define _I2C_IF_MSTOP_MASK   0x100UL

Bit mask for I2C_MSTOP

Definition at line 380 of file efm32wg_i2c.h.

#define _I2C_IF_MSTOP_SHIFT   8

Shift value for I2C_MSTOP

Definition at line 379 of file efm32wg_i2c.h.

#define _I2C_IF_NACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 376 of file efm32wg_i2c.h.

#define _I2C_IF_NACK_MASK   0x80UL

Bit mask for I2C_NACK

Definition at line 375 of file efm32wg_i2c.h.

#define _I2C_IF_NACK_SHIFT   7

Shift value for I2C_NACK

Definition at line 374 of file efm32wg_i2c.h.

#define _I2C_IF_RESETVALUE   0x00000010UL

Default value for I2C_IF

Definition at line 336 of file efm32wg_i2c.h.

#define _I2C_IF_RSTART_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 346 of file efm32wg_i2c.h.

#define _I2C_IF_RSTART_MASK   0x2UL

Bit mask for I2C_RSTART

Definition at line 345 of file efm32wg_i2c.h.

#define _I2C_IF_RSTART_SHIFT   1

Shift value for I2C_RSTART

Definition at line 344 of file efm32wg_i2c.h.

#define _I2C_IF_RXDATAV_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 366 of file efm32wg_i2c.h.

#define _I2C_IF_RXDATAV_MASK   0x20UL

Bit mask for I2C_RXDATAV

Definition at line 365 of file efm32wg_i2c.h.

#define _I2C_IF_RXDATAV_SHIFT   5

Shift value for I2C_RXDATAV

Definition at line 364 of file efm32wg_i2c.h.

#define _I2C_IF_RXUF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 406 of file efm32wg_i2c.h.

#define _I2C_IF_RXUF_MASK   0x2000UL

Bit mask for I2C_RXUF

Definition at line 405 of file efm32wg_i2c.h.

#define _I2C_IF_RXUF_SHIFT   13

Shift value for I2C_RXUF

Definition at line 404 of file efm32wg_i2c.h.

#define _I2C_IF_SSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 421 of file efm32wg_i2c.h.

#define _I2C_IF_SSTOP_MASK   0x10000UL

Bit mask for I2C_SSTOP

Definition at line 420 of file efm32wg_i2c.h.

#define _I2C_IF_SSTOP_SHIFT   16

Shift value for I2C_SSTOP

Definition at line 419 of file efm32wg_i2c.h.

#define _I2C_IF_START_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 341 of file efm32wg_i2c.h.

#define _I2C_IF_START_MASK   0x1UL

Bit mask for I2C_START

Definition at line 340 of file efm32wg_i2c.h.

#define _I2C_IF_START_SHIFT   0

Shift value for I2C_START

Definition at line 339 of file efm32wg_i2c.h.

#define _I2C_IF_TXBL_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 361 of file efm32wg_i2c.h.

#define _I2C_IF_TXBL_MASK   0x10UL

Bit mask for I2C_TXBL

Definition at line 360 of file efm32wg_i2c.h.

#define _I2C_IF_TXBL_SHIFT   4

Shift value for I2C_TXBL

Definition at line 359 of file efm32wg_i2c.h.

#define _I2C_IF_TXC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 356 of file efm32wg_i2c.h.

#define _I2C_IF_TXC_MASK   0x8UL

Bit mask for I2C_TXC

Definition at line 355 of file efm32wg_i2c.h.

#define _I2C_IF_TXC_SHIFT   3

Shift value for I2C_TXC

Definition at line 354 of file efm32wg_i2c.h.

#define _I2C_IF_TXOF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IF

Definition at line 401 of file efm32wg_i2c.h.

#define _I2C_IF_TXOF_MASK   0x1000UL

Bit mask for I2C_TXOF

Definition at line 400 of file efm32wg_i2c.h.

#define _I2C_IF_TXOF_SHIFT   12

Shift value for I2C_TXOF

Definition at line 399 of file efm32wg_i2c.h.

#define _I2C_IFC_ACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 529 of file efm32wg_i2c.h.

#define _I2C_IFC_ACK_MASK   0x40UL

Bit mask for I2C_ACK

Definition at line 528 of file efm32wg_i2c.h.

#define _I2C_IFC_ACK_SHIFT   6

Shift value for I2C_ACK

Definition at line 527 of file efm32wg_i2c.h.

#define _I2C_IFC_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 519 of file efm32wg_i2c.h.

#define _I2C_IFC_ADDR_MASK   0x4UL

Bit mask for I2C_ADDR

Definition at line 518 of file efm32wg_i2c.h.

#define _I2C_IFC_ADDR_SHIFT   2

Shift value for I2C_ADDR

Definition at line 517 of file efm32wg_i2c.h.

#define _I2C_IFC_ARBLOST_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 544 of file efm32wg_i2c.h.

#define _I2C_IFC_ARBLOST_MASK   0x200UL

Bit mask for I2C_ARBLOST

Definition at line 543 of file efm32wg_i2c.h.

#define _I2C_IFC_ARBLOST_SHIFT   9

Shift value for I2C_ARBLOST

Definition at line 542 of file efm32wg_i2c.h.

#define _I2C_IFC_BITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 569 of file efm32wg_i2c.h.

#define _I2C_IFC_BITO_MASK   0x4000UL

Bit mask for I2C_BITO

Definition at line 568 of file efm32wg_i2c.h.

#define _I2C_IFC_BITO_SHIFT   14

Shift value for I2C_BITO

Definition at line 567 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSERR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 549 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSERR_MASK   0x400UL

Bit mask for I2C_BUSERR

Definition at line 548 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSERR_SHIFT   10

Shift value for I2C_BUSERR

Definition at line 547 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSHOLD_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 554 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSHOLD_MASK   0x800UL

Bit mask for I2C_BUSHOLD

Definition at line 553 of file efm32wg_i2c.h.

#define _I2C_IFC_BUSHOLD_SHIFT   11

Shift value for I2C_BUSHOLD

Definition at line 552 of file efm32wg_i2c.h.

#define _I2C_IFC_CLTO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 574 of file efm32wg_i2c.h.

#define _I2C_IFC_CLTO_MASK   0x8000UL

Bit mask for I2C_CLTO

Definition at line 573 of file efm32wg_i2c.h.

#define _I2C_IFC_CLTO_SHIFT   15

Shift value for I2C_CLTO

Definition at line 572 of file efm32wg_i2c.h.

#define _I2C_IFC_MASK   0x0001FFCFUL

Mask for I2C_IFC

Definition at line 505 of file efm32wg_i2c.h.

Referenced by I2C_Init(), I2C_Reset(), and I2C_TransferInit().

#define _I2C_IFC_MSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 539 of file efm32wg_i2c.h.

#define _I2C_IFC_MSTOP_MASK   0x100UL

Bit mask for I2C_MSTOP

Definition at line 538 of file efm32wg_i2c.h.

#define _I2C_IFC_MSTOP_SHIFT   8

Shift value for I2C_MSTOP

Definition at line 537 of file efm32wg_i2c.h.

#define _I2C_IFC_NACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 534 of file efm32wg_i2c.h.

#define _I2C_IFC_NACK_MASK   0x80UL

Bit mask for I2C_NACK

Definition at line 533 of file efm32wg_i2c.h.

#define _I2C_IFC_NACK_SHIFT   7

Shift value for I2C_NACK

Definition at line 532 of file efm32wg_i2c.h.

#define _I2C_IFC_RESETVALUE   0x00000000UL

Default value for I2C_IFC

Definition at line 504 of file efm32wg_i2c.h.

#define _I2C_IFC_RSTART_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 514 of file efm32wg_i2c.h.

#define _I2C_IFC_RSTART_MASK   0x2UL

Bit mask for I2C_RSTART

Definition at line 513 of file efm32wg_i2c.h.

#define _I2C_IFC_RSTART_SHIFT   1

Shift value for I2C_RSTART

Definition at line 512 of file efm32wg_i2c.h.

#define _I2C_IFC_RXUF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 564 of file efm32wg_i2c.h.

#define _I2C_IFC_RXUF_MASK   0x2000UL

Bit mask for I2C_RXUF

Definition at line 563 of file efm32wg_i2c.h.

#define _I2C_IFC_RXUF_SHIFT   13

Shift value for I2C_RXUF

Definition at line 562 of file efm32wg_i2c.h.

#define _I2C_IFC_SSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 579 of file efm32wg_i2c.h.

#define _I2C_IFC_SSTOP_MASK   0x10000UL

Bit mask for I2C_SSTOP

Definition at line 578 of file efm32wg_i2c.h.

#define _I2C_IFC_SSTOP_SHIFT   16

Shift value for I2C_SSTOP

Definition at line 577 of file efm32wg_i2c.h.

#define _I2C_IFC_START_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 509 of file efm32wg_i2c.h.

#define _I2C_IFC_START_MASK   0x1UL

Bit mask for I2C_START

Definition at line 508 of file efm32wg_i2c.h.

#define _I2C_IFC_START_SHIFT   0

Shift value for I2C_START

Definition at line 507 of file efm32wg_i2c.h.

#define _I2C_IFC_TXC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 524 of file efm32wg_i2c.h.

#define _I2C_IFC_TXC_MASK   0x8UL

Bit mask for I2C_TXC

Definition at line 523 of file efm32wg_i2c.h.

#define _I2C_IFC_TXC_SHIFT   3

Shift value for I2C_TXC

Definition at line 522 of file efm32wg_i2c.h.

#define _I2C_IFC_TXOF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFC

Definition at line 559 of file efm32wg_i2c.h.

#define _I2C_IFC_TXOF_MASK   0x1000UL

Bit mask for I2C_TXOF

Definition at line 558 of file efm32wg_i2c.h.

#define _I2C_IFC_TXOF_SHIFT   12

Shift value for I2C_TXOF

Definition at line 557 of file efm32wg_i2c.h.

#define _I2C_IFS_ACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 450 of file efm32wg_i2c.h.

#define _I2C_IFS_ACK_MASK   0x40UL

Bit mask for I2C_ACK

Definition at line 449 of file efm32wg_i2c.h.

#define _I2C_IFS_ACK_SHIFT   6

Shift value for I2C_ACK

Definition at line 448 of file efm32wg_i2c.h.

#define _I2C_IFS_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 440 of file efm32wg_i2c.h.

#define _I2C_IFS_ADDR_MASK   0x4UL

Bit mask for I2C_ADDR

Definition at line 439 of file efm32wg_i2c.h.

#define _I2C_IFS_ADDR_SHIFT   2

Shift value for I2C_ADDR

Definition at line 438 of file efm32wg_i2c.h.

#define _I2C_IFS_ARBLOST_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 465 of file efm32wg_i2c.h.

#define _I2C_IFS_ARBLOST_MASK   0x200UL

Bit mask for I2C_ARBLOST

Definition at line 464 of file efm32wg_i2c.h.

#define _I2C_IFS_ARBLOST_SHIFT   9

Shift value for I2C_ARBLOST

Definition at line 463 of file efm32wg_i2c.h.

#define _I2C_IFS_BITO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 490 of file efm32wg_i2c.h.

#define _I2C_IFS_BITO_MASK   0x4000UL

Bit mask for I2C_BITO

Definition at line 489 of file efm32wg_i2c.h.

#define _I2C_IFS_BITO_SHIFT   14

Shift value for I2C_BITO

Definition at line 488 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSERR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 470 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSERR_MASK   0x400UL

Bit mask for I2C_BUSERR

Definition at line 469 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSERR_SHIFT   10

Shift value for I2C_BUSERR

Definition at line 468 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSHOLD_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 475 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSHOLD_MASK   0x800UL

Bit mask for I2C_BUSHOLD

Definition at line 474 of file efm32wg_i2c.h.

#define _I2C_IFS_BUSHOLD_SHIFT   11

Shift value for I2C_BUSHOLD

Definition at line 473 of file efm32wg_i2c.h.

#define _I2C_IFS_CLTO_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 495 of file efm32wg_i2c.h.

#define _I2C_IFS_CLTO_MASK   0x8000UL

Bit mask for I2C_CLTO

Definition at line 494 of file efm32wg_i2c.h.

#define _I2C_IFS_CLTO_SHIFT   15

Shift value for I2C_CLTO

Definition at line 493 of file efm32wg_i2c.h.

#define _I2C_IFS_MASK   0x0001FFCFUL

Mask for I2C_IFS

Definition at line 426 of file efm32wg_i2c.h.

#define _I2C_IFS_MSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 460 of file efm32wg_i2c.h.

#define _I2C_IFS_MSTOP_MASK   0x100UL

Bit mask for I2C_MSTOP

Definition at line 459 of file efm32wg_i2c.h.

#define _I2C_IFS_MSTOP_SHIFT   8

Shift value for I2C_MSTOP

Definition at line 458 of file efm32wg_i2c.h.

#define _I2C_IFS_NACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 455 of file efm32wg_i2c.h.

#define _I2C_IFS_NACK_MASK   0x80UL

Bit mask for I2C_NACK

Definition at line 454 of file efm32wg_i2c.h.

#define _I2C_IFS_NACK_SHIFT   7

Shift value for I2C_NACK

Definition at line 453 of file efm32wg_i2c.h.

#define _I2C_IFS_RESETVALUE   0x00000000UL

Default value for I2C_IFS

Definition at line 425 of file efm32wg_i2c.h.

#define _I2C_IFS_RSTART_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 435 of file efm32wg_i2c.h.

#define _I2C_IFS_RSTART_MASK   0x2UL

Bit mask for I2C_RSTART

Definition at line 434 of file efm32wg_i2c.h.

#define _I2C_IFS_RSTART_SHIFT   1

Shift value for I2C_RSTART

Definition at line 433 of file efm32wg_i2c.h.

#define _I2C_IFS_RXUF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 485 of file efm32wg_i2c.h.

#define _I2C_IFS_RXUF_MASK   0x2000UL

Bit mask for I2C_RXUF

Definition at line 484 of file efm32wg_i2c.h.

#define _I2C_IFS_RXUF_SHIFT   13

Shift value for I2C_RXUF

Definition at line 483 of file efm32wg_i2c.h.

#define _I2C_IFS_SSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 500 of file efm32wg_i2c.h.

#define _I2C_IFS_SSTOP_MASK   0x10000UL

Bit mask for I2C_SSTOP

Definition at line 499 of file efm32wg_i2c.h.

#define _I2C_IFS_SSTOP_SHIFT   16

Shift value for I2C_SSTOP

Definition at line 498 of file efm32wg_i2c.h.

#define _I2C_IFS_START_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 430 of file efm32wg_i2c.h.

#define _I2C_IFS_START_MASK   0x1UL

Bit mask for I2C_START

Definition at line 429 of file efm32wg_i2c.h.

#define _I2C_IFS_START_SHIFT   0

Shift value for I2C_START

Definition at line 428 of file efm32wg_i2c.h.

#define _I2C_IFS_TXC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 445 of file efm32wg_i2c.h.

#define _I2C_IFS_TXC_MASK   0x8UL

Bit mask for I2C_TXC

Definition at line 444 of file efm32wg_i2c.h.

#define _I2C_IFS_TXC_SHIFT   3

Shift value for I2C_TXC

Definition at line 443 of file efm32wg_i2c.h.

#define _I2C_IFS_TXOF_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_IFS

Definition at line 480 of file efm32wg_i2c.h.

#define _I2C_IFS_TXOF_MASK   0x1000UL

Bit mask for I2C_TXOF

Definition at line 479 of file efm32wg_i2c.h.

#define _I2C_IFS_TXOF_SHIFT   12

Shift value for I2C_TXOF

Definition at line 478 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_ROUTE

Definition at line 687 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC0   0x00000000UL

Mode LOC0 for I2C_ROUTE

Definition at line 686 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC1   0x00000001UL

Mode LOC1 for I2C_ROUTE

Definition at line 688 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC2   0x00000002UL

Mode LOC2 for I2C_ROUTE

Definition at line 689 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC3   0x00000003UL

Mode LOC3 for I2C_ROUTE

Definition at line 690 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC4   0x00000004UL

Mode LOC4 for I2C_ROUTE

Definition at line 691 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC5   0x00000005UL

Mode LOC5 for I2C_ROUTE

Definition at line 692 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_LOC6   0x00000006UL

Mode LOC6 for I2C_ROUTE

Definition at line 693 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_MASK   0x700UL

Bit mask for I2C_LOCATION

Definition at line 685 of file efm32wg_i2c.h.

#define _I2C_ROUTE_LOCATION_SHIFT   8

Shift value for I2C_LOCATION

Definition at line 684 of file efm32wg_i2c.h.

Referenced by I2CSPM_Init(), and setupI2C().

#define _I2C_ROUTE_MASK   0x00000703UL

Mask for I2C_ROUTE

Definition at line 673 of file efm32wg_i2c.h.

#define _I2C_ROUTE_RESETVALUE   0x00000000UL

Default value for I2C_ROUTE

Definition at line 672 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SCLPEN_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_ROUTE

Definition at line 682 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SCLPEN_MASK   0x2UL

Bit mask for I2C_SCLPEN

Definition at line 681 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SCLPEN_SHIFT   1

Shift value for I2C_SCLPEN

Definition at line 680 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SDAPEN_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_ROUTE

Definition at line 677 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SDAPEN_MASK   0x1UL

Bit mask for I2C_SDAPEN

Definition at line 676 of file efm32wg_i2c.h.

#define _I2C_ROUTE_SDAPEN_SHIFT   0

Shift value for I2C_SDAPEN

Definition at line 675 of file efm32wg_i2c.h.

#define _I2C_RXDATA_MASK   0x000000FFUL

Mask for I2C_RXDATA

Definition at line 313 of file efm32wg_i2c.h.

#define _I2C_RXDATA_RESETVALUE   0x00000000UL

Default value for I2C_RXDATA

Definition at line 312 of file efm32wg_i2c.h.

#define _I2C_RXDATA_RXDATA_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_RXDATA

Definition at line 316 of file efm32wg_i2c.h.

#define _I2C_RXDATA_RXDATA_MASK   0xFFUL

Bit mask for I2C_RXDATA

Definition at line 315 of file efm32wg_i2c.h.

#define _I2C_RXDATA_RXDATA_SHIFT   0

Shift value for I2C_RXDATA

Definition at line 314 of file efm32wg_i2c.h.

#define _I2C_RXDATAP_MASK   0x000000FFUL

Mask for I2C_RXDATAP

Definition at line 321 of file efm32wg_i2c.h.

#define _I2C_RXDATAP_RESETVALUE   0x00000000UL

Default value for I2C_RXDATAP

Definition at line 320 of file efm32wg_i2c.h.

#define _I2C_RXDATAP_RXDATAP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_RXDATAP

Definition at line 324 of file efm32wg_i2c.h.

#define _I2C_RXDATAP_RXDATAP_MASK   0xFFUL

Bit mask for I2C_RXDATAP

Definition at line 323 of file efm32wg_i2c.h.

#define _I2C_RXDATAP_RXDATAP_SHIFT   0

Shift value for I2C_RXDATAP

Definition at line 322 of file efm32wg_i2c.h.

#define _I2C_SADDR_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_SADDR

Definition at line 300 of file efm32wg_i2c.h.

#define _I2C_SADDR_ADDR_MASK   0xFEUL

Bit mask for I2C_ADDR

Definition at line 299 of file efm32wg_i2c.h.

#define _I2C_SADDR_ADDR_SHIFT   1

Shift value for I2C_ADDR

Definition at line 298 of file efm32wg_i2c.h.

#define _I2C_SADDR_MASK   0x000000FEUL

Mask for I2C_SADDR

Definition at line 297 of file efm32wg_i2c.h.

#define _I2C_SADDR_RESETVALUE   0x00000000UL

Default value for I2C_SADDR

Definition at line 296 of file efm32wg_i2c.h.

Referenced by I2C_Reset().

#define _I2C_SADDRMASK_MASK   0x000000FEUL

Mask for I2C_SADDRMASK

Definition at line 305 of file efm32wg_i2c.h.

#define _I2C_SADDRMASK_MASK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_SADDRMASK

Definition at line 308 of file efm32wg_i2c.h.

#define _I2C_SADDRMASK_MASK_MASK   0xFEUL

Bit mask for I2C_MASK

Definition at line 307 of file efm32wg_i2c.h.

#define _I2C_SADDRMASK_MASK_SHIFT   1

Shift value for I2C_MASK

Definition at line 306 of file efm32wg_i2c.h.

#define _I2C_SADDRMASK_RESETVALUE   0x00000000UL

Default value for I2C_SADDRMASK

Definition at line 304 of file efm32wg_i2c.h.

Referenced by I2C_Reset().

#define _I2C_STATE_BUSHOLD_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATE

Definition at line 217 of file efm32wg_i2c.h.

#define _I2C_STATE_BUSHOLD_MASK   0x10UL

Bit mask for I2C_BUSHOLD

Definition at line 216 of file efm32wg_i2c.h.

#define _I2C_STATE_BUSHOLD_SHIFT   4

Shift value for I2C_BUSHOLD

Definition at line 215 of file efm32wg_i2c.h.

#define _I2C_STATE_BUSY_DEFAULT   0x00000001UL

Mode DEFAULT for I2C_STATE

Definition at line 197 of file efm32wg_i2c.h.

#define _I2C_STATE_BUSY_MASK   0x1UL

Bit mask for I2C_BUSY

Definition at line 196 of file efm32wg_i2c.h.

#define _I2C_STATE_BUSY_SHIFT   0

Shift value for I2C_BUSY

Definition at line 195 of file efm32wg_i2c.h.

#define _I2C_STATE_MASK   0x000000FFUL

Mask for I2C_STATE

Definition at line 193 of file efm32wg_i2c.h.

#define _I2C_STATE_MASTER_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATE

Definition at line 202 of file efm32wg_i2c.h.

#define _I2C_STATE_MASTER_MASK   0x2UL

Bit mask for I2C_MASTER

Definition at line 201 of file efm32wg_i2c.h.

#define _I2C_STATE_MASTER_SHIFT   1

Shift value for I2C_MASTER

Definition at line 200 of file efm32wg_i2c.h.

#define _I2C_STATE_NACKED_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATE

Definition at line 212 of file efm32wg_i2c.h.

#define _I2C_STATE_NACKED_MASK   0x8UL

Bit mask for I2C_NACKED

Definition at line 211 of file efm32wg_i2c.h.

#define _I2C_STATE_NACKED_SHIFT   3

Shift value for I2C_NACKED

Definition at line 210 of file efm32wg_i2c.h.

#define _I2C_STATE_RESETVALUE   0x00000001UL

Default value for I2C_STATE

Definition at line 192 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_ADDR   0x00000003UL

Mode ADDR for I2C_STATE

Definition at line 225 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_ADDRACK   0x00000004UL

Mode ADDRACK for I2C_STATE

Definition at line 226 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_DATA   0x00000005UL

Mode DATA for I2C_STATE

Definition at line 227 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_DATAACK   0x00000006UL

Mode DATAACK for I2C_STATE

Definition at line 228 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATE

Definition at line 221 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_IDLE   0x00000000UL

Mode IDLE for I2C_STATE

Definition at line 222 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_MASK   0xE0UL

Bit mask for I2C_STATE

Definition at line 220 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_SHIFT   5

Shift value for I2C_STATE

Definition at line 219 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_START   0x00000002UL

Mode START for I2C_STATE

Definition at line 224 of file efm32wg_i2c.h.

#define _I2C_STATE_STATE_WAIT   0x00000001UL

Mode WAIT for I2C_STATE

Definition at line 223 of file efm32wg_i2c.h.

#define _I2C_STATE_TRANSMITTER_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATE

Definition at line 207 of file efm32wg_i2c.h.

#define _I2C_STATE_TRANSMITTER_MASK   0x4UL

Bit mask for I2C_TRANSMITTER

Definition at line 206 of file efm32wg_i2c.h.

#define _I2C_STATE_TRANSMITTER_SHIFT   2

Shift value for I2C_TRANSMITTER

Definition at line 205 of file efm32wg_i2c.h.

#define _I2C_STATUS_MASK   0x000001FFUL

Mask for I2C_STATUS

Definition at line 240 of file efm32wg_i2c.h.

#define _I2C_STATUS_PABORT_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 269 of file efm32wg_i2c.h.

#define _I2C_STATUS_PABORT_MASK   0x20UL

Bit mask for I2C_PABORT

Definition at line 268 of file efm32wg_i2c.h.

#define _I2C_STATUS_PABORT_SHIFT   5

Shift value for I2C_PABORT

Definition at line 267 of file efm32wg_i2c.h.

#define _I2C_STATUS_PACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 254 of file efm32wg_i2c.h.

#define _I2C_STATUS_PACK_MASK   0x4UL

Bit mask for I2C_PACK

Definition at line 253 of file efm32wg_i2c.h.

#define _I2C_STATUS_PACK_SHIFT   2

Shift value for I2C_PACK

Definition at line 252 of file efm32wg_i2c.h.

#define _I2C_STATUS_PCONT_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 264 of file efm32wg_i2c.h.

#define _I2C_STATUS_PCONT_MASK   0x10UL

Bit mask for I2C_PCONT

Definition at line 263 of file efm32wg_i2c.h.

#define _I2C_STATUS_PCONT_SHIFT   4

Shift value for I2C_PCONT

Definition at line 262 of file efm32wg_i2c.h.

#define _I2C_STATUS_PNACK_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 259 of file efm32wg_i2c.h.

#define _I2C_STATUS_PNACK_MASK   0x8UL

Bit mask for I2C_PNACK

Definition at line 258 of file efm32wg_i2c.h.

#define _I2C_STATUS_PNACK_SHIFT   3

Shift value for I2C_PNACK

Definition at line 257 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTART_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 244 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTART_MASK   0x1UL

Bit mask for I2C_PSTART

Definition at line 243 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTART_SHIFT   0

Shift value for I2C_PSTART

Definition at line 242 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTOP_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 249 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTOP_MASK   0x2UL

Bit mask for I2C_PSTOP

Definition at line 248 of file efm32wg_i2c.h.

#define _I2C_STATUS_PSTOP_SHIFT   1

Shift value for I2C_PSTOP

Definition at line 247 of file efm32wg_i2c.h.

#define _I2C_STATUS_RESETVALUE   0x00000080UL

Default value for I2C_STATUS

Definition at line 239 of file efm32wg_i2c.h.

#define _I2C_STATUS_RXDATAV_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 284 of file efm32wg_i2c.h.

#define _I2C_STATUS_RXDATAV_MASK   0x100UL

Bit mask for I2C_RXDATAV

Definition at line 283 of file efm32wg_i2c.h.

#define _I2C_STATUS_RXDATAV_SHIFT   8

Shift value for I2C_RXDATAV

Definition at line 282 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXBL_DEFAULT   0x00000001UL

Mode DEFAULT for I2C_STATUS

Definition at line 279 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXBL_MASK   0x80UL

Bit mask for I2C_TXBL

Definition at line 278 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXBL_SHIFT   7

Shift value for I2C_TXBL

Definition at line 277 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXC_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_STATUS

Definition at line 274 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXC_MASK   0x40UL

Bit mask for I2C_TXC

Definition at line 273 of file efm32wg_i2c.h.

#define _I2C_STATUS_TXC_SHIFT   6

Shift value for I2C_TXC

Definition at line 272 of file efm32wg_i2c.h.

#define _I2C_TXDATA_MASK   0x000000FFUL

Mask for I2C_TXDATA

Definition at line 329 of file efm32wg_i2c.h.

#define _I2C_TXDATA_RESETVALUE   0x00000000UL

Default value for I2C_TXDATA

Definition at line 328 of file efm32wg_i2c.h.

#define _I2C_TXDATA_TXDATA_DEFAULT   0x00000000UL

Mode DEFAULT for I2C_TXDATA

Definition at line 332 of file efm32wg_i2c.h.

#define _I2C_TXDATA_TXDATA_MASK   0xFFUL

Bit mask for I2C_TXDATA

Definition at line 331 of file efm32wg_i2c.h.

#define _I2C_TXDATA_TXDATA_SHIFT   0

Shift value for I2C_TXDATA

Definition at line 330 of file efm32wg_i2c.h.

#define I2C_CLKDIV_DIV_DEFAULT   (_I2C_CLKDIV_DIV_DEFAULT << 0)

Shifted mode DEFAULT for I2C_CLKDIV

Definition at line 293 of file efm32wg_i2c.h.

#define I2C_CMD_ABORT   (0x1UL << 5)

Abort transmission

Definition at line 175 of file efm32wg_i2c.h.

Referenced by I2C_TransferInit().

#define I2C_CMD_ABORT_DEFAULT   (_I2C_CMD_ABORT_DEFAULT << 5)

Shifted mode DEFAULT for I2C_CMD

Definition at line 179 of file efm32wg_i2c.h.

#define I2C_CMD_ACK   (0x1UL << 2)

Send ACK

Definition at line 160 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_CMD_ACK_DEFAULT   (_I2C_CMD_ACK_DEFAULT << 2)

Shifted mode DEFAULT for I2C_CMD

Definition at line 164 of file efm32wg_i2c.h.

#define I2C_CMD_CLEARPC   (0x1UL << 7)

Clear Pending Commands

Definition at line 185 of file efm32wg_i2c.h.

Referenced by I2C_TransferInit().

#define I2C_CMD_CLEARPC_DEFAULT   (_I2C_CMD_CLEARPC_DEFAULT << 7)

Shifted mode DEFAULT for I2C_CMD

Definition at line 189 of file efm32wg_i2c.h.

#define I2C_CMD_CLEARTX   (0x1UL << 6)

Clear TX

Definition at line 180 of file efm32wg_i2c.h.

Referenced by I2C_TransferInit().

#define I2C_CMD_CLEARTX_DEFAULT   (_I2C_CMD_CLEARTX_DEFAULT << 6)

Shifted mode DEFAULT for I2C_CMD

Definition at line 184 of file efm32wg_i2c.h.

#define I2C_CMD_CONT   (0x1UL << 4)

Continue transmission

Definition at line 170 of file efm32wg_i2c.h.

#define I2C_CMD_CONT_DEFAULT   (_I2C_CMD_CONT_DEFAULT << 4)

Shifted mode DEFAULT for I2C_CMD

Definition at line 174 of file efm32wg_i2c.h.

#define I2C_CMD_NACK   (0x1UL << 3)

Send NACK

Definition at line 165 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_CMD_NACK_DEFAULT   (_I2C_CMD_NACK_DEFAULT << 3)

Shifted mode DEFAULT for I2C_CMD

Definition at line 169 of file efm32wg_i2c.h.

#define I2C_CMD_START   (0x1UL << 0)

Send start condition

Definition at line 150 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_CMD_START_DEFAULT   (_I2C_CMD_START_DEFAULT << 0)

Shifted mode DEFAULT for I2C_CMD

Definition at line 154 of file efm32wg_i2c.h.

#define I2C_CMD_STOP   (0x1UL << 1)

Send stop condition

Definition at line 155 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_CMD_STOP_DEFAULT   (_I2C_CMD_STOP_DEFAULT << 1)

Shifted mode DEFAULT for I2C_CMD

Definition at line 159 of file efm32wg_i2c.h.

#define I2C_CTRL_ARBDIS   (0x1UL << 5)

Arbitration Disable

Definition at line 93 of file efm32wg_i2c.h.

#define I2C_CTRL_ARBDIS_DEFAULT   (_I2C_CTRL_ARBDIS_DEFAULT << 5)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 97 of file efm32wg_i2c.h.

#define I2C_CTRL_AUTOACK   (0x1UL << 2)

Automatic Acknowledge

Definition at line 78 of file efm32wg_i2c.h.

Referenced by setupI2C().

#define I2C_CTRL_AUTOACK_DEFAULT   (_I2C_CTRL_AUTOACK_DEFAULT << 2)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 82 of file efm32wg_i2c.h.

#define I2C_CTRL_AUTOSE   (0x1UL << 3)

Automatic STOP when Empty

Definition at line 83 of file efm32wg_i2c.h.

#define I2C_CTRL_AUTOSE_DEFAULT   (_I2C_CTRL_AUTOSE_DEFAULT << 3)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 87 of file efm32wg_i2c.h.

#define I2C_CTRL_AUTOSN   (0x1UL << 4)

Automatic STOP on NACK

Definition at line 88 of file efm32wg_i2c.h.

Referenced by setupI2C().

#define I2C_CTRL_AUTOSN_DEFAULT   (_I2C_CTRL_AUTOSN_DEFAULT << 4)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 92 of file efm32wg_i2c.h.

#define I2C_CTRL_BITO_160PCC   (_I2C_CTRL_BITO_160PCC << 12)

Shifted mode 160PCC for I2C_CTRL

Definition at line 124 of file efm32wg_i2c.h.

#define I2C_CTRL_BITO_40PCC   (_I2C_CTRL_BITO_40PCC << 12)

Shifted mode 40PCC for I2C_CTRL

Definition at line 122 of file efm32wg_i2c.h.

#define I2C_CTRL_BITO_80PCC   (_I2C_CTRL_BITO_80PCC << 12)

Shifted mode 80PCC for I2C_CTRL

Definition at line 123 of file efm32wg_i2c.h.

#define I2C_CTRL_BITO_DEFAULT   (_I2C_CTRL_BITO_DEFAULT << 12)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 120 of file efm32wg_i2c.h.

#define I2C_CTRL_BITO_OFF   (_I2C_CTRL_BITO_OFF << 12)

Shifted mode OFF for I2C_CTRL

Definition at line 121 of file efm32wg_i2c.h.

#define I2C_CTRL_CLHR_ASYMMETRIC   (_I2C_CTRL_CLHR_ASYMMETRIC << 8)

Shifted mode ASYMMETRIC for I2C_CTRL

Definition at line 111 of file efm32wg_i2c.h.

#define I2C_CTRL_CLHR_DEFAULT   (_I2C_CTRL_CLHR_DEFAULT << 8)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 109 of file efm32wg_i2c.h.

#define I2C_CTRL_CLHR_FAST   (_I2C_CTRL_CLHR_FAST << 8)

Shifted mode FAST for I2C_CTRL

Definition at line 112 of file efm32wg_i2c.h.

#define I2C_CTRL_CLHR_STANDARD   (_I2C_CTRL_CLHR_STANDARD << 8)

Shifted mode STANDARD for I2C_CTRL

Definition at line 110 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_1024PPC   (_I2C_CTRL_CLTO_1024PPC << 16)

Shifted mode 1024PPC for I2C_CTRL

Definition at line 145 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_160PCC   (_I2C_CTRL_CLTO_160PCC << 16)

Shifted mode 160PCC for I2C_CTRL

Definition at line 143 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_320PPC   (_I2C_CTRL_CLTO_320PPC << 16)

Shifted mode 320PPC for I2C_CTRL

Definition at line 144 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_40PCC   (_I2C_CTRL_CLTO_40PCC << 16)

Shifted mode 40PCC for I2C_CTRL

Definition at line 141 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_80PCC   (_I2C_CTRL_CLTO_80PCC << 16)

Shifted mode 80PCC for I2C_CTRL

Definition at line 142 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_DEFAULT   (_I2C_CTRL_CLTO_DEFAULT << 16)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 139 of file efm32wg_i2c.h.

#define I2C_CTRL_CLTO_OFF   (_I2C_CTRL_CLTO_OFF << 16)

Shifted mode OFF for I2C_CTRL

Definition at line 140 of file efm32wg_i2c.h.

#define I2C_CTRL_EN   (0x1UL << 0)

I2C Enable

Definition at line 68 of file efm32wg_i2c.h.

#define I2C_CTRL_EN_DEFAULT   (_I2C_CTRL_EN_DEFAULT << 0)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 72 of file efm32wg_i2c.h.

#define I2C_CTRL_GCAMEN   (0x1UL << 6)

General Call Address Match Enable

Definition at line 98 of file efm32wg_i2c.h.

#define I2C_CTRL_GCAMEN_DEFAULT   (_I2C_CTRL_GCAMEN_DEFAULT << 6)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 102 of file efm32wg_i2c.h.

#define I2C_CTRL_GIBITO   (0x1UL << 15)

Go Idle on Bus Idle Timeout

Definition at line 125 of file efm32wg_i2c.h.

#define I2C_CTRL_GIBITO_DEFAULT   (_I2C_CTRL_GIBITO_DEFAULT << 15)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 129 of file efm32wg_i2c.h.

#define I2C_CTRL_SLAVE   (0x1UL << 1)

Addressable as Slave

Definition at line 73 of file efm32wg_i2c.h.

Referenced by I2C_BusFreqSet().

#define I2C_CTRL_SLAVE_DEFAULT   (_I2C_CTRL_SLAVE_DEFAULT << 1)

Shifted mode DEFAULT for I2C_CTRL

Definition at line 77 of file efm32wg_i2c.h.

#define I2C_IEN_ACK   (0x1UL << 6)

Acknowledge Received Interrupt Enable

Definition at line 615 of file efm32wg_i2c.h.

#define I2C_IEN_ACK_DEFAULT   (_I2C_IEN_ACK_DEFAULT << 6)

Shifted mode DEFAULT for I2C_IEN

Definition at line 619 of file efm32wg_i2c.h.

#define I2C_IEN_ADDR   (0x1UL << 2)

Address Interrupt Enable

Definition at line 595 of file efm32wg_i2c.h.

#define I2C_IEN_ADDR_DEFAULT   (_I2C_IEN_ADDR_DEFAULT << 2)

Shifted mode DEFAULT for I2C_IEN

Definition at line 599 of file efm32wg_i2c.h.

#define I2C_IEN_ARBLOST   (0x1UL << 9)

Arbitration Lost Interrupt Enable

Definition at line 630 of file efm32wg_i2c.h.

#define I2C_IEN_ARBLOST_DEFAULT   (_I2C_IEN_ARBLOST_DEFAULT << 9)

Shifted mode DEFAULT for I2C_IEN

Definition at line 634 of file efm32wg_i2c.h.

#define I2C_IEN_BITO   (0x1UL << 14)

Bus Idle Timeout Interrupt Enable

Definition at line 655 of file efm32wg_i2c.h.

#define I2C_IEN_BITO_DEFAULT   (_I2C_IEN_BITO_DEFAULT << 14)

Shifted mode DEFAULT for I2C_IEN

Definition at line 659 of file efm32wg_i2c.h.

#define I2C_IEN_BUSERR   (0x1UL << 10)

Bus Error Interrupt Enable

Definition at line 635 of file efm32wg_i2c.h.

#define I2C_IEN_BUSERR_DEFAULT   (_I2C_IEN_BUSERR_DEFAULT << 10)

Shifted mode DEFAULT for I2C_IEN

Definition at line 639 of file efm32wg_i2c.h.

#define I2C_IEN_BUSHOLD   (0x1UL << 11)

Bus Held Interrupt Enable

Definition at line 640 of file efm32wg_i2c.h.

#define I2C_IEN_BUSHOLD_DEFAULT   (_I2C_IEN_BUSHOLD_DEFAULT << 11)

Shifted mode DEFAULT for I2C_IEN

Definition at line 644 of file efm32wg_i2c.h.

#define I2C_IEN_CLTO   (0x1UL << 15)

Clock Low Interrupt Enable

Definition at line 660 of file efm32wg_i2c.h.

#define I2C_IEN_CLTO_DEFAULT   (_I2C_IEN_CLTO_DEFAULT << 15)

Shifted mode DEFAULT for I2C_IEN

Definition at line 664 of file efm32wg_i2c.h.

#define I2C_IEN_MSTOP   (0x1UL << 8)

MSTOP Interrupt Enable

Definition at line 625 of file efm32wg_i2c.h.

#define I2C_IEN_MSTOP_DEFAULT   (_I2C_IEN_MSTOP_DEFAULT << 8)

Shifted mode DEFAULT for I2C_IEN

Definition at line 629 of file efm32wg_i2c.h.

#define I2C_IEN_NACK   (0x1UL << 7)

Not Acknowledge Received Interrupt Enable

Definition at line 620 of file efm32wg_i2c.h.

#define I2C_IEN_NACK_DEFAULT   (_I2C_IEN_NACK_DEFAULT << 7)

Shifted mode DEFAULT for I2C_IEN

Definition at line 624 of file efm32wg_i2c.h.

#define I2C_IEN_RSTART   (0x1UL << 1)

Repeated START condition Interrupt Enable

Definition at line 590 of file efm32wg_i2c.h.

#define I2C_IEN_RSTART_DEFAULT   (_I2C_IEN_RSTART_DEFAULT << 1)

Shifted mode DEFAULT for I2C_IEN

Definition at line 594 of file efm32wg_i2c.h.

#define I2C_IEN_RXDATAV   (0x1UL << 5)

Receive Data Valid Interrupt Enable

Definition at line 610 of file efm32wg_i2c.h.

#define I2C_IEN_RXDATAV_DEFAULT   (_I2C_IEN_RXDATAV_DEFAULT << 5)

Shifted mode DEFAULT for I2C_IEN

Definition at line 614 of file efm32wg_i2c.h.

#define I2C_IEN_RXUF   (0x1UL << 13)

Receive Buffer Underflow Interrupt Enable

Definition at line 650 of file efm32wg_i2c.h.

#define I2C_IEN_RXUF_DEFAULT   (_I2C_IEN_RXUF_DEFAULT << 13)

Shifted mode DEFAULT for I2C_IEN

Definition at line 654 of file efm32wg_i2c.h.

#define I2C_IEN_SSTOP   (0x1UL << 16)

SSTOP Interrupt Enable

Definition at line 665 of file efm32wg_i2c.h.

#define I2C_IEN_SSTOP_DEFAULT   (_I2C_IEN_SSTOP_DEFAULT << 16)

Shifted mode DEFAULT for I2C_IEN

Definition at line 669 of file efm32wg_i2c.h.

#define I2C_IEN_START   (0x1UL << 0)

START Condition Interrupt Enable

Definition at line 585 of file efm32wg_i2c.h.

#define I2C_IEN_START_DEFAULT   (_I2C_IEN_START_DEFAULT << 0)

Shifted mode DEFAULT for I2C_IEN

Definition at line 589 of file efm32wg_i2c.h.

#define I2C_IEN_TXBL   (0x1UL << 4)

Transmit Buffer level Interrupt Enable

Definition at line 605 of file efm32wg_i2c.h.

#define I2C_IEN_TXBL_DEFAULT   (_I2C_IEN_TXBL_DEFAULT << 4)

Shifted mode DEFAULT for I2C_IEN

Definition at line 609 of file efm32wg_i2c.h.

#define I2C_IEN_TXC   (0x1UL << 3)

Transfer Completed Interrupt Enable

Definition at line 600 of file efm32wg_i2c.h.

#define I2C_IEN_TXC_DEFAULT   (_I2C_IEN_TXC_DEFAULT << 3)

Shifted mode DEFAULT for I2C_IEN

Definition at line 604 of file efm32wg_i2c.h.

#define I2C_IEN_TXOF   (0x1UL << 12)

Transmit Buffer Overflow Interrupt Enable

Definition at line 645 of file efm32wg_i2c.h.

#define I2C_IEN_TXOF_DEFAULT   (_I2C_IEN_TXOF_DEFAULT << 12)

Shifted mode DEFAULT for I2C_IEN

Definition at line 649 of file efm32wg_i2c.h.

#define I2C_IF_ACK   (0x1UL << 6)

Acknowledge Received Interrupt Flag

Definition at line 368 of file efm32wg_i2c.h.

Referenced by I2C_Transfer(), and I2C_TransferInit().

#define I2C_IF_ACK_DEFAULT   (_I2C_IF_ACK_DEFAULT << 6)

Shifted mode DEFAULT for I2C_IF

Definition at line 372 of file efm32wg_i2c.h.

#define I2C_IF_ADDR   (0x1UL << 2)

Address Interrupt Flag

Definition at line 348 of file efm32wg_i2c.h.

#define I2C_IF_ADDR_DEFAULT   (_I2C_IF_ADDR_DEFAULT << 2)

Shifted mode DEFAULT for I2C_IF

Definition at line 352 of file efm32wg_i2c.h.

#define I2C_IF_ARBLOST   (0x1UL << 9)

Arbitration Lost Interrupt Flag

Definition at line 383 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_IF_ARBLOST_DEFAULT   (_I2C_IF_ARBLOST_DEFAULT << 9)

Shifted mode DEFAULT for I2C_IF

Definition at line 387 of file efm32wg_i2c.h.

#define I2C_IF_BITO   (0x1UL << 14)

Bus Idle Timeout Interrupt Flag

Definition at line 408 of file efm32wg_i2c.h.

#define I2C_IF_BITO_DEFAULT   (_I2C_IF_BITO_DEFAULT << 14)

Shifted mode DEFAULT for I2C_IF

Definition at line 412 of file efm32wg_i2c.h.

#define I2C_IF_BUSERR   (0x1UL << 10)

Bus Error Interrupt Flag

Definition at line 388 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_IF_BUSERR_DEFAULT   (_I2C_IF_BUSERR_DEFAULT << 10)

Shifted mode DEFAULT for I2C_IF

Definition at line 392 of file efm32wg_i2c.h.

#define I2C_IF_BUSHOLD   (0x1UL << 11)

Bus Held Interrupt Flag

Definition at line 393 of file efm32wg_i2c.h.

#define I2C_IF_BUSHOLD_DEFAULT   (_I2C_IF_BUSHOLD_DEFAULT << 11)

Shifted mode DEFAULT for I2C_IF

Definition at line 397 of file efm32wg_i2c.h.

#define I2C_IF_CLTO   (0x1UL << 15)

Clock Low Timeout Interrupt Flag

Definition at line 413 of file efm32wg_i2c.h.

#define I2C_IF_CLTO_DEFAULT   (_I2C_IF_CLTO_DEFAULT << 15)

Shifted mode DEFAULT for I2C_IF

Definition at line 417 of file efm32wg_i2c.h.

#define I2C_IF_MSTOP   (0x1UL << 8)

Master STOP Condition Interrupt Flag

Definition at line 378 of file efm32wg_i2c.h.

Referenced by I2C_Transfer(), and I2C_TransferInit().

#define I2C_IF_MSTOP_DEFAULT   (_I2C_IF_MSTOP_DEFAULT << 8)

Shifted mode DEFAULT for I2C_IF

Definition at line 382 of file efm32wg_i2c.h.

#define I2C_IF_NACK   (0x1UL << 7)

Not Acknowledge Received Interrupt Flag

Definition at line 373 of file efm32wg_i2c.h.

Referenced by I2C_Transfer(), and I2C_TransferInit().

#define I2C_IF_NACK_DEFAULT   (_I2C_IF_NACK_DEFAULT << 7)

Shifted mode DEFAULT for I2C_IF

Definition at line 377 of file efm32wg_i2c.h.

#define I2C_IF_RSTART   (0x1UL << 1)

Repeated START condition Interrupt Flag

Definition at line 343 of file efm32wg_i2c.h.

#define I2C_IF_RSTART_DEFAULT   (_I2C_IF_RSTART_DEFAULT << 1)

Shifted mode DEFAULT for I2C_IF

Definition at line 347 of file efm32wg_i2c.h.

#define I2C_IF_RXDATAV   (0x1UL << 5)

Receive Data Valid Interrupt Flag

Definition at line 363 of file efm32wg_i2c.h.

Referenced by I2C_Transfer(), and I2C_TransferInit().

#define I2C_IF_RXDATAV_DEFAULT   (_I2C_IF_RXDATAV_DEFAULT << 5)

Shifted mode DEFAULT for I2C_IF

Definition at line 367 of file efm32wg_i2c.h.

#define I2C_IF_RXUF   (0x1UL << 13)

Receive Buffer Underflow Interrupt Flag

Definition at line 403 of file efm32wg_i2c.h.

#define I2C_IF_RXUF_DEFAULT   (_I2C_IF_RXUF_DEFAULT << 13)

Shifted mode DEFAULT for I2C_IF

Definition at line 407 of file efm32wg_i2c.h.

#define I2C_IF_SSTOP   (0x1UL << 16)

Slave STOP condition Interrupt Flag

Definition at line 418 of file efm32wg_i2c.h.

#define I2C_IF_SSTOP_DEFAULT   (_I2C_IF_SSTOP_DEFAULT << 16)

Shifted mode DEFAULT for I2C_IF

Definition at line 422 of file efm32wg_i2c.h.

#define I2C_IF_START   (0x1UL << 0)

START condition Interrupt Flag

Definition at line 338 of file efm32wg_i2c.h.

#define I2C_IF_START_DEFAULT   (_I2C_IF_START_DEFAULT << 0)

Shifted mode DEFAULT for I2C_IF

Definition at line 342 of file efm32wg_i2c.h.

#define I2C_IF_TXBL   (0x1UL << 4)

Transmit Buffer Level Interrupt Flag

Definition at line 358 of file efm32wg_i2c.h.

#define I2C_IF_TXBL_DEFAULT   (_I2C_IF_TXBL_DEFAULT << 4)

Shifted mode DEFAULT for I2C_IF

Definition at line 362 of file efm32wg_i2c.h.

#define I2C_IF_TXC   (0x1UL << 3)

Transfer Completed Interrupt Flag

Definition at line 353 of file efm32wg_i2c.h.

#define I2C_IF_TXC_DEFAULT   (_I2C_IF_TXC_DEFAULT << 3)

Shifted mode DEFAULT for I2C_IF

Definition at line 357 of file efm32wg_i2c.h.

#define I2C_IF_TXOF   (0x1UL << 12)

Transmit Buffer Overflow Interrupt Flag

Definition at line 398 of file efm32wg_i2c.h.

#define I2C_IF_TXOF_DEFAULT   (_I2C_IF_TXOF_DEFAULT << 12)

Shifted mode DEFAULT for I2C_IF

Definition at line 402 of file efm32wg_i2c.h.

#define I2C_IFC_ACK   (0x1UL << 6)

Clear Acknowledge Received Interrupt Flag

Definition at line 526 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_IFC_ACK_DEFAULT   (_I2C_IFC_ACK_DEFAULT << 6)

Shifted mode DEFAULT for I2C_IFC

Definition at line 530 of file efm32wg_i2c.h.

#define I2C_IFC_ADDR   (0x1UL << 2)

Clear Address Interrupt Flag

Definition at line 516 of file efm32wg_i2c.h.

#define I2C_IFC_ADDR_DEFAULT   (_I2C_IFC_ADDR_DEFAULT << 2)

Shifted mode DEFAULT for I2C_IFC

Definition at line 520 of file efm32wg_i2c.h.

#define I2C_IFC_ARBLOST   (0x1UL << 9)

Clear Arbitration Lost Interrupt Flag

Definition at line 541 of file efm32wg_i2c.h.

#define I2C_IFC_ARBLOST_DEFAULT   (_I2C_IFC_ARBLOST_DEFAULT << 9)

Shifted mode DEFAULT for I2C_IFC

Definition at line 545 of file efm32wg_i2c.h.

#define I2C_IFC_BITO   (0x1UL << 14)

Clear Bus Idle Timeout Interrupt Flag

Definition at line 566 of file efm32wg_i2c.h.

#define I2C_IFC_BITO_DEFAULT   (_I2C_IFC_BITO_DEFAULT << 14)

Shifted mode DEFAULT for I2C_IFC

Definition at line 570 of file efm32wg_i2c.h.

#define I2C_IFC_BUSERR   (0x1UL << 10)

Clear Bus Error Interrupt Flag

Definition at line 546 of file efm32wg_i2c.h.

#define I2C_IFC_BUSERR_DEFAULT   (_I2C_IFC_BUSERR_DEFAULT << 10)

Shifted mode DEFAULT for I2C_IFC

Definition at line 550 of file efm32wg_i2c.h.

#define I2C_IFC_BUSHOLD   (0x1UL << 11)

Clear Bus Held Interrupt Flag

Definition at line 551 of file efm32wg_i2c.h.

#define I2C_IFC_BUSHOLD_DEFAULT   (_I2C_IFC_BUSHOLD_DEFAULT << 11)

Shifted mode DEFAULT for I2C_IFC

Definition at line 555 of file efm32wg_i2c.h.

#define I2C_IFC_CLTO   (0x1UL << 15)

Clear Clock Low Interrupt Flag

Definition at line 571 of file efm32wg_i2c.h.

#define I2C_IFC_CLTO_DEFAULT   (_I2C_IFC_CLTO_DEFAULT << 15)

Shifted mode DEFAULT for I2C_IFC

Definition at line 575 of file efm32wg_i2c.h.

#define I2C_IFC_MSTOP   (0x1UL << 8)

Clear MSTOP Interrupt Flag

Definition at line 536 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_IFC_MSTOP_DEFAULT   (_I2C_IFC_MSTOP_DEFAULT << 8)

Shifted mode DEFAULT for I2C_IFC

Definition at line 540 of file efm32wg_i2c.h.

#define I2C_IFC_NACK   (0x1UL << 7)

Clear Not Acknowledge Received Interrupt Flag

Definition at line 531 of file efm32wg_i2c.h.

Referenced by I2C_Transfer().

#define I2C_IFC_NACK_DEFAULT   (_I2C_IFC_NACK_DEFAULT << 7)

Shifted mode DEFAULT for I2C_IFC

Definition at line 535 of file efm32wg_i2c.h.

#define I2C_IFC_RSTART   (0x1UL << 1)

Clear Repeated START Interrupt Flag

Definition at line 511 of file efm32wg_i2c.h.

#define I2C_IFC_RSTART_DEFAULT   (_I2C_IFC_RSTART_DEFAULT << 1)

Shifted mode DEFAULT for I2C_IFC

Definition at line 515 of file efm32wg_i2c.h.

#define I2C_IFC_RXUF   (0x1UL << 13)

Clear Receive Buffer Underflow Interrupt Flag

Definition at line 561 of file efm32wg_i2c.h.

#define I2C_IFC_RXUF_DEFAULT   (_I2C_IFC_RXUF_DEFAULT << 13)

Shifted mode DEFAULT for I2C_IFC

Definition at line 565 of file efm32wg_i2c.h.

#define I2C_IFC_SSTOP   (0x1UL << 16)

Clear SSTOP Interrupt Flag

Definition at line 576 of file efm32wg_i2c.h.

#define I2C_IFC_SSTOP_DEFAULT   (_I2C_IFC_SSTOP_DEFAULT << 16)

Shifted mode DEFAULT for I2C_IFC

Definition at line 580 of file efm32wg_i2c.h.

#define I2C_IFC_START   (0x1UL << 0)

Clear START Interrupt Flag

Definition at line 506 of file efm32wg_i2c.h.

#define I2C_IFC_START_DEFAULT   (_I2C_IFC_START_DEFAULT << 0)

Shifted mode DEFAULT for I2C_IFC

Definition at line 510 of file efm32wg_i2c.h.

#define I2C_IFC_TXC   (0x1UL << 3)

Clear Transfer Completed Interrupt Flag

Definition at line 521 of file efm32wg_i2c.h.

#define I2C_IFC_TXC_DEFAULT   (_I2C_IFC_TXC_DEFAULT << 3)

Shifted mode DEFAULT for I2C_IFC

Definition at line 525 of file efm32wg_i2c.h.

#define I2C_IFC_TXOF   (0x1UL << 12)

Clear Transmit Buffer Overflow Interrupt Flag

Definition at line 556 of file efm32wg_i2c.h.

#define I2C_IFC_TXOF_DEFAULT   (_I2C_IFC_TXOF_DEFAULT << 12)

Shifted mode DEFAULT for I2C_IFC

Definition at line 560 of file efm32wg_i2c.h.

#define I2C_IFS_ACK   (0x1UL << 6)

Set Acknowledge Received Interrupt Flag

Definition at line 447 of file efm32wg_i2c.h.

#define I2C_IFS_ACK_DEFAULT   (_I2C_IFS_ACK_DEFAULT << 6)

Shifted mode DEFAULT for I2C_IFS

Definition at line 451 of file efm32wg_i2c.h.

#define I2C_IFS_ADDR   (0x1UL << 2)

Set Address Interrupt Flag

Definition at line 437 of file efm32wg_i2c.h.

#define I2C_IFS_ADDR_DEFAULT   (_I2C_IFS_ADDR_DEFAULT << 2)

Shifted mode DEFAULT for I2C_IFS

Definition at line 441 of file efm32wg_i2c.h.

#define I2C_IFS_ARBLOST   (0x1UL << 9)

Set Arbitration Lost Interrupt Flag

Definition at line 462 of file efm32wg_i2c.h.

#define I2C_IFS_ARBLOST_DEFAULT   (_I2C_IFS_ARBLOST_DEFAULT << 9)

Shifted mode DEFAULT for I2C_IFS

Definition at line 466 of file efm32wg_i2c.h.

#define I2C_IFS_BITO   (0x1UL << 14)

Set Bus Idle Timeout Interrupt Flag

Definition at line 487 of file efm32wg_i2c.h.

#define I2C_IFS_BITO_DEFAULT   (_I2C_IFS_BITO_DEFAULT << 14)

Shifted mode DEFAULT for I2C_IFS

Definition at line 491 of file efm32wg_i2c.h.

#define I2C_IFS_BUSERR   (0x1UL << 10)

Set Bus Error Interrupt Flag

Definition at line 467 of file efm32wg_i2c.h.

#define I2C_IFS_BUSERR_DEFAULT   (_I2C_IFS_BUSERR_DEFAULT << 10)

Shifted mode DEFAULT for I2C_IFS

Definition at line 471 of file efm32wg_i2c.h.

#define I2C_IFS_BUSHOLD   (0x1UL << 11)

Set Bus Held Interrupt Flag

Definition at line 472 of file efm32wg_i2c.h.

#define I2C_IFS_BUSHOLD_DEFAULT   (_I2C_IFS_BUSHOLD_DEFAULT << 11)

Shifted mode DEFAULT for I2C_IFS

Definition at line 476 of file efm32wg_i2c.h.

#define I2C_IFS_CLTO   (0x1UL << 15)

Set Clock Low Interrupt Flag

Definition at line 492 of file efm32wg_i2c.h.

#define I2C_IFS_CLTO_DEFAULT   (_I2C_IFS_CLTO_DEFAULT << 15)

Shifted mode DEFAULT for I2C_IFS

Definition at line 496 of file efm32wg_i2c.h.

#define I2C_IFS_MSTOP   (0x1UL << 8)

Set MSTOP Interrupt Flag

Definition at line 457 of file efm32wg_i2c.h.

#define I2C_IFS_MSTOP_DEFAULT   (_I2C_IFS_MSTOP_DEFAULT << 8)

Shifted mode DEFAULT for I2C_IFS

Definition at line 461 of file efm32wg_i2c.h.

#define I2C_IFS_NACK   (0x1UL << 7)

Set Not Acknowledge Received Interrupt Flag

Definition at line 452 of file efm32wg_i2c.h.

#define I2C_IFS_NACK_DEFAULT   (_I2C_IFS_NACK_DEFAULT << 7)

Shifted mode DEFAULT for I2C_IFS

Definition at line 456 of file efm32wg_i2c.h.

#define I2C_IFS_RSTART   (0x1UL << 1)

Set Repeated START Interrupt Flag

Definition at line 432 of file efm32wg_i2c.h.

#define I2C_IFS_RSTART_DEFAULT   (_I2C_IFS_RSTART_DEFAULT << 1)

Shifted mode DEFAULT for I2C_IFS

Definition at line 436 of file efm32wg_i2c.h.

#define I2C_IFS_RXUF   (0x1UL << 13)

Set Receive Buffer Underflow Interrupt Flag

Definition at line 482 of file efm32wg_i2c.h.

#define I2C_IFS_RXUF_DEFAULT   (_I2C_IFS_RXUF_DEFAULT << 13)

Shifted mode DEFAULT for I2C_IFS

Definition at line 486 of file efm32wg_i2c.h.

#define I2C_IFS_SSTOP   (0x1UL << 16)

Set SSTOP Interrupt Flag

Definition at line 497 of file efm32wg_i2c.h.

#define I2C_IFS_SSTOP_DEFAULT   (_I2C_IFS_SSTOP_DEFAULT << 16)

Shifted mode DEFAULT for I2C_IFS

Definition at line 501 of file efm32wg_i2c.h.

#define I2C_IFS_START   (0x1UL << 0)

Set START Interrupt Flag

Definition at line 427 of file efm32wg_i2c.h.

#define I2C_IFS_START_DEFAULT   (_I2C_IFS_START_DEFAULT << 0)

Shifted mode DEFAULT for I2C_IFS

Definition at line 431 of file efm32wg_i2c.h.

#define I2C_IFS_TXC   (0x1UL << 3)

Set Transfer Completed Interrupt Flag

Definition at line 442 of file efm32wg_i2c.h.

#define I2C_IFS_TXC_DEFAULT   (_I2C_IFS_TXC_DEFAULT << 3)

Shifted mode DEFAULT for I2C_IFS

Definition at line 446 of file efm32wg_i2c.h.

#define I2C_IFS_TXOF   (0x1UL << 12)

Set Transmit Buffer Overflow Interrupt Flag

Definition at line 477 of file efm32wg_i2c.h.

#define I2C_IFS_TXOF_DEFAULT   (_I2C_IFS_TXOF_DEFAULT << 12)

Shifted mode DEFAULT for I2C_IFS

Definition at line 481 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_DEFAULT   (_I2C_ROUTE_LOCATION_DEFAULT << 8)

Shifted mode DEFAULT for I2C_ROUTE

Definition at line 695 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC0   (_I2C_ROUTE_LOCATION_LOC0 << 8)

Shifted mode LOC0 for I2C_ROUTE

Definition at line 694 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC1   (_I2C_ROUTE_LOCATION_LOC1 << 8)

Shifted mode LOC1 for I2C_ROUTE

Definition at line 696 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC2   (_I2C_ROUTE_LOCATION_LOC2 << 8)

Shifted mode LOC2 for I2C_ROUTE

Definition at line 697 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC3   (_I2C_ROUTE_LOCATION_LOC3 << 8)

Shifted mode LOC3 for I2C_ROUTE

Definition at line 698 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC4   (_I2C_ROUTE_LOCATION_LOC4 << 8)

Shifted mode LOC4 for I2C_ROUTE

Definition at line 699 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC5   (_I2C_ROUTE_LOCATION_LOC5 << 8)

Shifted mode LOC5 for I2C_ROUTE

Definition at line 700 of file efm32wg_i2c.h.

#define I2C_ROUTE_LOCATION_LOC6   (_I2C_ROUTE_LOCATION_LOC6 << 8)

Shifted mode LOC6 for I2C_ROUTE

Definition at line 701 of file efm32wg_i2c.h.

#define I2C_ROUTE_SCLPEN   (0x1UL << 1)

SCL Pin Enable

Definition at line 679 of file efm32wg_i2c.h.

Referenced by I2CSPM_Init(), and setupI2C().

#define I2C_ROUTE_SCLPEN_DEFAULT   (_I2C_ROUTE_SCLPEN_DEFAULT << 1)

Shifted mode DEFAULT for I2C_ROUTE

Definition at line 683 of file efm32wg_i2c.h.

#define I2C_ROUTE_SDAPEN   (0x1UL << 0)

SDA Pin Enable

Definition at line 674 of file efm32wg_i2c.h.

Referenced by I2CSPM_Init(), and setupI2C().

#define I2C_ROUTE_SDAPEN_DEFAULT   (_I2C_ROUTE_SDAPEN_DEFAULT << 0)

Shifted mode DEFAULT for I2C_ROUTE

Definition at line 678 of file efm32wg_i2c.h.

#define I2C_RXDATA_RXDATA_DEFAULT   (_I2C_RXDATA_RXDATA_DEFAULT << 0)

Shifted mode DEFAULT for I2C_RXDATA

Definition at line 317 of file efm32wg_i2c.h.

#define I2C_RXDATAP_RXDATAP_DEFAULT   (_I2C_RXDATAP_RXDATAP_DEFAULT << 0)

Shifted mode DEFAULT for I2C_RXDATAP

Definition at line 325 of file efm32wg_i2c.h.

#define I2C_SADDR_ADDR_DEFAULT   (_I2C_SADDR_ADDR_DEFAULT << 1)

Shifted mode DEFAULT for I2C_SADDR

Definition at line 301 of file efm32wg_i2c.h.

#define I2C_SADDRMASK_MASK_DEFAULT   (_I2C_SADDRMASK_MASK_DEFAULT << 1)

Shifted mode DEFAULT for I2C_SADDRMASK

Definition at line 309 of file efm32wg_i2c.h.

#define I2C_STATE_BUSHOLD   (0x1UL << 4)

Bus Held

Definition at line 214 of file efm32wg_i2c.h.

#define I2C_STATE_BUSHOLD_DEFAULT   (_I2C_STATE_BUSHOLD_DEFAULT << 4)

Shifted mode DEFAULT for I2C_STATE

Definition at line 218 of file efm32wg_i2c.h.

#define I2C_STATE_BUSY   (0x1UL << 0)

Bus Busy

Definition at line 194 of file efm32wg_i2c.h.

Referenced by I2C_TransferInit().

#define I2C_STATE_BUSY_DEFAULT   (_I2C_STATE_BUSY_DEFAULT << 0)

Shifted mode DEFAULT for I2C_STATE

Definition at line 198 of file efm32wg_i2c.h.

#define I2C_STATE_MASTER   (0x1UL << 1)

Master

Definition at line 199 of file efm32wg_i2c.h.

#define I2C_STATE_MASTER_DEFAULT   (_I2C_STATE_MASTER_DEFAULT << 1)

Shifted mode DEFAULT for I2C_STATE

Definition at line 203 of file efm32wg_i2c.h.

#define I2C_STATE_NACKED   (0x1UL << 3)

Nack Received

Definition at line 209 of file efm32wg_i2c.h.

#define I2C_STATE_NACKED_DEFAULT   (_I2C_STATE_NACKED_DEFAULT << 3)

Shifted mode DEFAULT for I2C_STATE

Definition at line 213 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_ADDR   (_I2C_STATE_STATE_ADDR << 5)

Shifted mode ADDR for I2C_STATE

Definition at line 233 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_ADDRACK   (_I2C_STATE_STATE_ADDRACK << 5)

Shifted mode ADDRACK for I2C_STATE

Definition at line 234 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_DATA   (_I2C_STATE_STATE_DATA << 5)

Shifted mode DATA for I2C_STATE

Definition at line 235 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_DATAACK   (_I2C_STATE_STATE_DATAACK << 5)

Shifted mode DATAACK for I2C_STATE

Definition at line 236 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_DEFAULT   (_I2C_STATE_STATE_DEFAULT << 5)

Shifted mode DEFAULT for I2C_STATE

Definition at line 229 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_IDLE   (_I2C_STATE_STATE_IDLE << 5)

Shifted mode IDLE for I2C_STATE

Definition at line 230 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_START   (_I2C_STATE_STATE_START << 5)

Shifted mode START for I2C_STATE

Definition at line 232 of file efm32wg_i2c.h.

#define I2C_STATE_STATE_WAIT   (_I2C_STATE_STATE_WAIT << 5)

Shifted mode WAIT for I2C_STATE

Definition at line 231 of file efm32wg_i2c.h.

#define I2C_STATE_TRANSMITTER   (0x1UL << 2)

Transmitter

Definition at line 204 of file efm32wg_i2c.h.

#define I2C_STATE_TRANSMITTER_DEFAULT   (_I2C_STATE_TRANSMITTER_DEFAULT << 2)

Shifted mode DEFAULT for I2C_STATE

Definition at line 208 of file efm32wg_i2c.h.

#define I2C_STATUS_PABORT   (0x1UL << 5)

Pending abort

Definition at line 266 of file efm32wg_i2c.h.

#define I2C_STATUS_PABORT_DEFAULT   (_I2C_STATUS_PABORT_DEFAULT << 5)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 270 of file efm32wg_i2c.h.

#define I2C_STATUS_PACK   (0x1UL << 2)

Pending ACK

Definition at line 251 of file efm32wg_i2c.h.

#define I2C_STATUS_PACK_DEFAULT   (_I2C_STATUS_PACK_DEFAULT << 2)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 255 of file efm32wg_i2c.h.

#define I2C_STATUS_PCONT   (0x1UL << 4)

Pending continue

Definition at line 261 of file efm32wg_i2c.h.

#define I2C_STATUS_PCONT_DEFAULT   (_I2C_STATUS_PCONT_DEFAULT << 4)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 265 of file efm32wg_i2c.h.

#define I2C_STATUS_PNACK   (0x1UL << 3)

Pending NACK

Definition at line 256 of file efm32wg_i2c.h.

#define I2C_STATUS_PNACK_DEFAULT   (_I2C_STATUS_PNACK_DEFAULT << 3)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 260 of file efm32wg_i2c.h.

#define I2C_STATUS_PSTART   (0x1UL << 0)

Pending START

Definition at line 241 of file efm32wg_i2c.h.

#define I2C_STATUS_PSTART_DEFAULT   (_I2C_STATUS_PSTART_DEFAULT << 0)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 245 of file efm32wg_i2c.h.

#define I2C_STATUS_PSTOP   (0x1UL << 1)

Pending STOP

Definition at line 246 of file efm32wg_i2c.h.

#define I2C_STATUS_PSTOP_DEFAULT   (_I2C_STATUS_PSTOP_DEFAULT << 1)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 250 of file efm32wg_i2c.h.

#define I2C_STATUS_RXDATAV   (0x1UL << 8)

RX Data Valid

Definition at line 281 of file efm32wg_i2c.h.

#define I2C_STATUS_RXDATAV_DEFAULT   (_I2C_STATUS_RXDATAV_DEFAULT << 8)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 285 of file efm32wg_i2c.h.

#define I2C_STATUS_TXBL   (0x1UL << 7)

TX Buffer Level

Definition at line 276 of file efm32wg_i2c.h.

#define I2C_STATUS_TXBL_DEFAULT   (_I2C_STATUS_TXBL_DEFAULT << 7)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 280 of file efm32wg_i2c.h.

#define I2C_STATUS_TXC   (0x1UL << 6)

TX Complete

Definition at line 271 of file efm32wg_i2c.h.

#define I2C_STATUS_TXC_DEFAULT   (_I2C_STATUS_TXC_DEFAULT << 6)

Shifted mode DEFAULT for I2C_STATUS

Definition at line 275 of file efm32wg_i2c.h.

#define I2C_TXDATA_TXDATA_DEFAULT   (_I2C_TXDATA_TXDATA_DEFAULT << 0)

Shifted mode DEFAULT for I2C_TXDATA

Definition at line 333 of file efm32wg_i2c.h.