Detailed Description

Macros
#define	_ADC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL

#define	_ADC_BIASPROG_BIASPROG_MASK 0xFUL

#define	_ADC_BIASPROG_BIASPROG_SHIFT 0

#define	_ADC_BIASPROG_COMPBIAS_DEFAULT 0x00000007UL

#define	_ADC_BIASPROG_COMPBIAS_MASK 0xF00UL

#define	_ADC_BIASPROG_COMPBIAS_SHIFT 8

#define	_ADC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL

#define	_ADC_BIASPROG_HALFBIAS_MASK 0x40UL

#define	_ADC_BIASPROG_HALFBIAS_SHIFT 6

#define	_ADC_BIASPROG_MASK 0x00000F4FUL

#define	_ADC_BIASPROG_RESETVALUE 0x00000747UL

#define	_ADC_CAL_MASK 0x7F7F7F7FUL

#define	_ADC_CAL_RESETVALUE 0x3F003F00UL

#define	_ADC_CAL_SCANGAIN_DEFAULT 0x0000003FUL

#define	_ADC_CAL_SCANGAIN_MASK 0x7F000000UL

#define	_ADC_CAL_SCANGAIN_SHIFT 24

#define	_ADC_CAL_SCANOFFSET_DEFAULT 0x00000000UL

#define	_ADC_CAL_SCANOFFSET_MASK 0x7F0000UL

#define	_ADC_CAL_SCANOFFSET_SHIFT 16

#define	_ADC_CAL_SINGLEGAIN_DEFAULT 0x0000003FUL

#define	_ADC_CAL_SINGLEGAIN_MASK 0x7F00UL

#define	_ADC_CAL_SINGLEGAIN_SHIFT 8

#define	_ADC_CAL_SINGLEOFFSET_DEFAULT 0x00000000UL

#define	_ADC_CAL_SINGLEOFFSET_MASK 0x7FUL

#define	_ADC_CAL_SINGLEOFFSET_SHIFT 0

#define	_ADC_CMD_MASK 0x0000000FUL

#define	_ADC_CMD_RESETVALUE 0x00000000UL

#define	_ADC_CMD_SCANSTART_DEFAULT 0x00000000UL

#define	_ADC_CMD_SCANSTART_MASK 0x4UL

#define	_ADC_CMD_SCANSTART_SHIFT 2

#define	_ADC_CMD_SCANSTOP_DEFAULT 0x00000000UL

#define	_ADC_CMD_SCANSTOP_MASK 0x8UL

#define	_ADC_CMD_SCANSTOP_SHIFT 3

#define	_ADC_CMD_SINGLESTART_DEFAULT 0x00000000UL

#define	_ADC_CMD_SINGLESTART_MASK 0x1UL

#define	_ADC_CMD_SINGLESTART_SHIFT 0

#define	_ADC_CMD_SINGLESTOP_DEFAULT 0x00000000UL

#define	_ADC_CMD_SINGLESTOP_MASK 0x2UL

#define	_ADC_CMD_SINGLESTOP_SHIFT 1

#define	_ADC_CTRL_LPFMODE_BYPASS 0x00000000UL

#define	_ADC_CTRL_LPFMODE_DECAP 0x00000001UL

#define	_ADC_CTRL_LPFMODE_DEFAULT 0x00000000UL

#define	_ADC_CTRL_LPFMODE_MASK 0x30UL

#define	_ADC_CTRL_LPFMODE_RCFILT 0x00000002UL

#define	_ADC_CTRL_LPFMODE_SHIFT 4

#define	_ADC_CTRL_MASK 0x0F7F7F3BUL

#define	_ADC_CTRL_OVSRSEL_DEFAULT 0x00000000UL

#define	_ADC_CTRL_OVSRSEL_MASK 0xF000000UL

#define	_ADC_CTRL_OVSRSEL_SHIFT 24

#define	_ADC_CTRL_OVSRSEL_X1024 0x00000009UL

#define	_ADC_CTRL_OVSRSEL_X128 0x00000006UL

#define	_ADC_CTRL_OVSRSEL_X16 0x00000003UL

#define	_ADC_CTRL_OVSRSEL_X2 0x00000000UL

#define	_ADC_CTRL_OVSRSEL_X2048 0x0000000AUL

#define	_ADC_CTRL_OVSRSEL_X256 0x00000007UL

#define	_ADC_CTRL_OVSRSEL_X32 0x00000004UL

#define	_ADC_CTRL_OVSRSEL_X4 0x00000001UL

#define	_ADC_CTRL_OVSRSEL_X4096 0x0000000BUL

#define	_ADC_CTRL_OVSRSEL_X512 0x00000008UL

#define	_ADC_CTRL_OVSRSEL_X64 0x00000005UL

#define	_ADC_CTRL_OVSRSEL_X8 0x00000002UL

#define	_ADC_CTRL_PRESC_DEFAULT 0x00000000UL

#define	_ADC_CTRL_PRESC_MASK 0x7F00UL

#define	_ADC_CTRL_PRESC_NODIVISION 0x00000000UL

#define	_ADC_CTRL_PRESC_SHIFT 8

#define	_ADC_CTRL_RESETVALUE 0x001F0000UL

#define	_ADC_CTRL_TAILGATE_DEFAULT 0x00000000UL

#define	_ADC_CTRL_TAILGATE_MASK 0x8UL

#define	_ADC_CTRL_TAILGATE_SHIFT 3

#define	_ADC_CTRL_TIMEBASE_DEFAULT 0x0000001FUL

#define	_ADC_CTRL_TIMEBASE_MASK 0x7F0000UL

#define	_ADC_CTRL_TIMEBASE_SHIFT 16

#define	_ADC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

#define	_ADC_CTRL_WARMUPMODE_FASTBG 0x00000001UL

#define	_ADC_CTRL_WARMUPMODE_KEEPADCWARM 0x00000003UL

#define	_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM 0x00000002UL

#define	_ADC_CTRL_WARMUPMODE_MASK 0x3UL

#define	_ADC_CTRL_WARMUPMODE_NORMAL 0x00000000UL

#define	_ADC_CTRL_WARMUPMODE_SHIFT 0

#define	_ADC_IEN_MASK 0x00000303UL

#define	_ADC_IEN_RESETVALUE 0x00000000UL

#define	_ADC_IEN_SCAN_DEFAULT 0x00000000UL

#define	_ADC_IEN_SCAN_MASK 0x2UL

#define	_ADC_IEN_SCAN_SHIFT 1

#define	_ADC_IEN_SCANOF_DEFAULT 0x00000000UL

#define	_ADC_IEN_SCANOF_MASK 0x200UL

#define	_ADC_IEN_SCANOF_SHIFT 9

#define	_ADC_IEN_SINGLE_DEFAULT 0x00000000UL

#define	_ADC_IEN_SINGLE_MASK 0x1UL

#define	_ADC_IEN_SINGLE_SHIFT 0

#define	_ADC_IEN_SINGLEOF_DEFAULT 0x00000000UL

#define	_ADC_IEN_SINGLEOF_MASK 0x100UL

#define	_ADC_IEN_SINGLEOF_SHIFT 8

#define	_ADC_IF_MASK 0x00000303UL

#define	_ADC_IF_RESETVALUE 0x00000000UL

#define	_ADC_IF_SCAN_DEFAULT 0x00000000UL

#define	_ADC_IF_SCAN_MASK 0x2UL

#define	_ADC_IF_SCAN_SHIFT 1

#define	_ADC_IF_SCANOF_DEFAULT 0x00000000UL

#define	_ADC_IF_SCANOF_MASK 0x200UL

#define	_ADC_IF_SCANOF_SHIFT 9

#define	_ADC_IF_SINGLE_DEFAULT 0x00000000UL

#define	_ADC_IF_SINGLE_MASK 0x1UL

#define	_ADC_IF_SINGLE_SHIFT 0

#define	_ADC_IF_SINGLEOF_DEFAULT 0x00000000UL

#define	_ADC_IF_SINGLEOF_MASK 0x100UL

#define	_ADC_IF_SINGLEOF_SHIFT 8

#define	_ADC_IFC_MASK 0x00000303UL

#define	_ADC_IFC_RESETVALUE 0x00000000UL

#define	_ADC_IFC_SCAN_DEFAULT 0x00000000UL

#define	_ADC_IFC_SCAN_MASK 0x2UL

#define	_ADC_IFC_SCAN_SHIFT 1

#define	_ADC_IFC_SCANOF_DEFAULT 0x00000000UL

#define	_ADC_IFC_SCANOF_MASK 0x200UL

#define	_ADC_IFC_SCANOF_SHIFT 9

#define	_ADC_IFC_SINGLE_DEFAULT 0x00000000UL

#define	_ADC_IFC_SINGLE_MASK 0x1UL

#define	_ADC_IFC_SINGLE_SHIFT 0

#define	_ADC_IFC_SINGLEOF_DEFAULT 0x00000000UL

#define	_ADC_IFC_SINGLEOF_MASK 0x100UL

#define	_ADC_IFC_SINGLEOF_SHIFT 8

#define	_ADC_IFS_MASK 0x00000303UL

#define	_ADC_IFS_RESETVALUE 0x00000000UL

#define	_ADC_IFS_SCAN_DEFAULT 0x00000000UL

#define	_ADC_IFS_SCAN_MASK 0x2UL

#define	_ADC_IFS_SCAN_SHIFT 1

#define	_ADC_IFS_SCANOF_DEFAULT 0x00000000UL

#define	_ADC_IFS_SCANOF_MASK 0x200UL

#define	_ADC_IFS_SCANOF_SHIFT 9

#define	_ADC_IFS_SINGLE_DEFAULT 0x00000000UL

#define	_ADC_IFS_SINGLE_MASK 0x1UL

#define	_ADC_IFS_SINGLE_SHIFT 0

#define	_ADC_IFS_SINGLEOF_DEFAULT 0x00000000UL

#define	_ADC_IFS_SINGLEOF_MASK 0x100UL

#define	_ADC_IFS_SINGLEOF_SHIFT 8

#define	_ADC_SCANCTRL_ADJ_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_ADJ_LEFT 0x00000001UL

#define	_ADC_SCANCTRL_ADJ_MASK 0x4UL

#define	_ADC_SCANCTRL_ADJ_RIGHT 0x00000000UL

#define	_ADC_SCANCTRL_ADJ_SHIFT 2

#define	_ADC_SCANCTRL_AT_128CYCLES 0x00000007UL

#define	_ADC_SCANCTRL_AT_16CYCLES 0x00000004UL

#define	_ADC_SCANCTRL_AT_1CYCLE 0x00000000UL

#define	_ADC_SCANCTRL_AT_256CYCLES 0x00000008UL

#define	_ADC_SCANCTRL_AT_2CYCLES 0x00000001UL

#define	_ADC_SCANCTRL_AT_32CYCLES 0x00000005UL

#define	_ADC_SCANCTRL_AT_4CYCLES 0x00000002UL

#define	_ADC_SCANCTRL_AT_64CYCLES 0x00000006UL

#define	_ADC_SCANCTRL_AT_8CYCLES 0x00000003UL

#define	_ADC_SCANCTRL_AT_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_AT_MASK 0xF00000UL

#define	_ADC_SCANCTRL_AT_SHIFT 20

#define	_ADC_SCANCTRL_DIFF_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_DIFF_MASK 0x2UL

#define	_ADC_SCANCTRL_DIFF_SHIFT 1

#define	_ADC_SCANCTRL_INPUTMASK_CH0 0x00000001UL

#define	_ADC_SCANCTRL_INPUTMASK_CH0CH1 0x00000001UL

#define	_ADC_SCANCTRL_INPUTMASK_CH1 0x00000002UL

#define	_ADC_SCANCTRL_INPUTMASK_CH2 0x00000004UL

#define	_ADC_SCANCTRL_INPUTMASK_CH2CH3 0x00000002UL

#define	_ADC_SCANCTRL_INPUTMASK_CH3 0x00000008UL

#define	_ADC_SCANCTRL_INPUTMASK_CH4 0x00000010UL

#define	_ADC_SCANCTRL_INPUTMASK_CH4CH5 0x00000004UL

#define	_ADC_SCANCTRL_INPUTMASK_CH5 0x00000020UL

#define	_ADC_SCANCTRL_INPUTMASK_CH6 0x00000040UL

#define	_ADC_SCANCTRL_INPUTMASK_CH6CH7 0x00000008UL

#define	_ADC_SCANCTRL_INPUTMASK_CH7 0x00000080UL

#define	_ADC_SCANCTRL_INPUTMASK_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_INPUTMASK_MASK 0xFF00UL

#define	_ADC_SCANCTRL_INPUTMASK_SHIFT 8

#define	_ADC_SCANCTRL_MASK 0xF1F7FF37UL

#define	_ADC_SCANCTRL_PRSEN_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_PRSEN_MASK 0x1000000UL

#define	_ADC_SCANCTRL_PRSEN_SHIFT 24

#define	_ADC_SCANCTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_PRSSEL_MASK 0xF0000000UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_ADC_SCANCTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_ADC_SCANCTRL_PRSSEL_SHIFT 28

#define	_ADC_SCANCTRL_REF_1V25 0x00000000UL

#define	_ADC_SCANCTRL_REF_2V5 0x00000001UL

#define	_ADC_SCANCTRL_REF_2XEXTDIFF 0x00000005UL

#define	_ADC_SCANCTRL_REF_2XVDD 0x00000006UL

#define	_ADC_SCANCTRL_REF_5VDIFF 0x00000003UL

#define	_ADC_SCANCTRL_REF_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_REF_EXTSINGLE 0x00000004UL

#define	_ADC_SCANCTRL_REF_MASK 0x70000UL

#define	_ADC_SCANCTRL_REF_SHIFT 16

#define	_ADC_SCANCTRL_REF_VDD 0x00000002UL

#define	_ADC_SCANCTRL_REP_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_REP_MASK 0x1UL

#define	_ADC_SCANCTRL_REP_SHIFT 0

#define	_ADC_SCANCTRL_RES_12BIT 0x00000000UL

#define	_ADC_SCANCTRL_RES_6BIT 0x00000002UL

#define	_ADC_SCANCTRL_RES_8BIT 0x00000001UL

#define	_ADC_SCANCTRL_RES_DEFAULT 0x00000000UL

#define	_ADC_SCANCTRL_RES_MASK 0x30UL

#define	_ADC_SCANCTRL_RES_OVS 0x00000003UL

#define	_ADC_SCANCTRL_RES_SHIFT 4

#define	_ADC_SCANCTRL_RESETVALUE 0x00000000UL

#define	_ADC_SCANDATA_DATA_DEFAULT 0x00000000UL

#define	_ADC_SCANDATA_DATA_MASK 0xFFFFFFFFUL

#define	_ADC_SCANDATA_DATA_SHIFT 0

#define	_ADC_SCANDATA_MASK 0xFFFFFFFFUL

#define	_ADC_SCANDATA_RESETVALUE 0x00000000UL

#define	_ADC_SCANDATAP_DATAP_DEFAULT 0x00000000UL

#define	_ADC_SCANDATAP_DATAP_MASK 0xFFFFFFFFUL

#define	_ADC_SCANDATAP_DATAP_SHIFT 0

#define	_ADC_SCANDATAP_MASK 0xFFFFFFFFUL

#define	_ADC_SCANDATAP_RESETVALUE 0x00000000UL

#define	_ADC_SINGLECTRL_ADJ_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_ADJ_LEFT 0x00000001UL

#define	_ADC_SINGLECTRL_ADJ_MASK 0x4UL

#define	_ADC_SINGLECTRL_ADJ_RIGHT 0x00000000UL

#define	_ADC_SINGLECTRL_ADJ_SHIFT 2

#define	_ADC_SINGLECTRL_AT_128CYCLES 0x00000007UL

#define	_ADC_SINGLECTRL_AT_16CYCLES 0x00000004UL

#define	_ADC_SINGLECTRL_AT_1CYCLE 0x00000000UL

#define	_ADC_SINGLECTRL_AT_256CYCLES 0x00000008UL

#define	_ADC_SINGLECTRL_AT_2CYCLES 0x00000001UL

#define	_ADC_SINGLECTRL_AT_32CYCLES 0x00000005UL

#define	_ADC_SINGLECTRL_AT_4CYCLES 0x00000002UL

#define	_ADC_SINGLECTRL_AT_64CYCLES 0x00000006UL

#define	_ADC_SINGLECTRL_AT_8CYCLES 0x00000003UL

#define	_ADC_SINGLECTRL_AT_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_AT_MASK 0xF00000UL

#define	_ADC_SINGLECTRL_AT_SHIFT 20

#define	_ADC_SINGLECTRL_DIFF_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_DIFF_MASK 0x2UL

#define	_ADC_SINGLECTRL_DIFF_SHIFT 1

#define	_ADC_SINGLECTRL_INPUTSEL_CH0 0x00000000UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH0CH1 0x00000000UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH1 0x00000001UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH2 0x00000002UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH2CH3 0x00000001UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH3 0x00000003UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH4 0x00000004UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH4CH5 0x00000002UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH5 0x00000005UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH6 0x00000006UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH6CH7 0x00000003UL

#define	_ADC_SINGLECTRL_INPUTSEL_CH7 0x00000007UL

#define	_ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 0x0000000DUL

#define	_ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 0x0000000EUL

#define	_ADC_SINGLECTRL_INPUTSEL_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_INPUTSEL_DIFF0 0x00000004UL

#define	_ADC_SINGLECTRL_INPUTSEL_MASK 0xF00UL

#define	_ADC_SINGLECTRL_INPUTSEL_SHIFT 8

#define	_ADC_SINGLECTRL_INPUTSEL_TEMP 0x00000008UL

#define	_ADC_SINGLECTRL_INPUTSEL_VDD 0x0000000AUL

#define	_ADC_SINGLECTRL_INPUTSEL_VDDDIV3 0x00000009UL

#define	_ADC_SINGLECTRL_INPUTSEL_VREFDIV2 0x0000000CUL

#define	_ADC_SINGLECTRL_INPUTSEL_VSS 0x0000000BUL

#define	_ADC_SINGLECTRL_MASK 0xF1F70F37UL

#define	_ADC_SINGLECTRL_PRSEN_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_PRSEN_MASK 0x1000000UL

#define	_ADC_SINGLECTRL_PRSEN_SHIFT 24

#define	_ADC_SINGLECTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_PRSSEL_MASK 0xF0000000UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_ADC_SINGLECTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_ADC_SINGLECTRL_PRSSEL_SHIFT 28

#define	_ADC_SINGLECTRL_REF_1V25 0x00000000UL

#define	_ADC_SINGLECTRL_REF_2V5 0x00000001UL

#define	_ADC_SINGLECTRL_REF_2XEXTDIFF 0x00000005UL

#define	_ADC_SINGLECTRL_REF_2XVDD 0x00000006UL

#define	_ADC_SINGLECTRL_REF_5VDIFF 0x00000003UL

#define	_ADC_SINGLECTRL_REF_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_REF_EXTSINGLE 0x00000004UL

#define	_ADC_SINGLECTRL_REF_MASK 0x70000UL

#define	_ADC_SINGLECTRL_REF_SHIFT 16

#define	_ADC_SINGLECTRL_REF_VDD 0x00000002UL

#define	_ADC_SINGLECTRL_REP_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_REP_MASK 0x1UL

#define	_ADC_SINGLECTRL_REP_SHIFT 0

#define	_ADC_SINGLECTRL_RES_12BIT 0x00000000UL

#define	_ADC_SINGLECTRL_RES_6BIT 0x00000002UL

#define	_ADC_SINGLECTRL_RES_8BIT 0x00000001UL

#define	_ADC_SINGLECTRL_RES_DEFAULT 0x00000000UL

#define	_ADC_SINGLECTRL_RES_MASK 0x30UL

#define	_ADC_SINGLECTRL_RES_OVS 0x00000003UL

#define	_ADC_SINGLECTRL_RES_SHIFT 4

#define	_ADC_SINGLECTRL_RESETVALUE 0x00000000UL

#define	_ADC_SINGLEDATA_DATA_DEFAULT 0x00000000UL

#define	_ADC_SINGLEDATA_DATA_MASK 0xFFFFFFFFUL

#define	_ADC_SINGLEDATA_DATA_SHIFT 0

#define	_ADC_SINGLEDATA_MASK 0xFFFFFFFFUL

#define	_ADC_SINGLEDATA_RESETVALUE 0x00000000UL

#define	_ADC_SINGLEDATAP_DATAP_DEFAULT 0x00000000UL

#define	_ADC_SINGLEDATAP_DATAP_MASK 0xFFFFFFFFUL

#define	_ADC_SINGLEDATAP_DATAP_SHIFT 0

#define	_ADC_SINGLEDATAP_MASK 0xFFFFFFFFUL

#define	_ADC_SINGLEDATAP_RESETVALUE 0x00000000UL

#define	_ADC_STATUS_MASK 0x07031303UL

#define	_ADC_STATUS_RESETVALUE 0x00000000UL

#define	_ADC_STATUS_SCANACT_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SCANACT_MASK 0x2UL

#define	_ADC_STATUS_SCANACT_SHIFT 1

#define	_ADC_STATUS_SCANDATASRC_CH0 0x00000000UL

#define	_ADC_STATUS_SCANDATASRC_CH1 0x00000001UL

#define	_ADC_STATUS_SCANDATASRC_CH2 0x00000002UL

#define	_ADC_STATUS_SCANDATASRC_CH3 0x00000003UL

#define	_ADC_STATUS_SCANDATASRC_CH4 0x00000004UL

#define	_ADC_STATUS_SCANDATASRC_CH5 0x00000005UL

#define	_ADC_STATUS_SCANDATASRC_CH6 0x00000006UL

#define	_ADC_STATUS_SCANDATASRC_CH7 0x00000007UL

#define	_ADC_STATUS_SCANDATASRC_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SCANDATASRC_MASK 0x7000000UL

#define	_ADC_STATUS_SCANDATASRC_SHIFT 24

#define	_ADC_STATUS_SCANDV_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SCANDV_MASK 0x20000UL

#define	_ADC_STATUS_SCANDV_SHIFT 17

#define	_ADC_STATUS_SCANREFWARM_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SCANREFWARM_MASK 0x200UL

#define	_ADC_STATUS_SCANREFWARM_SHIFT 9

#define	_ADC_STATUS_SINGLEACT_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SINGLEACT_MASK 0x1UL

#define	_ADC_STATUS_SINGLEACT_SHIFT 0

#define	_ADC_STATUS_SINGLEDV_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SINGLEDV_MASK 0x10000UL

#define	_ADC_STATUS_SINGLEDV_SHIFT 16

#define	_ADC_STATUS_SINGLEREFWARM_DEFAULT 0x00000000UL

#define	_ADC_STATUS_SINGLEREFWARM_MASK 0x100UL

#define	_ADC_STATUS_SINGLEREFWARM_SHIFT 8

#define	_ADC_STATUS_WARM_DEFAULT 0x00000000UL

#define	_ADC_STATUS_WARM_MASK 0x1000UL

#define	_ADC_STATUS_WARM_SHIFT 12

#define	ADC_BIASPROG_BIASPROG_DEFAULT (_ADC_BIASPROG_BIASPROG_DEFAULT << 0)

#define	ADC_BIASPROG_COMPBIAS_DEFAULT (_ADC_BIASPROG_COMPBIAS_DEFAULT << 8)

#define	ADC_BIASPROG_HALFBIAS (0x1UL << 6)

#define	ADC_BIASPROG_HALFBIAS_DEFAULT (_ADC_BIASPROG_HALFBIAS_DEFAULT << 6)

#define	ADC_CAL_SCANGAIN_DEFAULT (_ADC_CAL_SCANGAIN_DEFAULT << 24)

#define	ADC_CAL_SCANOFFSET_DEFAULT (_ADC_CAL_SCANOFFSET_DEFAULT << 16)

#define	ADC_CAL_SINGLEGAIN_DEFAULT (_ADC_CAL_SINGLEGAIN_DEFAULT << 8)

#define	ADC_CAL_SINGLEOFFSET_DEFAULT (_ADC_CAL_SINGLEOFFSET_DEFAULT << 0)

#define	ADC_CMD_SCANSTART (0x1UL << 2)

#define	ADC_CMD_SCANSTART_DEFAULT (_ADC_CMD_SCANSTART_DEFAULT << 2)

#define	ADC_CMD_SCANSTOP (0x1UL << 3)

#define	ADC_CMD_SCANSTOP_DEFAULT (_ADC_CMD_SCANSTOP_DEFAULT << 3)

#define	ADC_CMD_SINGLESTART (0x1UL << 0)

#define	ADC_CMD_SINGLESTART_DEFAULT (_ADC_CMD_SINGLESTART_DEFAULT << 0)

#define	ADC_CMD_SINGLESTOP (0x1UL << 1)

#define	ADC_CMD_SINGLESTOP_DEFAULT (_ADC_CMD_SINGLESTOP_DEFAULT << 1)

#define	ADC_CTRL_LPFMODE_BYPASS (_ADC_CTRL_LPFMODE_BYPASS << 4)

#define	ADC_CTRL_LPFMODE_DECAP (_ADC_CTRL_LPFMODE_DECAP << 4)

#define	ADC_CTRL_LPFMODE_DEFAULT (_ADC_CTRL_LPFMODE_DEFAULT << 4)

#define	ADC_CTRL_LPFMODE_RCFILT (_ADC_CTRL_LPFMODE_RCFILT << 4)

#define	ADC_CTRL_OVSRSEL_DEFAULT (_ADC_CTRL_OVSRSEL_DEFAULT << 24)

#define	ADC_CTRL_OVSRSEL_X1024 (_ADC_CTRL_OVSRSEL_X1024 << 24)

#define	ADC_CTRL_OVSRSEL_X128 (_ADC_CTRL_OVSRSEL_X128 << 24)

#define	ADC_CTRL_OVSRSEL_X16 (_ADC_CTRL_OVSRSEL_X16 << 24)

#define	ADC_CTRL_OVSRSEL_X2 (_ADC_CTRL_OVSRSEL_X2 << 24)

#define	ADC_CTRL_OVSRSEL_X2048 (_ADC_CTRL_OVSRSEL_X2048 << 24)

#define	ADC_CTRL_OVSRSEL_X256 (_ADC_CTRL_OVSRSEL_X256 << 24)

#define	ADC_CTRL_OVSRSEL_X32 (_ADC_CTRL_OVSRSEL_X32 << 24)

#define	ADC_CTRL_OVSRSEL_X4 (_ADC_CTRL_OVSRSEL_X4 << 24)

#define	ADC_CTRL_OVSRSEL_X4096 (_ADC_CTRL_OVSRSEL_X4096 << 24)

#define	ADC_CTRL_OVSRSEL_X512 (_ADC_CTRL_OVSRSEL_X512 << 24)

#define	ADC_CTRL_OVSRSEL_X64 (_ADC_CTRL_OVSRSEL_X64 << 24)

#define	ADC_CTRL_OVSRSEL_X8 (_ADC_CTRL_OVSRSEL_X8 << 24)

#define	ADC_CTRL_PRESC_DEFAULT (_ADC_CTRL_PRESC_DEFAULT << 8)

#define	ADC_CTRL_PRESC_NODIVISION (_ADC_CTRL_PRESC_NODIVISION << 8)

#define	ADC_CTRL_TAILGATE (0x1UL << 3)

#define	ADC_CTRL_TAILGATE_DEFAULT (_ADC_CTRL_TAILGATE_DEFAULT << 3)

#define	ADC_CTRL_TIMEBASE_DEFAULT (_ADC_CTRL_TIMEBASE_DEFAULT << 16)

#define	ADC_CTRL_WARMUPMODE_DEFAULT (_ADC_CTRL_WARMUPMODE_DEFAULT << 0)

#define	ADC_CTRL_WARMUPMODE_FASTBG (_ADC_CTRL_WARMUPMODE_FASTBG << 0)

#define	ADC_CTRL_WARMUPMODE_KEEPADCWARM (_ADC_CTRL_WARMUPMODE_KEEPADCWARM << 0)

#define	ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM (_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM << 0)

#define	ADC_CTRL_WARMUPMODE_NORMAL (_ADC_CTRL_WARMUPMODE_NORMAL << 0)

#define	ADC_IEN_SCAN (0x1UL << 1)

#define	ADC_IEN_SCAN_DEFAULT (_ADC_IEN_SCAN_DEFAULT << 1)

#define	ADC_IEN_SCANOF (0x1UL << 9)

#define	ADC_IEN_SCANOF_DEFAULT (_ADC_IEN_SCANOF_DEFAULT << 9)

#define	ADC_IEN_SINGLE (0x1UL << 0)

#define	ADC_IEN_SINGLE_DEFAULT (_ADC_IEN_SINGLE_DEFAULT << 0)

#define	ADC_IEN_SINGLEOF (0x1UL << 8)

#define	ADC_IEN_SINGLEOF_DEFAULT (_ADC_IEN_SINGLEOF_DEFAULT << 8)

#define	ADC_IF_SCAN (0x1UL << 1)

#define	ADC_IF_SCAN_DEFAULT (_ADC_IF_SCAN_DEFAULT << 1)

#define	ADC_IF_SCANOF (0x1UL << 9)

#define	ADC_IF_SCANOF_DEFAULT (_ADC_IF_SCANOF_DEFAULT << 9)

#define	ADC_IF_SINGLE (0x1UL << 0)

#define	ADC_IF_SINGLE_DEFAULT (_ADC_IF_SINGLE_DEFAULT << 0)

#define	ADC_IF_SINGLEOF (0x1UL << 8)

#define	ADC_IF_SINGLEOF_DEFAULT (_ADC_IF_SINGLEOF_DEFAULT << 8)

#define	ADC_IFC_SCAN (0x1UL << 1)

#define	ADC_IFC_SCAN_DEFAULT (_ADC_IFC_SCAN_DEFAULT << 1)

#define	ADC_IFC_SCANOF (0x1UL << 9)

#define	ADC_IFC_SCANOF_DEFAULT (_ADC_IFC_SCANOF_DEFAULT << 9)

#define	ADC_IFC_SINGLE (0x1UL << 0)

#define	ADC_IFC_SINGLE_DEFAULT (_ADC_IFC_SINGLE_DEFAULT << 0)

#define	ADC_IFC_SINGLEOF (0x1UL << 8)

#define	ADC_IFC_SINGLEOF_DEFAULT (_ADC_IFC_SINGLEOF_DEFAULT << 8)

#define	ADC_IFS_SCAN (0x1UL << 1)

#define	ADC_IFS_SCAN_DEFAULT (_ADC_IFS_SCAN_DEFAULT << 1)

#define	ADC_IFS_SCANOF (0x1UL << 9)

#define	ADC_IFS_SCANOF_DEFAULT (_ADC_IFS_SCANOF_DEFAULT << 9)

#define	ADC_IFS_SINGLE (0x1UL << 0)

#define	ADC_IFS_SINGLE_DEFAULT (_ADC_IFS_SINGLE_DEFAULT << 0)

#define	ADC_IFS_SINGLEOF (0x1UL << 8)

#define	ADC_IFS_SINGLEOF_DEFAULT (_ADC_IFS_SINGLEOF_DEFAULT << 8)

#define	ADC_SCANCTRL_ADJ (0x1UL << 2)

#define	ADC_SCANCTRL_ADJ_DEFAULT (_ADC_SCANCTRL_ADJ_DEFAULT << 2)

#define	ADC_SCANCTRL_ADJ_LEFT (_ADC_SCANCTRL_ADJ_LEFT << 2)

#define	ADC_SCANCTRL_ADJ_RIGHT (_ADC_SCANCTRL_ADJ_RIGHT << 2)

#define	ADC_SCANCTRL_AT_128CYCLES (_ADC_SCANCTRL_AT_128CYCLES << 20)

#define	ADC_SCANCTRL_AT_16CYCLES (_ADC_SCANCTRL_AT_16CYCLES << 20)

#define	ADC_SCANCTRL_AT_1CYCLE (_ADC_SCANCTRL_AT_1CYCLE << 20)

#define	ADC_SCANCTRL_AT_256CYCLES (_ADC_SCANCTRL_AT_256CYCLES << 20)

#define	ADC_SCANCTRL_AT_2CYCLES (_ADC_SCANCTRL_AT_2CYCLES << 20)

#define	ADC_SCANCTRL_AT_32CYCLES (_ADC_SCANCTRL_AT_32CYCLES << 20)

#define	ADC_SCANCTRL_AT_4CYCLES (_ADC_SCANCTRL_AT_4CYCLES << 20)

#define	ADC_SCANCTRL_AT_64CYCLES (_ADC_SCANCTRL_AT_64CYCLES << 20)

#define	ADC_SCANCTRL_AT_8CYCLES (_ADC_SCANCTRL_AT_8CYCLES << 20)

#define	ADC_SCANCTRL_AT_DEFAULT (_ADC_SCANCTRL_AT_DEFAULT << 20)

#define	ADC_SCANCTRL_DIFF (0x1UL << 1)

#define	ADC_SCANCTRL_DIFF_DEFAULT (_ADC_SCANCTRL_DIFF_DEFAULT << 1)

#define	ADC_SCANCTRL_INPUTMASK_CH0 (_ADC_SCANCTRL_INPUTMASK_CH0 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH0CH1 (_ADC_SCANCTRL_INPUTMASK_CH0CH1 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH1 (_ADC_SCANCTRL_INPUTMASK_CH1 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH2 (_ADC_SCANCTRL_INPUTMASK_CH2 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH2CH3 (_ADC_SCANCTRL_INPUTMASK_CH2CH3 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH3 (_ADC_SCANCTRL_INPUTMASK_CH3 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH4 (_ADC_SCANCTRL_INPUTMASK_CH4 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH4CH5 (_ADC_SCANCTRL_INPUTMASK_CH4CH5 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH5 (_ADC_SCANCTRL_INPUTMASK_CH5 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH6 (_ADC_SCANCTRL_INPUTMASK_CH6 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH6CH7 (_ADC_SCANCTRL_INPUTMASK_CH6CH7 << 8)

#define	ADC_SCANCTRL_INPUTMASK_CH7 (_ADC_SCANCTRL_INPUTMASK_CH7 << 8)

#define	ADC_SCANCTRL_INPUTMASK_DEFAULT (_ADC_SCANCTRL_INPUTMASK_DEFAULT << 8)

#define	ADC_SCANCTRL_PRSEN (0x1UL << 24)

#define	ADC_SCANCTRL_PRSEN_DEFAULT (_ADC_SCANCTRL_PRSEN_DEFAULT << 24)

#define	ADC_SCANCTRL_PRSSEL_DEFAULT (_ADC_SCANCTRL_PRSSEL_DEFAULT << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH0 (_ADC_SCANCTRL_PRSSEL_PRSCH0 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH1 (_ADC_SCANCTRL_PRSSEL_PRSCH1 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH10 (_ADC_SCANCTRL_PRSSEL_PRSCH10 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH11 (_ADC_SCANCTRL_PRSSEL_PRSCH11 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH2 (_ADC_SCANCTRL_PRSSEL_PRSCH2 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH3 (_ADC_SCANCTRL_PRSSEL_PRSCH3 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH4 (_ADC_SCANCTRL_PRSSEL_PRSCH4 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH5 (_ADC_SCANCTRL_PRSSEL_PRSCH5 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH6 (_ADC_SCANCTRL_PRSSEL_PRSCH6 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH7 (_ADC_SCANCTRL_PRSSEL_PRSCH7 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH8 (_ADC_SCANCTRL_PRSSEL_PRSCH8 << 28)

#define	ADC_SCANCTRL_PRSSEL_PRSCH9 (_ADC_SCANCTRL_PRSSEL_PRSCH9 << 28)

#define	ADC_SCANCTRL_REF_1V25 (_ADC_SCANCTRL_REF_1V25 << 16)

#define	ADC_SCANCTRL_REF_2V5 (_ADC_SCANCTRL_REF_2V5 << 16)

#define	ADC_SCANCTRL_REF_2XEXTDIFF (_ADC_SCANCTRL_REF_2XEXTDIFF << 16)

#define	ADC_SCANCTRL_REF_2XVDD (_ADC_SCANCTRL_REF_2XVDD << 16)

#define	ADC_SCANCTRL_REF_5VDIFF (_ADC_SCANCTRL_REF_5VDIFF << 16)

#define	ADC_SCANCTRL_REF_DEFAULT (_ADC_SCANCTRL_REF_DEFAULT << 16)

#define	ADC_SCANCTRL_REF_EXTSINGLE (_ADC_SCANCTRL_REF_EXTSINGLE << 16)

#define	ADC_SCANCTRL_REF_VDD (_ADC_SCANCTRL_REF_VDD << 16)

#define	ADC_SCANCTRL_REP (0x1UL << 0)

#define	ADC_SCANCTRL_REP_DEFAULT (_ADC_SCANCTRL_REP_DEFAULT << 0)

#define	ADC_SCANCTRL_RES_12BIT (_ADC_SCANCTRL_RES_12BIT << 4)

#define	ADC_SCANCTRL_RES_6BIT (_ADC_SCANCTRL_RES_6BIT << 4)

#define	ADC_SCANCTRL_RES_8BIT (_ADC_SCANCTRL_RES_8BIT << 4)

#define	ADC_SCANCTRL_RES_DEFAULT (_ADC_SCANCTRL_RES_DEFAULT << 4)

#define	ADC_SCANCTRL_RES_OVS (_ADC_SCANCTRL_RES_OVS << 4)

#define	ADC_SCANDATA_DATA_DEFAULT (_ADC_SCANDATA_DATA_DEFAULT << 0)

#define	ADC_SCANDATAP_DATAP_DEFAULT (_ADC_SCANDATAP_DATAP_DEFAULT << 0)

#define	ADC_SINGLECTRL_ADJ (0x1UL << 2)

#define	ADC_SINGLECTRL_ADJ_DEFAULT (_ADC_SINGLECTRL_ADJ_DEFAULT << 2)

#define	ADC_SINGLECTRL_ADJ_LEFT (_ADC_SINGLECTRL_ADJ_LEFT << 2)

#define	ADC_SINGLECTRL_ADJ_RIGHT (_ADC_SINGLECTRL_ADJ_RIGHT << 2)

#define	ADC_SINGLECTRL_AT_128CYCLES (_ADC_SINGLECTRL_AT_128CYCLES << 20)

#define	ADC_SINGLECTRL_AT_16CYCLES (_ADC_SINGLECTRL_AT_16CYCLES << 20)

#define	ADC_SINGLECTRL_AT_1CYCLE (_ADC_SINGLECTRL_AT_1CYCLE << 20)

#define	ADC_SINGLECTRL_AT_256CYCLES (_ADC_SINGLECTRL_AT_256CYCLES << 20)

#define	ADC_SINGLECTRL_AT_2CYCLES (_ADC_SINGLECTRL_AT_2CYCLES << 20)

#define	ADC_SINGLECTRL_AT_32CYCLES (_ADC_SINGLECTRL_AT_32CYCLES << 20)

#define	ADC_SINGLECTRL_AT_4CYCLES (_ADC_SINGLECTRL_AT_4CYCLES << 20)

#define	ADC_SINGLECTRL_AT_64CYCLES (_ADC_SINGLECTRL_AT_64CYCLES << 20)

#define	ADC_SINGLECTRL_AT_8CYCLES (_ADC_SINGLECTRL_AT_8CYCLES << 20)

#define	ADC_SINGLECTRL_AT_DEFAULT (_ADC_SINGLECTRL_AT_DEFAULT << 20)

#define	ADC_SINGLECTRL_DIFF (0x1UL << 1)

#define	ADC_SINGLECTRL_DIFF_DEFAULT (_ADC_SINGLECTRL_DIFF_DEFAULT << 1)

#define	ADC_SINGLECTRL_INPUTSEL_CH0 (_ADC_SINGLECTRL_INPUTSEL_CH0 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH0CH1 (_ADC_SINGLECTRL_INPUTSEL_CH0CH1 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH1 (_ADC_SINGLECTRL_INPUTSEL_CH1 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH2 (_ADC_SINGLECTRL_INPUTSEL_CH2 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH2CH3 (_ADC_SINGLECTRL_INPUTSEL_CH2CH3 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH3 (_ADC_SINGLECTRL_INPUTSEL_CH3 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH4 (_ADC_SINGLECTRL_INPUTSEL_CH4 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH4CH5 (_ADC_SINGLECTRL_INPUTSEL_CH4CH5 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH5 (_ADC_SINGLECTRL_INPUTSEL_CH5 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH6 (_ADC_SINGLECTRL_INPUTSEL_CH6 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH6CH7 (_ADC_SINGLECTRL_INPUTSEL_CH6CH7 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_CH7 (_ADC_SINGLECTRL_INPUTSEL_CH7 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_DEFAULT (_ADC_SINGLECTRL_INPUTSEL_DEFAULT << 8)

#define	ADC_SINGLECTRL_INPUTSEL_DIFF0 (_ADC_SINGLECTRL_INPUTSEL_DIFF0 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_TEMP (_ADC_SINGLECTRL_INPUTSEL_TEMP << 8)

#define	ADC_SINGLECTRL_INPUTSEL_VDD (_ADC_SINGLECTRL_INPUTSEL_VDD << 8)

#define	ADC_SINGLECTRL_INPUTSEL_VDDDIV3 (_ADC_SINGLECTRL_INPUTSEL_VDDDIV3 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_VREFDIV2 (_ADC_SINGLECTRL_INPUTSEL_VREFDIV2 << 8)

#define	ADC_SINGLECTRL_INPUTSEL_VSS (_ADC_SINGLECTRL_INPUTSEL_VSS << 8)

#define	ADC_SINGLECTRL_PRSEN (0x1UL << 24)

#define	ADC_SINGLECTRL_PRSEN_DEFAULT (_ADC_SINGLECTRL_PRSEN_DEFAULT << 24)

#define	ADC_SINGLECTRL_PRSSEL_DEFAULT (_ADC_SINGLECTRL_PRSSEL_DEFAULT << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH0 (_ADC_SINGLECTRL_PRSSEL_PRSCH0 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH1 (_ADC_SINGLECTRL_PRSSEL_PRSCH1 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH10 (_ADC_SINGLECTRL_PRSSEL_PRSCH10 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH11 (_ADC_SINGLECTRL_PRSSEL_PRSCH11 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH2 (_ADC_SINGLECTRL_PRSSEL_PRSCH2 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH3 (_ADC_SINGLECTRL_PRSSEL_PRSCH3 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH4 (_ADC_SINGLECTRL_PRSSEL_PRSCH4 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH5 (_ADC_SINGLECTRL_PRSSEL_PRSCH5 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH6 (_ADC_SINGLECTRL_PRSSEL_PRSCH6 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH7 (_ADC_SINGLECTRL_PRSSEL_PRSCH7 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH8 (_ADC_SINGLECTRL_PRSSEL_PRSCH8 << 28)

#define	ADC_SINGLECTRL_PRSSEL_PRSCH9 (_ADC_SINGLECTRL_PRSSEL_PRSCH9 << 28)

#define	ADC_SINGLECTRL_REF_1V25 (_ADC_SINGLECTRL_REF_1V25 << 16)

#define	ADC_SINGLECTRL_REF_2V5 (_ADC_SINGLECTRL_REF_2V5 << 16)

#define	ADC_SINGLECTRL_REF_2XEXTDIFF (_ADC_SINGLECTRL_REF_2XEXTDIFF << 16)

#define	ADC_SINGLECTRL_REF_2XVDD (_ADC_SINGLECTRL_REF_2XVDD << 16)

#define	ADC_SINGLECTRL_REF_5VDIFF (_ADC_SINGLECTRL_REF_5VDIFF << 16)

#define	ADC_SINGLECTRL_REF_DEFAULT (_ADC_SINGLECTRL_REF_DEFAULT << 16)

#define	ADC_SINGLECTRL_REF_EXTSINGLE (_ADC_SINGLECTRL_REF_EXTSINGLE << 16)

#define	ADC_SINGLECTRL_REF_VDD (_ADC_SINGLECTRL_REF_VDD << 16)

#define	ADC_SINGLECTRL_REP (0x1UL << 0)

#define	ADC_SINGLECTRL_REP_DEFAULT (_ADC_SINGLECTRL_REP_DEFAULT << 0)

#define	ADC_SINGLECTRL_RES_12BIT (_ADC_SINGLECTRL_RES_12BIT << 4)

#define	ADC_SINGLECTRL_RES_6BIT (_ADC_SINGLECTRL_RES_6BIT << 4)

#define	ADC_SINGLECTRL_RES_8BIT (_ADC_SINGLECTRL_RES_8BIT << 4)

#define	ADC_SINGLECTRL_RES_DEFAULT (_ADC_SINGLECTRL_RES_DEFAULT << 4)

#define	ADC_SINGLECTRL_RES_OVS (_ADC_SINGLECTRL_RES_OVS << 4)

#define	ADC_SINGLEDATA_DATA_DEFAULT (_ADC_SINGLEDATA_DATA_DEFAULT << 0)

#define	ADC_SINGLEDATAP_DATAP_DEFAULT (_ADC_SINGLEDATAP_DATAP_DEFAULT << 0)

#define	ADC_STATUS_SCANACT (0x1UL << 1)

#define	ADC_STATUS_SCANACT_DEFAULT (_ADC_STATUS_SCANACT_DEFAULT << 1)

#define	ADC_STATUS_SCANDATASRC_CH0 (_ADC_STATUS_SCANDATASRC_CH0 << 24)

#define	ADC_STATUS_SCANDATASRC_CH1 (_ADC_STATUS_SCANDATASRC_CH1 << 24)

#define	ADC_STATUS_SCANDATASRC_CH2 (_ADC_STATUS_SCANDATASRC_CH2 << 24)

#define	ADC_STATUS_SCANDATASRC_CH3 (_ADC_STATUS_SCANDATASRC_CH3 << 24)

#define	ADC_STATUS_SCANDATASRC_CH4 (_ADC_STATUS_SCANDATASRC_CH4 << 24)

#define	ADC_STATUS_SCANDATASRC_CH5 (_ADC_STATUS_SCANDATASRC_CH5 << 24)

#define	ADC_STATUS_SCANDATASRC_CH6 (_ADC_STATUS_SCANDATASRC_CH6 << 24)

#define	ADC_STATUS_SCANDATASRC_CH7 (_ADC_STATUS_SCANDATASRC_CH7 << 24)

#define	ADC_STATUS_SCANDATASRC_DEFAULT (_ADC_STATUS_SCANDATASRC_DEFAULT << 24)

#define	ADC_STATUS_SCANDV (0x1UL << 17)

#define	ADC_STATUS_SCANDV_DEFAULT (_ADC_STATUS_SCANDV_DEFAULT << 17)

#define	ADC_STATUS_SCANREFWARM (0x1UL << 9)

#define	ADC_STATUS_SCANREFWARM_DEFAULT (_ADC_STATUS_SCANREFWARM_DEFAULT << 9)

#define	ADC_STATUS_SINGLEACT (0x1UL << 0)

#define	ADC_STATUS_SINGLEACT_DEFAULT (_ADC_STATUS_SINGLEACT_DEFAULT << 0)

#define	ADC_STATUS_SINGLEDV (0x1UL << 16)

#define	ADC_STATUS_SINGLEDV_DEFAULT (_ADC_STATUS_SINGLEDV_DEFAULT << 16)

#define	ADC_STATUS_SINGLEREFWARM (0x1UL << 8)

#define	ADC_STATUS_SINGLEREFWARM_DEFAULT (_ADC_STATUS_SINGLEREFWARM_DEFAULT << 8)

#define	ADC_STATUS_WARM (0x1UL << 12)

#define	ADC_STATUS_WARM_DEFAULT (_ADC_STATUS_WARM_DEFAULT << 12)

Macro Definition Documentation

#define _ADC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL

Mode DEFAULT for ADC_BIASPROG

Definition at line 660 of file efm32wg_adc.h.

#define _ADC_BIASPROG_BIASPROG_MASK 0xFUL

Bit mask for ADC_BIASPROG

Definition at line 659 of file efm32wg_adc.h.

#define _ADC_BIASPROG_BIASPROG_SHIFT 0

Shift value for ADC_BIASPROG

Definition at line 658 of file efm32wg_adc.h.

#define _ADC_BIASPROG_COMPBIAS_DEFAULT 0x00000007UL

Mode DEFAULT for ADC_BIASPROG

Definition at line 669 of file efm32wg_adc.h.

#define _ADC_BIASPROG_COMPBIAS_MASK 0xF00UL

Bit mask for ADC_COMPBIAS

Definition at line 668 of file efm32wg_adc.h.

#define _ADC_BIASPROG_COMPBIAS_SHIFT 8

Shift value for ADC_COMPBIAS

Definition at line 667 of file efm32wg_adc.h.

#define _ADC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL

Mode DEFAULT for ADC_BIASPROG

Definition at line 665 of file efm32wg_adc.h.

#define _ADC_BIASPROG_HALFBIAS_MASK 0x40UL

Bit mask for ADC_HALFBIAS

Definition at line 664 of file efm32wg_adc.h.

#define _ADC_BIASPROG_HALFBIAS_SHIFT 6

Shift value for ADC_HALFBIAS

Definition at line 663 of file efm32wg_adc.h.

#define _ADC_BIASPROG_MASK 0x00000F4FUL

Mask for ADC_BIASPROG

Definition at line 657 of file efm32wg_adc.h.

#define _ADC_BIASPROG_RESETVALUE 0x00000747UL

Default value for ADC_BIASPROG

Definition at line 656 of file efm32wg_adc.h.

Referenced by ADC_Reset().

#define _ADC_CAL_MASK 0x7F7F7F7FUL

Mask for ADC_CAL

Definition at line 637 of file efm32wg_adc.h.

#define _ADC_CAL_RESETVALUE 0x3F003F00UL

Default value for ADC_CAL

Definition at line 636 of file efm32wg_adc.h.

#define _ADC_CAL_SCANGAIN_DEFAULT 0x0000003FUL

Mode DEFAULT for ADC_CAL

Definition at line 652 of file efm32wg_adc.h.

#define _ADC_CAL_SCANGAIN_MASK 0x7F000000UL

Bit mask for ADC_SCANGAIN

Definition at line 651 of file efm32wg_adc.h.

#define _ADC_CAL_SCANGAIN_SHIFT 24

Shift value for ADC_SCANGAIN

Definition at line 650 of file efm32wg_adc.h.

#define _ADC_CAL_SCANOFFSET_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CAL

Definition at line 648 of file efm32wg_adc.h.

#define _ADC_CAL_SCANOFFSET_MASK 0x7F0000UL

Bit mask for ADC_SCANOFFSET

Definition at line 647 of file efm32wg_adc.h.

#define _ADC_CAL_SCANOFFSET_SHIFT 16

Shift value for ADC_SCANOFFSET

Definition at line 646 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEGAIN_DEFAULT 0x0000003FUL

Mode DEFAULT for ADC_CAL

Definition at line 644 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEGAIN_MASK 0x7F00UL

Bit mask for ADC_SINGLEGAIN

Definition at line 643 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEGAIN_SHIFT 8

Shift value for ADC_SINGLEGAIN

Definition at line 642 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEOFFSET_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CAL

Definition at line 640 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEOFFSET_MASK 0x7FUL

Bit mask for ADC_SINGLEOFFSET

Definition at line 639 of file efm32wg_adc.h.

#define _ADC_CAL_SINGLEOFFSET_SHIFT 0

Shift value for ADC_SINGLEOFFSET

Definition at line 638 of file efm32wg_adc.h.

#define _ADC_CMD_MASK 0x0000000FUL

Mask for ADC_CMD

Definition at line 138 of file efm32wg_adc.h.

#define _ADC_CMD_RESETVALUE 0x00000000UL

Default value for ADC_CMD

Definition at line 137 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTART_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CMD

Definition at line 152 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTART_MASK 0x4UL

Bit mask for ADC_SCANSTART

Definition at line 151 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTART_SHIFT 2

Shift value for ADC_SCANSTART

Definition at line 150 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTOP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CMD

Definition at line 157 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTOP_MASK 0x8UL

Bit mask for ADC_SCANSTOP

Definition at line 156 of file efm32wg_adc.h.

#define _ADC_CMD_SCANSTOP_SHIFT 3

Shift value for ADC_SCANSTOP

Definition at line 155 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTART_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CMD

Definition at line 142 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTART_MASK 0x1UL

Bit mask for ADC_SINGLESTART

Definition at line 141 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTART_SHIFT 0

Shift value for ADC_SINGLESTART

Definition at line 140 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTOP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CMD

Definition at line 147 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTOP_MASK 0x2UL

Bit mask for ADC_SINGLESTOP

Definition at line 146 of file efm32wg_adc.h.

#define _ADC_CMD_SINGLESTOP_SHIFT 1

Shift value for ADC_SINGLESTOP

Definition at line 145 of file efm32wg_adc.h.

#define _ADC_CTRL_LPFMODE_BYPASS 0x00000000UL

Mode BYPASS for ADC_CTRL

Definition at line 90 of file efm32wg_adc.h.

#define _ADC_CTRL_LPFMODE_DECAP 0x00000001UL

Mode DECAP for ADC_CTRL

Definition at line 91 of file efm32wg_adc.h.

#define _ADC_CTRL_LPFMODE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CTRL

Definition at line 89 of file efm32wg_adc.h.

#define _ADC_CTRL_LPFMODE_MASK 0x30UL

Bit mask for ADC_LPFMODE

Definition at line 88 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_LPFMODE_RCFILT 0x00000002UL

Mode RCFILT for ADC_CTRL

Definition at line 92 of file efm32wg_adc.h.

#define _ADC_CTRL_LPFMODE_SHIFT 4

Shift value for ADC_LPFMODE

Definition at line 87 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_MASK 0x0F7F7F3BUL

Mask for ADC_CTRL

Definition at line 69 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CTRL

Definition at line 109 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_MASK 0xF000000UL

Bit mask for ADC_OVSRSEL

Definition at line 108 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_SHIFT 24

Shift value for ADC_OVSRSEL

Definition at line 107 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_OVSRSEL_X1024 0x00000009UL

Mode X1024 for ADC_CTRL

Definition at line 119 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X128 0x00000006UL

Mode X128 for ADC_CTRL

Definition at line 116 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X16 0x00000003UL

Mode X16 for ADC_CTRL

Definition at line 113 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X2 0x00000000UL

Mode X2 for ADC_CTRL

Definition at line 110 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X2048 0x0000000AUL

Mode X2048 for ADC_CTRL

Definition at line 120 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X256 0x00000007UL

Mode X256 for ADC_CTRL

Definition at line 117 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X32 0x00000004UL

Mode X32 for ADC_CTRL

Definition at line 114 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X4 0x00000001UL

Mode X4 for ADC_CTRL

Definition at line 111 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X4096 0x0000000BUL

Mode X4096 for ADC_CTRL

Definition at line 121 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X512 0x00000008UL

Mode X512 for ADC_CTRL

Definition at line 118 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X64 0x00000005UL

Mode X64 for ADC_CTRL

Definition at line 115 of file efm32wg_adc.h.

#define _ADC_CTRL_OVSRSEL_X8 0x00000002UL

Mode X8 for ADC_CTRL

Definition at line 112 of file efm32wg_adc.h.

#define _ADC_CTRL_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CTRL

Definition at line 99 of file efm32wg_adc.h.

#define _ADC_CTRL_PRESC_MASK 0x7F00UL

Bit mask for ADC_PRESC

Definition at line 98 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for ADC_CTRL

Definition at line 100 of file efm32wg_adc.h.

#define _ADC_CTRL_PRESC_SHIFT 8

Shift value for ADC_PRESC

Definition at line 97 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_RESETVALUE 0x001F0000UL

Default value for ADC_CTRL

Definition at line 68 of file efm32wg_adc.h.

Referenced by ADC_Reset(), and adcInit().

#define _ADC_CTRL_TAILGATE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CTRL

Definition at line 85 of file efm32wg_adc.h.

#define _ADC_CTRL_TAILGATE_MASK 0x8UL

Bit mask for ADC_TAILGATE

Definition at line 84 of file efm32wg_adc.h.

#define _ADC_CTRL_TAILGATE_SHIFT 3

Shift value for ADC_TAILGATE

Definition at line 83 of file efm32wg_adc.h.

#define _ADC_CTRL_TIMEBASE_DEFAULT 0x0000001FUL

Mode DEFAULT for ADC_CTRL

Definition at line 105 of file efm32wg_adc.h.

#define _ADC_CTRL_TIMEBASE_MASK 0x7F0000UL

Bit mask for ADC_TIMEBASE

Definition at line 104 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_TIMEBASE_SHIFT 16

Shift value for ADC_TIMEBASE

Definition at line 103 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_CTRL

Definition at line 72 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_FASTBG 0x00000001UL

Mode FASTBG for ADC_CTRL

Definition at line 74 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_KEEPADCWARM 0x00000003UL

Mode KEEPADCWARM for ADC_CTRL

Definition at line 76 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM 0x00000002UL

Mode KEEPSCANREFWARM for ADC_CTRL

Definition at line 75 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_MASK 0x3UL

Bit mask for ADC_WARMUPMODE

Definition at line 71 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_NORMAL 0x00000000UL

Mode NORMAL for ADC_CTRL

Definition at line 73 of file efm32wg_adc.h.

#define _ADC_CTRL_WARMUPMODE_SHIFT 0

Shift value for ADC_WARMUPMODE

Definition at line 70 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define _ADC_IEN_MASK 0x00000303UL

Mask for ADC_IEN

Definition at line 509 of file efm32wg_adc.h.

#define _ADC_IEN_RESETVALUE 0x00000000UL

Default value for ADC_IEN

Definition at line 508 of file efm32wg_adc.h.

Referenced by ADC_Reset().

#define _ADC_IEN_SCAN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IEN

Definition at line 518 of file efm32wg_adc.h.

#define _ADC_IEN_SCAN_MASK 0x2UL

Bit mask for ADC_SCAN

Definition at line 517 of file efm32wg_adc.h.

#define _ADC_IEN_SCAN_SHIFT 1

Shift value for ADC_SCAN

Definition at line 516 of file efm32wg_adc.h.

#define _ADC_IEN_SCANOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IEN

Definition at line 528 of file efm32wg_adc.h.

#define _ADC_IEN_SCANOF_MASK 0x200UL

Bit mask for ADC_SCANOF

Definition at line 527 of file efm32wg_adc.h.

#define _ADC_IEN_SCANOF_SHIFT 9

Shift value for ADC_SCANOF

Definition at line 526 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IEN

Definition at line 513 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLE_MASK 0x1UL

Bit mask for ADC_SINGLE

Definition at line 512 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLE_SHIFT 0

Shift value for ADC_SINGLE

Definition at line 511 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLEOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IEN

Definition at line 523 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLEOF_MASK 0x100UL

Bit mask for ADC_SINGLEOF

Definition at line 522 of file efm32wg_adc.h.

#define _ADC_IEN_SINGLEOF_SHIFT 8

Shift value for ADC_SINGLEOF

Definition at line 521 of file efm32wg_adc.h.

#define _ADC_IF_MASK 0x00000303UL

Mask for ADC_IF

Definition at line 533 of file efm32wg_adc.h.

Referenced by TOUCH_Init().

#define _ADC_IF_RESETVALUE 0x00000000UL

Default value for ADC_IF

Definition at line 532 of file efm32wg_adc.h.

#define _ADC_IF_SCAN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IF

Definition at line 542 of file efm32wg_adc.h.

#define _ADC_IF_SCAN_MASK 0x2UL

Bit mask for ADC_SCAN

Definition at line 541 of file efm32wg_adc.h.

#define _ADC_IF_SCAN_SHIFT 1

Shift value for ADC_SCAN

Definition at line 540 of file efm32wg_adc.h.

#define _ADC_IF_SCANOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IF

Definition at line 552 of file efm32wg_adc.h.

#define _ADC_IF_SCANOF_MASK 0x200UL

Bit mask for ADC_SCANOF

Definition at line 551 of file efm32wg_adc.h.

#define _ADC_IF_SCANOF_SHIFT 9

Shift value for ADC_SCANOF

Definition at line 550 of file efm32wg_adc.h.

#define _ADC_IF_SINGLE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IF

Definition at line 537 of file efm32wg_adc.h.

#define _ADC_IF_SINGLE_MASK 0x1UL

Bit mask for ADC_SINGLE

Definition at line 536 of file efm32wg_adc.h.

#define _ADC_IF_SINGLE_SHIFT 0

Shift value for ADC_SINGLE

Definition at line 535 of file efm32wg_adc.h.

#define _ADC_IF_SINGLEOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IF

Definition at line 547 of file efm32wg_adc.h.

#define _ADC_IF_SINGLEOF_MASK 0x100UL

Bit mask for ADC_SINGLEOF

Definition at line 546 of file efm32wg_adc.h.

#define _ADC_IF_SINGLEOF_SHIFT 8

Shift value for ADC_SINGLEOF

Definition at line 545 of file efm32wg_adc.h.

#define _ADC_IFC_MASK 0x00000303UL

Mask for ADC_IFC

Definition at line 581 of file efm32wg_adc.h.

Referenced by ADC_Reset().

#define _ADC_IFC_RESETVALUE 0x00000000UL

Default value for ADC_IFC

Definition at line 580 of file efm32wg_adc.h.

#define _ADC_IFC_SCAN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFC

Definition at line 590 of file efm32wg_adc.h.

#define _ADC_IFC_SCAN_MASK 0x2UL

Bit mask for ADC_SCAN

Definition at line 589 of file efm32wg_adc.h.

#define _ADC_IFC_SCAN_SHIFT 1

Shift value for ADC_SCAN

Definition at line 588 of file efm32wg_adc.h.

#define _ADC_IFC_SCANOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFC

Definition at line 600 of file efm32wg_adc.h.

#define _ADC_IFC_SCANOF_MASK 0x200UL

Bit mask for ADC_SCANOF

Definition at line 599 of file efm32wg_adc.h.

#define _ADC_IFC_SCANOF_SHIFT 9

Shift value for ADC_SCANOF

Definition at line 598 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFC

Definition at line 585 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLE_MASK 0x1UL

Bit mask for ADC_SINGLE

Definition at line 584 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLE_SHIFT 0

Shift value for ADC_SINGLE

Definition at line 583 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLEOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFC

Definition at line 595 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLEOF_MASK 0x100UL

Bit mask for ADC_SINGLEOF

Definition at line 594 of file efm32wg_adc.h.

#define _ADC_IFC_SINGLEOF_SHIFT 8

Shift value for ADC_SINGLEOF

Definition at line 593 of file efm32wg_adc.h.

#define _ADC_IFS_MASK 0x00000303UL

Mask for ADC_IFS

Definition at line 557 of file efm32wg_adc.h.

#define _ADC_IFS_RESETVALUE 0x00000000UL

Default value for ADC_IFS

Definition at line 556 of file efm32wg_adc.h.

#define _ADC_IFS_SCAN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFS

Definition at line 566 of file efm32wg_adc.h.

#define _ADC_IFS_SCAN_MASK 0x2UL

Bit mask for ADC_SCAN

Definition at line 565 of file efm32wg_adc.h.

#define _ADC_IFS_SCAN_SHIFT 1

Shift value for ADC_SCAN

Definition at line 564 of file efm32wg_adc.h.

#define _ADC_IFS_SCANOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFS

Definition at line 576 of file efm32wg_adc.h.

#define _ADC_IFS_SCANOF_MASK 0x200UL

Bit mask for ADC_SCANOF

Definition at line 575 of file efm32wg_adc.h.

#define _ADC_IFS_SCANOF_SHIFT 9

Shift value for ADC_SCANOF

Definition at line 574 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLE_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFS

Definition at line 561 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLE_MASK 0x1UL

Bit mask for ADC_SINGLE

Definition at line 560 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLE_SHIFT 0

Shift value for ADC_SINGLE

Definition at line 559 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLEOF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_IFS

Definition at line 571 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLEOF_MASK 0x100UL

Bit mask for ADC_SINGLEOF

Definition at line 570 of file efm32wg_adc.h.

#define _ADC_IFS_SINGLEOF_SHIFT 8

Shift value for ADC_SINGLEOF

Definition at line 569 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_ADJ_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 387 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_ADJ_LEFT 0x00000001UL

Mode LEFT for ADC_SCANCTRL

Definition at line 389 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_ADJ_MASK 0x4UL

Bit mask for ADC_ADJ

Definition at line 386 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_ADJ_RIGHT 0x00000000UL

Mode RIGHT for ADC_SCANCTRL

Definition at line 388 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_ADJ_SHIFT 2

Shift value for ADC_ADJ

Definition at line 385 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_128CYCLES 0x00000007UL

Mode 128CYCLES for ADC_SCANCTRL

Definition at line 461 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_16CYCLES 0x00000004UL

Mode 16CYCLES for ADC_SCANCTRL

Definition at line 458 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_1CYCLE 0x00000000UL

Mode 1CYCLE for ADC_SCANCTRL

Definition at line 454 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_256CYCLES 0x00000008UL

Mode 256CYCLES for ADC_SCANCTRL

Definition at line 462 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_2CYCLES 0x00000001UL

Mode 2CYCLES for ADC_SCANCTRL

Definition at line 455 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_32CYCLES 0x00000005UL

Mode 32CYCLES for ADC_SCANCTRL

Definition at line 459 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_4CYCLES 0x00000002UL

Mode 4CYCLES for ADC_SCANCTRL

Definition at line 456 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_64CYCLES 0x00000006UL

Mode 64CYCLES for ADC_SCANCTRL

Definition at line 460 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_8CYCLES 0x00000003UL

Mode 8CYCLES for ADC_SCANCTRL

Definition at line 457 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 453 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_MASK 0xF00000UL

Bit mask for ADC_AT

Definition at line 452 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_AT_SHIFT 20

Shift value for ADC_AT

Definition at line 451 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define _ADC_SCANCTRL_DIFF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 382 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_DIFF_MASK 0x2UL

Bit mask for ADC_DIFF

Definition at line 381 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_DIFF_SHIFT 1

Shift value for ADC_DIFF

Definition at line 380 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH0 0x00000001UL

Mode CH0 for ADC_SCANCTRL

Definition at line 408 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH0CH1 0x00000001UL

Mode CH0CH1 for ADC_SCANCTRL

Definition at line 409 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH1 0x00000002UL

Mode CH1 for ADC_SCANCTRL

Definition at line 410 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH2 0x00000004UL

Mode CH2 for ADC_SCANCTRL

Definition at line 412 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH2CH3 0x00000002UL

Mode CH2CH3 for ADC_SCANCTRL

Definition at line 411 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH3 0x00000008UL

Mode CH3 for ADC_SCANCTRL

Definition at line 415 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH4 0x00000010UL

Mode CH4 for ADC_SCANCTRL

Definition at line 416 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH4CH5 0x00000004UL

Mode CH4CH5 for ADC_SCANCTRL

Definition at line 413 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH5 0x00000020UL

Mode CH5 for ADC_SCANCTRL

Definition at line 417 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH6 0x00000040UL

Mode CH6 for ADC_SCANCTRL

Definition at line 418 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH6CH7 0x00000008UL

Mode CH6CH7 for ADC_SCANCTRL

Definition at line 414 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_CH7 0x00000080UL

Mode CH7 for ADC_SCANCTRL

Definition at line 419 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 407 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_MASK 0xFF00UL

Bit mask for ADC_INPUTMASK

Definition at line 406 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_INPUTMASK_SHIFT 8

Shift value for ADC_INPUTMASK

Definition at line 405 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_MASK 0xF1F7FF37UL

Mask for ADC_SCANCTRL

Definition at line 373 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSEN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 476 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSEN_MASK 0x1000000UL

Bit mask for ADC_PRSEN

Definition at line 475 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSEN_SHIFT 24

Shift value for ADC_PRSEN

Definition at line 474 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 480 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_MASK 0xF0000000UL

Bit mask for ADC_PRSSEL

Definition at line 479 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for ADC_SCANCTRL

Definition at line 481 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for ADC_SCANCTRL

Definition at line 482 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for ADC_SCANCTRL

Definition at line 491 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for ADC_SCANCTRL

Definition at line 492 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for ADC_SCANCTRL

Definition at line 483 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for ADC_SCANCTRL

Definition at line 484 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for ADC_SCANCTRL

Definition at line 485 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for ADC_SCANCTRL

Definition at line 486 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for ADC_SCANCTRL

Definition at line 487 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for ADC_SCANCTRL

Definition at line 488 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for ADC_SCANCTRL

Definition at line 489 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for ADC_SCANCTRL

Definition at line 490 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_PRSSEL_SHIFT 28

Shift value for ADC_PRSSEL

Definition at line 478 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define _ADC_SCANCTRL_REF_1V25 0x00000000UL

Mode 1V25 for ADC_SCANCTRL

Definition at line 436 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_2V5 0x00000001UL

Mode 2V5 for ADC_SCANCTRL

Definition at line 437 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_2XEXTDIFF 0x00000005UL

Mode 2XEXTDIFF for ADC_SCANCTRL

Definition at line 441 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_2XVDD 0x00000006UL

Mode 2XVDD for ADC_SCANCTRL

Definition at line 442 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_5VDIFF 0x00000003UL

Mode 5VDIFF for ADC_SCANCTRL

Definition at line 439 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 435 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_EXTSINGLE 0x00000004UL

Mode EXTSINGLE for ADC_SCANCTRL

Definition at line 440 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_MASK 0x70000UL

Bit mask for ADC_REF

Definition at line 434 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REF_SHIFT 16

Shift value for ADC_REF

Definition at line 433 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define _ADC_SCANCTRL_REF_VDD 0x00000002UL

Mode VDD for ADC_SCANCTRL

Definition at line 438 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 377 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REP_MASK 0x1UL

Bit mask for ADC_REP

Definition at line 376 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_REP_SHIFT 0

Shift value for ADC_REP

Definition at line 375 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_12BIT 0x00000000UL

Mode 12BIT for ADC_SCANCTRL

Definition at line 396 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_6BIT 0x00000002UL

Mode 6BIT for ADC_SCANCTRL

Definition at line 398 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_8BIT 0x00000001UL

Mode 8BIT for ADC_SCANCTRL

Definition at line 397 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANCTRL

Definition at line 395 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_MASK 0x30UL

Bit mask for ADC_RES

Definition at line 394 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_OVS 0x00000003UL

Mode OVS for ADC_SCANCTRL

Definition at line 399 of file efm32wg_adc.h.

#define _ADC_SCANCTRL_RES_SHIFT 4

Shift value for ADC_RES

Definition at line 393 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define _ADC_SCANCTRL_RESETVALUE 0x00000000UL

Default value for ADC_SCANCTRL

Definition at line 372 of file efm32wg_adc.h.

Referenced by ADC_Reset().

#define _ADC_SCANDATA_DATA_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANDATA

Definition at line 616 of file efm32wg_adc.h.

#define _ADC_SCANDATA_DATA_MASK 0xFFFFFFFFUL

Bit mask for ADC_DATA

Definition at line 615 of file efm32wg_adc.h.

#define _ADC_SCANDATA_DATA_SHIFT 0

Shift value for ADC_DATA

Definition at line 614 of file efm32wg_adc.h.

#define _ADC_SCANDATA_MASK 0xFFFFFFFFUL

Mask for ADC_SCANDATA

Definition at line 613 of file efm32wg_adc.h.

#define _ADC_SCANDATA_RESETVALUE 0x00000000UL

Default value for ADC_SCANDATA

Definition at line 612 of file efm32wg_adc.h.

#define _ADC_SCANDATAP_DATAP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SCANDATAP

Definition at line 632 of file efm32wg_adc.h.

#define _ADC_SCANDATAP_DATAP_MASK 0xFFFFFFFFUL

Bit mask for ADC_DATAP

Definition at line 631 of file efm32wg_adc.h.

#define _ADC_SCANDATAP_DATAP_SHIFT 0

Shift value for ADC_DATAP

Definition at line 630 of file efm32wg_adc.h.

#define _ADC_SCANDATAP_MASK 0xFFFFFFFFUL

Mask for ADC_SCANDATAP

Definition at line 629 of file efm32wg_adc.h.

#define _ADC_SCANDATAP_RESETVALUE 0x00000000UL

Default value for ADC_SCANDATAP

Definition at line 628 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_ADJ_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 235 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_ADJ_LEFT 0x00000001UL

Mode LEFT for ADC_SINGLECTRL

Definition at line 237 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_ADJ_MASK 0x4UL

Bit mask for ADC_ADJ

Definition at line 234 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_ADJ_RIGHT 0x00000000UL

Mode RIGHT for ADC_SINGLECTRL

Definition at line 236 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_ADJ_SHIFT 2

Shift value for ADC_ADJ

Definition at line 233 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_128CYCLES 0x00000007UL

Mode 128CYCLES for ADC_SINGLECTRL

Definition at line 325 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_16CYCLES 0x00000004UL

Mode 16CYCLES for ADC_SINGLECTRL

Definition at line 322 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_1CYCLE 0x00000000UL

Mode 1CYCLE for ADC_SINGLECTRL

Definition at line 318 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_256CYCLES 0x00000008UL

Mode 256CYCLES for ADC_SINGLECTRL

Definition at line 326 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_2CYCLES 0x00000001UL

Mode 2CYCLES for ADC_SINGLECTRL

Definition at line 319 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_32CYCLES 0x00000005UL

Mode 32CYCLES for ADC_SINGLECTRL

Definition at line 323 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_4CYCLES 0x00000002UL

Mode 4CYCLES for ADC_SINGLECTRL

Definition at line 320 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_64CYCLES 0x00000006UL

Mode 64CYCLES for ADC_SINGLECTRL

Definition at line 324 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_8CYCLES 0x00000003UL

Mode 8CYCLES for ADC_SINGLECTRL

Definition at line 321 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 317 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_AT_MASK 0xF00000UL

Bit mask for ADC_AT

Definition at line 316 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_AT_SHIFT 20

Shift value for ADC_AT

Definition at line 315 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_DIFF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 230 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_DIFF_MASK 0x2UL

Bit mask for ADC_DIFF

Definition at line 229 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_DIFF_SHIFT 1

Shift value for ADC_DIFF

Definition at line 228 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH0 0x00000000UL

Mode CH0 for ADC_SINGLECTRL

Definition at line 256 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH0CH1 0x00000000UL

Mode CH0CH1 for ADC_SINGLECTRL

Definition at line 257 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH1 0x00000001UL

Mode CH1 for ADC_SINGLECTRL

Definition at line 258 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH2 0x00000002UL

Mode CH2 for ADC_SINGLECTRL

Definition at line 260 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH2CH3 0x00000001UL

Mode CH2CH3 for ADC_SINGLECTRL

Definition at line 259 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH3 0x00000003UL

Mode CH3 for ADC_SINGLECTRL

Definition at line 263 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH4 0x00000004UL

Mode CH4 for ADC_SINGLECTRL

Definition at line 264 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH4CH5 0x00000002UL

Mode CH4CH5 for ADC_SINGLECTRL

Definition at line 261 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH5 0x00000005UL

Mode CH5 for ADC_SINGLECTRL

Definition at line 266 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH6 0x00000006UL

Mode CH6 for ADC_SINGLECTRL

Definition at line 267 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH6CH7 0x00000003UL

Mode CH6CH7 for ADC_SINGLECTRL

Definition at line 262 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_CH7 0x00000007UL

Mode CH7 for ADC_SINGLECTRL

Definition at line 268 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 0x0000000DUL

Mode DAC0OUT0 for ADC_SINGLECTRL

Definition at line 274 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 0x0000000EUL

Mode DAC0OUT1 for ADC_SINGLECTRL

Definition at line 275 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 255 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_DIFF0 0x00000004UL

Mode DIFF0 for ADC_SINGLECTRL

Definition at line 265 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_MASK 0xF00UL

Bit mask for ADC_INPUTSEL

Definition at line 254 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_SHIFT 8

Shift value for ADC_INPUTSEL

Definition at line 253 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_INPUTSEL_TEMP 0x00000008UL

Mode TEMP for ADC_SINGLECTRL

Definition at line 269 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_VDD 0x0000000AUL

Mode VDD for ADC_SINGLECTRL

Definition at line 271 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_VDDDIV3 0x00000009UL

Mode VDDDIV3 for ADC_SINGLECTRL

Definition at line 270 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_VREFDIV2 0x0000000CUL

Mode VREFDIV2 for ADC_SINGLECTRL

Definition at line 273 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_INPUTSEL_VSS 0x0000000BUL

Mode VSS for ADC_SINGLECTRL

Definition at line 272 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_MASK 0xF1F70F37UL

Mask for ADC_SINGLECTRL

Definition at line 221 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSEN_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 340 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSEN_MASK 0x1000000UL

Bit mask for ADC_PRSEN

Definition at line 339 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSEN_SHIFT 24

Shift value for ADC_PRSEN

Definition at line 338 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 344 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_MASK 0xF0000000UL

Bit mask for ADC_PRSSEL

Definition at line 343 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for ADC_SINGLECTRL

Definition at line 345 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for ADC_SINGLECTRL

Definition at line 346 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for ADC_SINGLECTRL

Definition at line 355 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for ADC_SINGLECTRL

Definition at line 356 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for ADC_SINGLECTRL

Definition at line 347 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for ADC_SINGLECTRL

Definition at line 348 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for ADC_SINGLECTRL

Definition at line 349 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for ADC_SINGLECTRL

Definition at line 350 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for ADC_SINGLECTRL

Definition at line 351 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for ADC_SINGLECTRL

Definition at line 352 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for ADC_SINGLECTRL

Definition at line 353 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for ADC_SINGLECTRL

Definition at line 354 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_PRSSEL_SHIFT 28

Shift value for ADC_PRSSEL

Definition at line 342 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_REF_1V25 0x00000000UL

Mode 1V25 for ADC_SINGLECTRL

Definition at line 300 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_2V5 0x00000001UL

Mode 2V5 for ADC_SINGLECTRL

Definition at line 301 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_2XEXTDIFF 0x00000005UL

Mode 2XEXTDIFF for ADC_SINGLECTRL

Definition at line 305 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_2XVDD 0x00000006UL

Mode 2XVDD for ADC_SINGLECTRL

Definition at line 306 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_5VDIFF 0x00000003UL

Mode 5VDIFF for ADC_SINGLECTRL

Definition at line 303 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 299 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_EXTSINGLE 0x00000004UL

Mode EXTSINGLE for ADC_SINGLECTRL

Definition at line 304 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_MASK 0x70000UL

Bit mask for ADC_REF

Definition at line 298 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REF_SHIFT 16

Shift value for ADC_REF

Definition at line 297 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_REF_VDD 0x00000002UL

Mode VDD for ADC_SINGLECTRL

Definition at line 302 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 225 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REP_MASK 0x1UL

Bit mask for ADC_REP

Definition at line 224 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_REP_SHIFT 0

Shift value for ADC_REP

Definition at line 223 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_12BIT 0x00000000UL

Mode 12BIT for ADC_SINGLECTRL

Definition at line 244 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_6BIT 0x00000002UL

Mode 6BIT for ADC_SINGLECTRL

Definition at line 246 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_8BIT 0x00000001UL

Mode 8BIT for ADC_SINGLECTRL

Definition at line 245 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLECTRL

Definition at line 243 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_MASK 0x30UL

Bit mask for ADC_RES

Definition at line 242 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_OVS 0x00000003UL

Mode OVS for ADC_SINGLECTRL

Definition at line 247 of file efm32wg_adc.h.

#define _ADC_SINGLECTRL_RES_SHIFT 4

Shift value for ADC_RES

Definition at line 241 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define _ADC_SINGLECTRL_RESETVALUE 0x00000000UL

Default value for ADC_SINGLECTRL

Definition at line 220 of file efm32wg_adc.h.

Referenced by ADC_Reset().

#define _ADC_SINGLEDATA_DATA_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLEDATA

Definition at line 608 of file efm32wg_adc.h.

#define _ADC_SINGLEDATA_DATA_MASK 0xFFFFFFFFUL

Bit mask for ADC_DATA

Definition at line 607 of file efm32wg_adc.h.

#define _ADC_SINGLEDATA_DATA_SHIFT 0

Shift value for ADC_DATA

Definition at line 606 of file efm32wg_adc.h.

#define _ADC_SINGLEDATA_MASK 0xFFFFFFFFUL

Mask for ADC_SINGLEDATA

Definition at line 605 of file efm32wg_adc.h.

#define _ADC_SINGLEDATA_RESETVALUE 0x00000000UL

Default value for ADC_SINGLEDATA

Definition at line 604 of file efm32wg_adc.h.

#define _ADC_SINGLEDATAP_DATAP_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_SINGLEDATAP

Definition at line 624 of file efm32wg_adc.h.

#define _ADC_SINGLEDATAP_DATAP_MASK 0xFFFFFFFFUL

Bit mask for ADC_DATAP

Definition at line 623 of file efm32wg_adc.h.

#define _ADC_SINGLEDATAP_DATAP_SHIFT 0

Shift value for ADC_DATAP

Definition at line 622 of file efm32wg_adc.h.

#define _ADC_SINGLEDATAP_MASK 0xFFFFFFFFUL

Mask for ADC_SINGLEDATAP

Definition at line 621 of file efm32wg_adc.h.

#define _ADC_SINGLEDATAP_RESETVALUE 0x00000000UL

Default value for ADC_SINGLEDATAP

Definition at line 620 of file efm32wg_adc.h.

#define _ADC_STATUS_MASK 0x07031303UL

Mask for ADC_STATUS

Definition at line 162 of file efm32wg_adc.h.

#define _ADC_STATUS_RESETVALUE 0x00000000UL

Default value for ADC_STATUS

Definition at line 161 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANACT_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 171 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANACT_MASK 0x2UL

Bit mask for ADC_SCANACT

Definition at line 170 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANACT_SHIFT 1

Shift value for ADC_SCANACT

Definition at line 169 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH0 0x00000000UL

Mode CH0 for ADC_STATUS

Definition at line 201 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH1 0x00000001UL

Mode CH1 for ADC_STATUS

Definition at line 202 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH2 0x00000002UL

Mode CH2 for ADC_STATUS

Definition at line 203 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH3 0x00000003UL

Mode CH3 for ADC_STATUS

Definition at line 204 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH4 0x00000004UL

Mode CH4 for ADC_STATUS

Definition at line 205 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH5 0x00000005UL

Mode CH5 for ADC_STATUS

Definition at line 206 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH6 0x00000006UL

Mode CH6 for ADC_STATUS

Definition at line 207 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_CH7 0x00000007UL

Mode CH7 for ADC_STATUS

Definition at line 208 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 200 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_MASK 0x7000000UL

Bit mask for ADC_SCANDATASRC

Definition at line 199 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDATASRC_SHIFT 24

Shift value for ADC_SCANDATASRC

Definition at line 198 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDV_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 196 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDV_MASK 0x20000UL

Bit mask for ADC_SCANDV

Definition at line 195 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANDV_SHIFT 17

Shift value for ADC_SCANDV

Definition at line 194 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANREFWARM_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 181 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANREFWARM_MASK 0x200UL

Bit mask for ADC_SCANREFWARM

Definition at line 180 of file efm32wg_adc.h.

#define _ADC_STATUS_SCANREFWARM_SHIFT 9

Shift value for ADC_SCANREFWARM

Definition at line 179 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEACT_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 166 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEACT_MASK 0x1UL

Bit mask for ADC_SINGLEACT

Definition at line 165 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEACT_SHIFT 0

Shift value for ADC_SINGLEACT

Definition at line 164 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEDV_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 191 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEDV_MASK 0x10000UL

Bit mask for ADC_SINGLEDV

Definition at line 190 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEDV_SHIFT 16

Shift value for ADC_SINGLEDV

Definition at line 189 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEREFWARM_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 176 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEREFWARM_MASK 0x100UL

Bit mask for ADC_SINGLEREFWARM

Definition at line 175 of file efm32wg_adc.h.

#define _ADC_STATUS_SINGLEREFWARM_SHIFT 8

Shift value for ADC_SINGLEREFWARM

Definition at line 174 of file efm32wg_adc.h.

#define _ADC_STATUS_WARM_DEFAULT 0x00000000UL

Mode DEFAULT for ADC_STATUS

Definition at line 186 of file efm32wg_adc.h.

#define _ADC_STATUS_WARM_MASK 0x1000UL

Bit mask for ADC_WARM

Definition at line 185 of file efm32wg_adc.h.

#define _ADC_STATUS_WARM_SHIFT 12

Shift value for ADC_WARM

Definition at line 184 of file efm32wg_adc.h.

#define ADC_BIASPROG_BIASPROG_DEFAULT (_ADC_BIASPROG_BIASPROG_DEFAULT << 0)

Shifted mode DEFAULT for ADC_BIASPROG

Definition at line 661 of file efm32wg_adc.h.

#define ADC_BIASPROG_COMPBIAS_DEFAULT (_ADC_BIASPROG_COMPBIAS_DEFAULT << 8)

Shifted mode DEFAULT for ADC_BIASPROG

Definition at line 670 of file efm32wg_adc.h.

#define ADC_BIASPROG_HALFBIAS (0x1UL << 6)

Half Bias Current

Definition at line 662 of file efm32wg_adc.h.

#define ADC_BIASPROG_HALFBIAS_DEFAULT (_ADC_BIASPROG_HALFBIAS_DEFAULT << 6)

Shifted mode DEFAULT for ADC_BIASPROG

Definition at line 666 of file efm32wg_adc.h.

#define ADC_CAL_SCANGAIN_DEFAULT (_ADC_CAL_SCANGAIN_DEFAULT << 24)

Shifted mode DEFAULT for ADC_CAL

Definition at line 653 of file efm32wg_adc.h.

#define ADC_CAL_SCANOFFSET_DEFAULT (_ADC_CAL_SCANOFFSET_DEFAULT << 16)

Shifted mode DEFAULT for ADC_CAL

Definition at line 649 of file efm32wg_adc.h.

#define ADC_CAL_SINGLEGAIN_DEFAULT (_ADC_CAL_SINGLEGAIN_DEFAULT << 8)

Shifted mode DEFAULT for ADC_CAL

Definition at line 645 of file efm32wg_adc.h.

#define ADC_CAL_SINGLEOFFSET_DEFAULT (_ADC_CAL_SINGLEOFFSET_DEFAULT << 0)

Shifted mode DEFAULT for ADC_CAL

Definition at line 641 of file efm32wg_adc.h.

#define ADC_CMD_SCANSTART (0x1UL << 2)

Scan Sequence Start

Definition at line 149 of file efm32wg_adc.h.

#define ADC_CMD_SCANSTART_DEFAULT (_ADC_CMD_SCANSTART_DEFAULT << 2)

Shifted mode DEFAULT for ADC_CMD

Definition at line 153 of file efm32wg_adc.h.

#define ADC_CMD_SCANSTOP (0x1UL << 3)

Scan Sequence Stop

Definition at line 154 of file efm32wg_adc.h.

Referenced by ADC_Init(), ADC_InitScan(), and ADC_Reset().

#define ADC_CMD_SCANSTOP_DEFAULT (_ADC_CMD_SCANSTOP_DEFAULT << 3)

Shifted mode DEFAULT for ADC_CMD

Definition at line 158 of file efm32wg_adc.h.

#define ADC_CMD_SINGLESTART (0x1UL << 0)

Single Conversion Start

Definition at line 139 of file efm32wg_adc.h.

#define ADC_CMD_SINGLESTART_DEFAULT (_ADC_CMD_SINGLESTART_DEFAULT << 0)

Shifted mode DEFAULT for ADC_CMD

Definition at line 143 of file efm32wg_adc.h.

#define ADC_CMD_SINGLESTOP (0x1UL << 1)

Single Conversion Stop

Definition at line 144 of file efm32wg_adc.h.

Referenced by ADC_Init(), ADC_InitSingle(), and ADC_Reset().

#define ADC_CMD_SINGLESTOP_DEFAULT (_ADC_CMD_SINGLESTOP_DEFAULT << 1)

Shifted mode DEFAULT for ADC_CMD

Definition at line 148 of file efm32wg_adc.h.

#define ADC_CTRL_LPFMODE_BYPASS (_ADC_CTRL_LPFMODE_BYPASS << 4)

Shifted mode BYPASS for ADC_CTRL

Definition at line 94 of file efm32wg_adc.h.

#define ADC_CTRL_LPFMODE_DECAP (_ADC_CTRL_LPFMODE_DECAP << 4)

Shifted mode DECAP for ADC_CTRL

Definition at line 95 of file efm32wg_adc.h.

#define ADC_CTRL_LPFMODE_DEFAULT (_ADC_CTRL_LPFMODE_DEFAULT << 4)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 93 of file efm32wg_adc.h.

#define ADC_CTRL_LPFMODE_RCFILT (_ADC_CTRL_LPFMODE_RCFILT << 4)

Shifted mode RCFILT for ADC_CTRL

Definition at line 96 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_DEFAULT (_ADC_CTRL_OVSRSEL_DEFAULT << 24)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 122 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X1024 (_ADC_CTRL_OVSRSEL_X1024 << 24)

Shifted mode X1024 for ADC_CTRL

Definition at line 132 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X128 (_ADC_CTRL_OVSRSEL_X128 << 24)

Shifted mode X128 for ADC_CTRL

Definition at line 129 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X16 (_ADC_CTRL_OVSRSEL_X16 << 24)

Shifted mode X16 for ADC_CTRL

Definition at line 126 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X2 (_ADC_CTRL_OVSRSEL_X2 << 24)

Shifted mode X2 for ADC_CTRL

Definition at line 123 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X2048 (_ADC_CTRL_OVSRSEL_X2048 << 24)

Shifted mode X2048 for ADC_CTRL

Definition at line 133 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X256 (_ADC_CTRL_OVSRSEL_X256 << 24)

Shifted mode X256 for ADC_CTRL

Definition at line 130 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X32 (_ADC_CTRL_OVSRSEL_X32 << 24)

Shifted mode X32 for ADC_CTRL

Definition at line 127 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X4 (_ADC_CTRL_OVSRSEL_X4 << 24)

Shifted mode X4 for ADC_CTRL

Definition at line 124 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X4096 (_ADC_CTRL_OVSRSEL_X4096 << 24)

Shifted mode X4096 for ADC_CTRL

Definition at line 134 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X512 (_ADC_CTRL_OVSRSEL_X512 << 24)

Shifted mode X512 for ADC_CTRL

Definition at line 131 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X64 (_ADC_CTRL_OVSRSEL_X64 << 24)

Shifted mode X64 for ADC_CTRL

Definition at line 128 of file efm32wg_adc.h.

#define ADC_CTRL_OVSRSEL_X8 (_ADC_CTRL_OVSRSEL_X8 << 24)

Shifted mode X8 for ADC_CTRL

Definition at line 125 of file efm32wg_adc.h.

#define ADC_CTRL_PRESC_DEFAULT (_ADC_CTRL_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 101 of file efm32wg_adc.h.

#define ADC_CTRL_PRESC_NODIVISION (_ADC_CTRL_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for ADC_CTRL

Definition at line 102 of file efm32wg_adc.h.

#define ADC_CTRL_TAILGATE (0x1UL << 3)

Conversion Tailgating

Definition at line 82 of file efm32wg_adc.h.

Referenced by ADC_Init().

#define ADC_CTRL_TAILGATE_DEFAULT (_ADC_CTRL_TAILGATE_DEFAULT << 3)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 86 of file efm32wg_adc.h.

#define ADC_CTRL_TIMEBASE_DEFAULT (_ADC_CTRL_TIMEBASE_DEFAULT << 16)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 106 of file efm32wg_adc.h.

#define ADC_CTRL_WARMUPMODE_DEFAULT (_ADC_CTRL_WARMUPMODE_DEFAULT << 0)

Shifted mode DEFAULT for ADC_CTRL

Definition at line 77 of file efm32wg_adc.h.

#define ADC_CTRL_WARMUPMODE_FASTBG (_ADC_CTRL_WARMUPMODE_FASTBG << 0)

Shifted mode FASTBG for ADC_CTRL

Definition at line 79 of file efm32wg_adc.h.

#define ADC_CTRL_WARMUPMODE_KEEPADCWARM (_ADC_CTRL_WARMUPMODE_KEEPADCWARM << 0)

Shifted mode KEEPADCWARM for ADC_CTRL

Definition at line 81 of file efm32wg_adc.h.

#define ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM (_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM << 0)

Shifted mode KEEPSCANREFWARM for ADC_CTRL

Definition at line 80 of file efm32wg_adc.h.

#define ADC_CTRL_WARMUPMODE_NORMAL (_ADC_CTRL_WARMUPMODE_NORMAL << 0)

Shifted mode NORMAL for ADC_CTRL

Definition at line 78 of file efm32wg_adc.h.

#define ADC_IEN_SCAN (0x1UL << 1)

Scan Conversion Complete Interrupt Enable

Definition at line 515 of file efm32wg_adc.h.

#define ADC_IEN_SCAN_DEFAULT (_ADC_IEN_SCAN_DEFAULT << 1)

Shifted mode DEFAULT for ADC_IEN

Definition at line 519 of file efm32wg_adc.h.

#define ADC_IEN_SCANOF (0x1UL << 9)

Scan Result Overflow Interrupt Enable

Definition at line 525 of file efm32wg_adc.h.

#define ADC_IEN_SCANOF_DEFAULT (_ADC_IEN_SCANOF_DEFAULT << 9)

Shifted mode DEFAULT for ADC_IEN

Definition at line 529 of file efm32wg_adc.h.

#define ADC_IEN_SINGLE (0x1UL << 0)

Single Conversion Complete Interrupt Enable

Definition at line 510 of file efm32wg_adc.h.

#define ADC_IEN_SINGLE_DEFAULT (_ADC_IEN_SINGLE_DEFAULT << 0)

Shifted mode DEFAULT for ADC_IEN

Definition at line 514 of file efm32wg_adc.h.

#define ADC_IEN_SINGLEOF (0x1UL << 8)

Single Result Overflow Interrupt Enable

Definition at line 520 of file efm32wg_adc.h.

#define ADC_IEN_SINGLEOF_DEFAULT (_ADC_IEN_SINGLEOF_DEFAULT << 8)

Shifted mode DEFAULT for ADC_IEN

Definition at line 524 of file efm32wg_adc.h.

#define ADC_IF_SCAN (0x1UL << 1)

Scan Conversion Complete Interrupt Flag

Definition at line 539 of file efm32wg_adc.h.

#define ADC_IF_SCAN_DEFAULT (_ADC_IF_SCAN_DEFAULT << 1)

Shifted mode DEFAULT for ADC_IF

Definition at line 543 of file efm32wg_adc.h.

#define ADC_IF_SCANOF (0x1UL << 9)

Scan Result Overflow Interrupt Flag

Definition at line 549 of file efm32wg_adc.h.

#define ADC_IF_SCANOF_DEFAULT (_ADC_IF_SCANOF_DEFAULT << 9)

Shifted mode DEFAULT for ADC_IF

Definition at line 553 of file efm32wg_adc.h.

#define ADC_IF_SINGLE (0x1UL << 0)

Single Conversion Complete Interrupt Flag

Definition at line 534 of file efm32wg_adc.h.

Referenced by ADC0_IRQHandler(), getAdcSample(), TOUCH_GetPos(), and TOUCH_Init().

#define ADC_IF_SINGLE_DEFAULT (_ADC_IF_SINGLE_DEFAULT << 0)

Shifted mode DEFAULT for ADC_IF

Definition at line 538 of file efm32wg_adc.h.

#define ADC_IF_SINGLEOF (0x1UL << 8)

Single Result Overflow Interrupt Flag

Definition at line 544 of file efm32wg_adc.h.

#define ADC_IF_SINGLEOF_DEFAULT (_ADC_IF_SINGLEOF_DEFAULT << 8)

Shifted mode DEFAULT for ADC_IF

Definition at line 548 of file efm32wg_adc.h.

#define ADC_IFC_SCAN (0x1UL << 1)

Scan Conversion Complete Interrupt Flag Clear

Definition at line 587 of file efm32wg_adc.h.

#define ADC_IFC_SCAN_DEFAULT (_ADC_IFC_SCAN_DEFAULT << 1)

Shifted mode DEFAULT for ADC_IFC

Definition at line 591 of file efm32wg_adc.h.

#define ADC_IFC_SCANOF (0x1UL << 9)

Scan Result Overflow Interrupt Flag Clear

Definition at line 597 of file efm32wg_adc.h.

#define ADC_IFC_SCANOF_DEFAULT (_ADC_IFC_SCANOF_DEFAULT << 9)

Shifted mode DEFAULT for ADC_IFC

Definition at line 601 of file efm32wg_adc.h.

#define ADC_IFC_SINGLE (0x1UL << 0)

Single Conversion Complete Interrupt Flag Clear

Definition at line 582 of file efm32wg_adc.h.

#define ADC_IFC_SINGLE_DEFAULT (_ADC_IFC_SINGLE_DEFAULT << 0)

Shifted mode DEFAULT for ADC_IFC

Definition at line 586 of file efm32wg_adc.h.

#define ADC_IFC_SINGLEOF (0x1UL << 8)

Single Result Overflow Interrupt Flag Clear

Definition at line 592 of file efm32wg_adc.h.

#define ADC_IFC_SINGLEOF_DEFAULT (_ADC_IFC_SINGLEOF_DEFAULT << 8)

Shifted mode DEFAULT for ADC_IFC

Definition at line 596 of file efm32wg_adc.h.

#define ADC_IFS_SCAN (0x1UL << 1)

Scan Conversion Complete Interrupt Flag Set

Definition at line 563 of file efm32wg_adc.h.

#define ADC_IFS_SCAN_DEFAULT (_ADC_IFS_SCAN_DEFAULT << 1)

Shifted mode DEFAULT for ADC_IFS

Definition at line 567 of file efm32wg_adc.h.

#define ADC_IFS_SCANOF (0x1UL << 9)

Scan Result Overflow Interrupt Flag Set

Definition at line 573 of file efm32wg_adc.h.

#define ADC_IFS_SCANOF_DEFAULT (_ADC_IFS_SCANOF_DEFAULT << 9)

Shifted mode DEFAULT for ADC_IFS

Definition at line 577 of file efm32wg_adc.h.

#define ADC_IFS_SINGLE (0x1UL << 0)

Single Conversion Complete Interrupt Flag Set

Definition at line 558 of file efm32wg_adc.h.

#define ADC_IFS_SINGLE_DEFAULT (_ADC_IFS_SINGLE_DEFAULT << 0)

Shifted mode DEFAULT for ADC_IFS

Definition at line 562 of file efm32wg_adc.h.

#define ADC_IFS_SINGLEOF (0x1UL << 8)

Single Result Overflow Interrupt Flag Set

Definition at line 568 of file efm32wg_adc.h.

#define ADC_IFS_SINGLEOF_DEFAULT (_ADC_IFS_SINGLEOF_DEFAULT << 8)

Shifted mode DEFAULT for ADC_IFS

Definition at line 572 of file efm32wg_adc.h.

#define ADC_SCANCTRL_ADJ (0x1UL << 2)

Scan Sequence Result Adjustment

Definition at line 384 of file efm32wg_adc.h.

#define ADC_SCANCTRL_ADJ_DEFAULT (_ADC_SCANCTRL_ADJ_DEFAULT << 2)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 390 of file efm32wg_adc.h.

#define ADC_SCANCTRL_ADJ_LEFT (_ADC_SCANCTRL_ADJ_LEFT << 2)

Shifted mode LEFT for ADC_SCANCTRL

Definition at line 392 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define ADC_SCANCTRL_ADJ_RIGHT (_ADC_SCANCTRL_ADJ_RIGHT << 2)

Shifted mode RIGHT for ADC_SCANCTRL

Definition at line 391 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_128CYCLES (_ADC_SCANCTRL_AT_128CYCLES << 20)

Shifted mode 128CYCLES for ADC_SCANCTRL

Definition at line 471 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_16CYCLES (_ADC_SCANCTRL_AT_16CYCLES << 20)

Shifted mode 16CYCLES for ADC_SCANCTRL

Definition at line 468 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_1CYCLE (_ADC_SCANCTRL_AT_1CYCLE << 20)

Shifted mode 1CYCLE for ADC_SCANCTRL

Definition at line 464 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_256CYCLES (_ADC_SCANCTRL_AT_256CYCLES << 20)

Shifted mode 256CYCLES for ADC_SCANCTRL

Definition at line 472 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_2CYCLES (_ADC_SCANCTRL_AT_2CYCLES << 20)

Shifted mode 2CYCLES for ADC_SCANCTRL

Definition at line 465 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_32CYCLES (_ADC_SCANCTRL_AT_32CYCLES << 20)

Shifted mode 32CYCLES for ADC_SCANCTRL

Definition at line 469 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_4CYCLES (_ADC_SCANCTRL_AT_4CYCLES << 20)

Shifted mode 4CYCLES for ADC_SCANCTRL

Definition at line 466 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_64CYCLES (_ADC_SCANCTRL_AT_64CYCLES << 20)

Shifted mode 64CYCLES for ADC_SCANCTRL

Definition at line 470 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_8CYCLES (_ADC_SCANCTRL_AT_8CYCLES << 20)

Shifted mode 8CYCLES for ADC_SCANCTRL

Definition at line 467 of file efm32wg_adc.h.

#define ADC_SCANCTRL_AT_DEFAULT (_ADC_SCANCTRL_AT_DEFAULT << 20)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 463 of file efm32wg_adc.h.

#define ADC_SCANCTRL_DIFF (0x1UL << 1)

Scan Sequence Differential Mode

Definition at line 379 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define ADC_SCANCTRL_DIFF_DEFAULT (_ADC_SCANCTRL_DIFF_DEFAULT << 1)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 383 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH0 (_ADC_SCANCTRL_INPUTMASK_CH0 << 8)

Shifted mode CH0 for ADC_SCANCTRL

Definition at line 421 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH0CH1 (_ADC_SCANCTRL_INPUTMASK_CH0CH1 << 8)

Shifted mode CH0CH1 for ADC_SCANCTRL

Definition at line 422 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH1 (_ADC_SCANCTRL_INPUTMASK_CH1 << 8)

Shifted mode CH1 for ADC_SCANCTRL

Definition at line 423 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH2 (_ADC_SCANCTRL_INPUTMASK_CH2 << 8)

Shifted mode CH2 for ADC_SCANCTRL

Definition at line 425 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH2CH3 (_ADC_SCANCTRL_INPUTMASK_CH2CH3 << 8)

Shifted mode CH2CH3 for ADC_SCANCTRL

Definition at line 424 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH3 (_ADC_SCANCTRL_INPUTMASK_CH3 << 8)

Shifted mode CH3 for ADC_SCANCTRL

Definition at line 428 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH4 (_ADC_SCANCTRL_INPUTMASK_CH4 << 8)

Shifted mode CH4 for ADC_SCANCTRL

Definition at line 429 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH4CH5 (_ADC_SCANCTRL_INPUTMASK_CH4CH5 << 8)

Shifted mode CH4CH5 for ADC_SCANCTRL

Definition at line 426 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH5 (_ADC_SCANCTRL_INPUTMASK_CH5 << 8)

Shifted mode CH5 for ADC_SCANCTRL

Definition at line 430 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH6 (_ADC_SCANCTRL_INPUTMASK_CH6 << 8)

Shifted mode CH6 for ADC_SCANCTRL

Definition at line 431 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH6CH7 (_ADC_SCANCTRL_INPUTMASK_CH6CH7 << 8)

Shifted mode CH6CH7 for ADC_SCANCTRL

Definition at line 427 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_CH7 (_ADC_SCANCTRL_INPUTMASK_CH7 << 8)

Shifted mode CH7 for ADC_SCANCTRL

Definition at line 432 of file efm32wg_adc.h.

#define ADC_SCANCTRL_INPUTMASK_DEFAULT (_ADC_SCANCTRL_INPUTMASK_DEFAULT << 8)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 420 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSEN (0x1UL << 24)

Scan Sequence PRS Trigger Enable

Definition at line 473 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define ADC_SCANCTRL_PRSEN_DEFAULT (_ADC_SCANCTRL_PRSEN_DEFAULT << 24)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 477 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_DEFAULT (_ADC_SCANCTRL_PRSSEL_DEFAULT << 28)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 493 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH0 (_ADC_SCANCTRL_PRSSEL_PRSCH0 << 28)

Shifted mode PRSCH0 for ADC_SCANCTRL

Definition at line 494 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH1 (_ADC_SCANCTRL_PRSSEL_PRSCH1 << 28)

Shifted mode PRSCH1 for ADC_SCANCTRL

Definition at line 495 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH10 (_ADC_SCANCTRL_PRSSEL_PRSCH10 << 28)

Shifted mode PRSCH10 for ADC_SCANCTRL

Definition at line 504 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH11 (_ADC_SCANCTRL_PRSSEL_PRSCH11 << 28)

Shifted mode PRSCH11 for ADC_SCANCTRL

Definition at line 505 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH2 (_ADC_SCANCTRL_PRSSEL_PRSCH2 << 28)

Shifted mode PRSCH2 for ADC_SCANCTRL

Definition at line 496 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH3 (_ADC_SCANCTRL_PRSSEL_PRSCH3 << 28)

Shifted mode PRSCH3 for ADC_SCANCTRL

Definition at line 497 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH4 (_ADC_SCANCTRL_PRSSEL_PRSCH4 << 28)

Shifted mode PRSCH4 for ADC_SCANCTRL

Definition at line 498 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH5 (_ADC_SCANCTRL_PRSSEL_PRSCH5 << 28)

Shifted mode PRSCH5 for ADC_SCANCTRL

Definition at line 499 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH6 (_ADC_SCANCTRL_PRSSEL_PRSCH6 << 28)

Shifted mode PRSCH6 for ADC_SCANCTRL

Definition at line 500 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH7 (_ADC_SCANCTRL_PRSSEL_PRSCH7 << 28)

Shifted mode PRSCH7 for ADC_SCANCTRL

Definition at line 501 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH8 (_ADC_SCANCTRL_PRSSEL_PRSCH8 << 28)

Shifted mode PRSCH8 for ADC_SCANCTRL

Definition at line 502 of file efm32wg_adc.h.

#define ADC_SCANCTRL_PRSSEL_PRSCH9 (_ADC_SCANCTRL_PRSSEL_PRSCH9 << 28)

Shifted mode PRSCH9 for ADC_SCANCTRL

Definition at line 503 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_1V25 (_ADC_SCANCTRL_REF_1V25 << 16)

Shifted mode 1V25 for ADC_SCANCTRL

Definition at line 444 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_2V5 (_ADC_SCANCTRL_REF_2V5 << 16)

Shifted mode 2V5 for ADC_SCANCTRL

Definition at line 445 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_2XEXTDIFF (_ADC_SCANCTRL_REF_2XEXTDIFF << 16)

Shifted mode 2XEXTDIFF for ADC_SCANCTRL

Definition at line 449 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_2XVDD (_ADC_SCANCTRL_REF_2XVDD << 16)

Shifted mode 2XVDD for ADC_SCANCTRL

Definition at line 450 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_5VDIFF (_ADC_SCANCTRL_REF_5VDIFF << 16)

Shifted mode 5VDIFF for ADC_SCANCTRL

Definition at line 447 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_DEFAULT (_ADC_SCANCTRL_REF_DEFAULT << 16)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 443 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_EXTSINGLE (_ADC_SCANCTRL_REF_EXTSINGLE << 16)

Shifted mode EXTSINGLE for ADC_SCANCTRL

Definition at line 448 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REF_VDD (_ADC_SCANCTRL_REF_VDD << 16)

Shifted mode VDD for ADC_SCANCTRL

Definition at line 446 of file efm32wg_adc.h.

#define ADC_SCANCTRL_REP (0x1UL << 0)

Scan Sequence Repetitive Mode

Definition at line 374 of file efm32wg_adc.h.

Referenced by ADC_InitScan().

#define ADC_SCANCTRL_REP_DEFAULT (_ADC_SCANCTRL_REP_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 378 of file efm32wg_adc.h.

#define ADC_SCANCTRL_RES_12BIT (_ADC_SCANCTRL_RES_12BIT << 4)

Shifted mode 12BIT for ADC_SCANCTRL

Definition at line 401 of file efm32wg_adc.h.

#define ADC_SCANCTRL_RES_6BIT (_ADC_SCANCTRL_RES_6BIT << 4)

Shifted mode 6BIT for ADC_SCANCTRL

Definition at line 403 of file efm32wg_adc.h.

#define ADC_SCANCTRL_RES_8BIT (_ADC_SCANCTRL_RES_8BIT << 4)

Shifted mode 8BIT for ADC_SCANCTRL

Definition at line 402 of file efm32wg_adc.h.

#define ADC_SCANCTRL_RES_DEFAULT (_ADC_SCANCTRL_RES_DEFAULT << 4)

Shifted mode DEFAULT for ADC_SCANCTRL

Definition at line 400 of file efm32wg_adc.h.

#define ADC_SCANCTRL_RES_OVS (_ADC_SCANCTRL_RES_OVS << 4)

Shifted mode OVS for ADC_SCANCTRL

Definition at line 404 of file efm32wg_adc.h.

#define ADC_SCANDATA_DATA_DEFAULT (_ADC_SCANDATA_DATA_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SCANDATA

Definition at line 617 of file efm32wg_adc.h.

#define ADC_SCANDATAP_DATAP_DEFAULT (_ADC_SCANDATAP_DATAP_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SCANDATAP

Definition at line 633 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_ADJ (0x1UL << 2)

Single Sample Result Adjustment

Definition at line 232 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_ADJ_DEFAULT (_ADC_SINGLECTRL_ADJ_DEFAULT << 2)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 238 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_ADJ_LEFT (_ADC_SINGLECTRL_ADJ_LEFT << 2)

Shifted mode LEFT for ADC_SINGLECTRL

Definition at line 240 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define ADC_SINGLECTRL_ADJ_RIGHT (_ADC_SINGLECTRL_ADJ_RIGHT << 2)

Shifted mode RIGHT for ADC_SINGLECTRL

Definition at line 239 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_128CYCLES (_ADC_SINGLECTRL_AT_128CYCLES << 20)

Shifted mode 128CYCLES for ADC_SINGLECTRL

Definition at line 335 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_16CYCLES (_ADC_SINGLECTRL_AT_16CYCLES << 20)

Shifted mode 16CYCLES for ADC_SINGLECTRL

Definition at line 332 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_1CYCLE (_ADC_SINGLECTRL_AT_1CYCLE << 20)

Shifted mode 1CYCLE for ADC_SINGLECTRL

Definition at line 328 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_256CYCLES (_ADC_SINGLECTRL_AT_256CYCLES << 20)

Shifted mode 256CYCLES for ADC_SINGLECTRL

Definition at line 336 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_2CYCLES (_ADC_SINGLECTRL_AT_2CYCLES << 20)

Shifted mode 2CYCLES for ADC_SINGLECTRL

Definition at line 329 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_32CYCLES (_ADC_SINGLECTRL_AT_32CYCLES << 20)

Shifted mode 32CYCLES for ADC_SINGLECTRL

Definition at line 333 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_4CYCLES (_ADC_SINGLECTRL_AT_4CYCLES << 20)

Shifted mode 4CYCLES for ADC_SINGLECTRL

Definition at line 330 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_64CYCLES (_ADC_SINGLECTRL_AT_64CYCLES << 20)

Shifted mode 64CYCLES for ADC_SINGLECTRL

Definition at line 334 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_8CYCLES (_ADC_SINGLECTRL_AT_8CYCLES << 20)

Shifted mode 8CYCLES for ADC_SINGLECTRL

Definition at line 331 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_AT_DEFAULT (_ADC_SINGLECTRL_AT_DEFAULT << 20)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 327 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_DIFF (0x1UL << 1)

Single Sample Differential Mode

Definition at line 227 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define ADC_SINGLECTRL_DIFF_DEFAULT (_ADC_SINGLECTRL_DIFF_DEFAULT << 1)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 231 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH0 (_ADC_SINGLECTRL_INPUTSEL_CH0 << 8)

Shifted mode CH0 for ADC_SINGLECTRL

Definition at line 277 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH0CH1 (_ADC_SINGLECTRL_INPUTSEL_CH0CH1 << 8)

Shifted mode CH0CH1 for ADC_SINGLECTRL

Definition at line 278 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH1 (_ADC_SINGLECTRL_INPUTSEL_CH1 << 8)

Shifted mode CH1 for ADC_SINGLECTRL

Definition at line 279 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH2 (_ADC_SINGLECTRL_INPUTSEL_CH2 << 8)

Shifted mode CH2 for ADC_SINGLECTRL

Definition at line 281 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH2CH3 (_ADC_SINGLECTRL_INPUTSEL_CH2CH3 << 8)

Shifted mode CH2CH3 for ADC_SINGLECTRL

Definition at line 280 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH3 (_ADC_SINGLECTRL_INPUTSEL_CH3 << 8)

Shifted mode CH3 for ADC_SINGLECTRL

Definition at line 284 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH4 (_ADC_SINGLECTRL_INPUTSEL_CH4 << 8)

Shifted mode CH4 for ADC_SINGLECTRL

Definition at line 285 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH4CH5 (_ADC_SINGLECTRL_INPUTSEL_CH4CH5 << 8)

Shifted mode CH4CH5 for ADC_SINGLECTRL

Definition at line 282 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH5 (_ADC_SINGLECTRL_INPUTSEL_CH5 << 8)

Shifted mode CH5 for ADC_SINGLECTRL

Definition at line 287 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH6 (_ADC_SINGLECTRL_INPUTSEL_CH6 << 8)

Shifted mode CH6 for ADC_SINGLECTRL

Definition at line 288 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH6CH7 (_ADC_SINGLECTRL_INPUTSEL_CH6CH7 << 8)

Shifted mode CH6CH7 for ADC_SINGLECTRL

Definition at line 283 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_CH7 (_ADC_SINGLECTRL_INPUTSEL_CH7 << 8)

Shifted mode CH7 for ADC_SINGLECTRL

Definition at line 289 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 << 8)

Shifted mode DAC0OUT0 for ADC_SINGLECTRL

Definition at line 295 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 << 8)

Shifted mode DAC0OUT1 for ADC_SINGLECTRL

Definition at line 296 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_DEFAULT (_ADC_SINGLECTRL_INPUTSEL_DEFAULT << 8)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 276 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_DIFF0 (_ADC_SINGLECTRL_INPUTSEL_DIFF0 << 8)

Shifted mode DIFF0 for ADC_SINGLECTRL

Definition at line 286 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_TEMP (_ADC_SINGLECTRL_INPUTSEL_TEMP << 8)

Shifted mode TEMP for ADC_SINGLECTRL

Definition at line 290 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_VDD (_ADC_SINGLECTRL_INPUTSEL_VDD << 8)

Shifted mode VDD for ADC_SINGLECTRL

Definition at line 292 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_VDDDIV3 (_ADC_SINGLECTRL_INPUTSEL_VDDDIV3 << 8)

Shifted mode VDDDIV3 for ADC_SINGLECTRL

Definition at line 291 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_VREFDIV2 (_ADC_SINGLECTRL_INPUTSEL_VREFDIV2 << 8)

Shifted mode VREFDIV2 for ADC_SINGLECTRL

Definition at line 294 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_INPUTSEL_VSS (_ADC_SINGLECTRL_INPUTSEL_VSS << 8)

Shifted mode VSS for ADC_SINGLECTRL

Definition at line 293 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSEN (0x1UL << 24)

Single Sample PRS Trigger Enable

Definition at line 337 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define ADC_SINGLECTRL_PRSEN_DEFAULT (_ADC_SINGLECTRL_PRSEN_DEFAULT << 24)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 341 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_DEFAULT (_ADC_SINGLECTRL_PRSSEL_DEFAULT << 28)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 357 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH0 (_ADC_SINGLECTRL_PRSSEL_PRSCH0 << 28)

Shifted mode PRSCH0 for ADC_SINGLECTRL

Definition at line 358 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH1 (_ADC_SINGLECTRL_PRSSEL_PRSCH1 << 28)

Shifted mode PRSCH1 for ADC_SINGLECTRL

Definition at line 359 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH10 (_ADC_SINGLECTRL_PRSSEL_PRSCH10 << 28)

Shifted mode PRSCH10 for ADC_SINGLECTRL

Definition at line 368 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH11 (_ADC_SINGLECTRL_PRSSEL_PRSCH11 << 28)

Shifted mode PRSCH11 for ADC_SINGLECTRL

Definition at line 369 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH2 (_ADC_SINGLECTRL_PRSSEL_PRSCH2 << 28)

Shifted mode PRSCH2 for ADC_SINGLECTRL

Definition at line 360 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH3 (_ADC_SINGLECTRL_PRSSEL_PRSCH3 << 28)

Shifted mode PRSCH3 for ADC_SINGLECTRL

Definition at line 361 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH4 (_ADC_SINGLECTRL_PRSSEL_PRSCH4 << 28)

Shifted mode PRSCH4 for ADC_SINGLECTRL

Definition at line 362 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH5 (_ADC_SINGLECTRL_PRSSEL_PRSCH5 << 28)

Shifted mode PRSCH5 for ADC_SINGLECTRL

Definition at line 363 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH6 (_ADC_SINGLECTRL_PRSSEL_PRSCH6 << 28)

Shifted mode PRSCH6 for ADC_SINGLECTRL

Definition at line 364 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH7 (_ADC_SINGLECTRL_PRSSEL_PRSCH7 << 28)

Shifted mode PRSCH7 for ADC_SINGLECTRL

Definition at line 365 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH8 (_ADC_SINGLECTRL_PRSSEL_PRSCH8 << 28)

Shifted mode PRSCH8 for ADC_SINGLECTRL

Definition at line 366 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_PRSSEL_PRSCH9 (_ADC_SINGLECTRL_PRSSEL_PRSCH9 << 28)

Shifted mode PRSCH9 for ADC_SINGLECTRL

Definition at line 367 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_1V25 (_ADC_SINGLECTRL_REF_1V25 << 16)

Shifted mode 1V25 for ADC_SINGLECTRL

Definition at line 308 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_2V5 (_ADC_SINGLECTRL_REF_2V5 << 16)

Shifted mode 2V5 for ADC_SINGLECTRL

Definition at line 309 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_2XEXTDIFF (_ADC_SINGLECTRL_REF_2XEXTDIFF << 16)

Shifted mode 2XEXTDIFF for ADC_SINGLECTRL

Definition at line 313 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_2XVDD (_ADC_SINGLECTRL_REF_2XVDD << 16)

Shifted mode 2XVDD for ADC_SINGLECTRL

Definition at line 314 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_5VDIFF (_ADC_SINGLECTRL_REF_5VDIFF << 16)

Shifted mode 5VDIFF for ADC_SINGLECTRL

Definition at line 311 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_DEFAULT (_ADC_SINGLECTRL_REF_DEFAULT << 16)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 307 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_EXTSINGLE (_ADC_SINGLECTRL_REF_EXTSINGLE << 16)

Shifted mode EXTSINGLE for ADC_SINGLECTRL

Definition at line 312 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REF_VDD (_ADC_SINGLECTRL_REF_VDD << 16)

Shifted mode VDD for ADC_SINGLECTRL

Definition at line 310 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_REP (0x1UL << 0)

Single Sample Repetitive Mode

Definition at line 222 of file efm32wg_adc.h.

Referenced by ADC_InitSingle().

#define ADC_SINGLECTRL_REP_DEFAULT (_ADC_SINGLECTRL_REP_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 226 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_RES_12BIT (_ADC_SINGLECTRL_RES_12BIT << 4)

Shifted mode 12BIT for ADC_SINGLECTRL

Definition at line 249 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_RES_6BIT (_ADC_SINGLECTRL_RES_6BIT << 4)

Shifted mode 6BIT for ADC_SINGLECTRL

Definition at line 251 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_RES_8BIT (_ADC_SINGLECTRL_RES_8BIT << 4)

Shifted mode 8BIT for ADC_SINGLECTRL

Definition at line 250 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_RES_DEFAULT (_ADC_SINGLECTRL_RES_DEFAULT << 4)

Shifted mode DEFAULT for ADC_SINGLECTRL

Definition at line 248 of file efm32wg_adc.h.

#define ADC_SINGLECTRL_RES_OVS (_ADC_SINGLECTRL_RES_OVS << 4)

Shifted mode OVS for ADC_SINGLECTRL

Definition at line 252 of file efm32wg_adc.h.

#define ADC_SINGLEDATA_DATA_DEFAULT (_ADC_SINGLEDATA_DATA_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SINGLEDATA

Definition at line 609 of file efm32wg_adc.h.

#define ADC_SINGLEDATAP_DATAP_DEFAULT (_ADC_SINGLEDATAP_DATAP_DEFAULT << 0)

Shifted mode DEFAULT for ADC_SINGLEDATAP

Definition at line 625 of file efm32wg_adc.h.

#define ADC_STATUS_SCANACT (0x1UL << 1)

Scan Conversion Active

Definition at line 168 of file efm32wg_adc.h.

#define ADC_STATUS_SCANACT_DEFAULT (_ADC_STATUS_SCANACT_DEFAULT << 1)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 172 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH0 (_ADC_STATUS_SCANDATASRC_CH0 << 24)

Shifted mode CH0 for ADC_STATUS

Definition at line 210 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH1 (_ADC_STATUS_SCANDATASRC_CH1 << 24)

Shifted mode CH1 for ADC_STATUS

Definition at line 211 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH2 (_ADC_STATUS_SCANDATASRC_CH2 << 24)

Shifted mode CH2 for ADC_STATUS

Definition at line 212 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH3 (_ADC_STATUS_SCANDATASRC_CH3 << 24)

Shifted mode CH3 for ADC_STATUS

Definition at line 213 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH4 (_ADC_STATUS_SCANDATASRC_CH4 << 24)

Shifted mode CH4 for ADC_STATUS

Definition at line 214 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH5 (_ADC_STATUS_SCANDATASRC_CH5 << 24)

Shifted mode CH5 for ADC_STATUS

Definition at line 215 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH6 (_ADC_STATUS_SCANDATASRC_CH6 << 24)

Shifted mode CH6 for ADC_STATUS

Definition at line 216 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_CH7 (_ADC_STATUS_SCANDATASRC_CH7 << 24)

Shifted mode CH7 for ADC_STATUS

Definition at line 217 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDATASRC_DEFAULT (_ADC_STATUS_SCANDATASRC_DEFAULT << 24)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 209 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDV (0x1UL << 17)

Scan Data Valid

Definition at line 193 of file efm32wg_adc.h.

#define ADC_STATUS_SCANDV_DEFAULT (_ADC_STATUS_SCANDV_DEFAULT << 17)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 197 of file efm32wg_adc.h.

#define ADC_STATUS_SCANREFWARM (0x1UL << 9)

Scan Reference Warmed Up

Definition at line 178 of file efm32wg_adc.h.

#define ADC_STATUS_SCANREFWARM_DEFAULT (_ADC_STATUS_SCANREFWARM_DEFAULT << 9)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 182 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEACT (0x1UL << 0)

Single Conversion Active

Definition at line 163 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEACT_DEFAULT (_ADC_STATUS_SINGLEACT_DEFAULT << 0)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 167 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEDV (0x1UL << 16)

Single Sample Data Valid

Definition at line 188 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEDV_DEFAULT (_ADC_STATUS_SINGLEDV_DEFAULT << 16)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 192 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEREFWARM (0x1UL << 8)

Single Reference Warmed Up

Definition at line 173 of file efm32wg_adc.h.

#define ADC_STATUS_SINGLEREFWARM_DEFAULT (_ADC_STATUS_SINGLEREFWARM_DEFAULT << 8)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 177 of file efm32wg_adc.h.

#define ADC_STATUS_WARM (0x1UL << 12)

ADC Warmed Up

Definition at line 183 of file efm32wg_adc.h.

#define ADC_STATUS_WARM_DEFAULT (_ADC_STATUS_WARM_DEFAULT << 12)

Shifted mode DEFAULT for ADC_STATUS

Definition at line 187 of file efm32wg_adc.h.

Detailed Description

Macros

Macro Definition Documentation