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efm32wg_prs.h
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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typedef
struct
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{
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__IOM uint32_t
SWPULSE
;
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__IOM uint32_t
SWLEVEL
;
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__IOM uint32_t
ROUTE
;
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uint32_t RESERVED0[1];
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PRS_CH_TypeDef
CH[12];
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}
PRS_TypeDef
;
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/**************************************************************************/
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/* Bit fields for PRS SWPULSE */
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#define _PRS_SWPULSE_RESETVALUE 0x00000000UL
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#define _PRS_SWPULSE_MASK 0x00000FFFUL
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#define PRS_SWPULSE_CH0PULSE (0x1UL << 0)
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#define _PRS_SWPULSE_CH0PULSE_SHIFT 0
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#define _PRS_SWPULSE_CH0PULSE_MASK 0x1UL
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#define _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
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#define PRS_SWPULSE_CH1PULSE (0x1UL << 1)
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#define _PRS_SWPULSE_CH1PULSE_SHIFT 1
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#define _PRS_SWPULSE_CH1PULSE_MASK 0x2UL
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#define _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
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#define PRS_SWPULSE_CH2PULSE (0x1UL << 2)
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#define _PRS_SWPULSE_CH2PULSE_SHIFT 2
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#define _PRS_SWPULSE_CH2PULSE_MASK 0x4UL
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#define _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
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#define PRS_SWPULSE_CH3PULSE (0x1UL << 3)
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#define _PRS_SWPULSE_CH3PULSE_SHIFT 3
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#define _PRS_SWPULSE_CH3PULSE_MASK 0x8UL
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#define _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
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#define PRS_SWPULSE_CH4PULSE (0x1UL << 4)
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#define _PRS_SWPULSE_CH4PULSE_SHIFT 4
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#define _PRS_SWPULSE_CH4PULSE_MASK 0x10UL
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#define _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)
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#define PRS_SWPULSE_CH5PULSE (0x1UL << 5)
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#define _PRS_SWPULSE_CH5PULSE_SHIFT 5
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#define _PRS_SWPULSE_CH5PULSE_MASK 0x20UL
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#define _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)
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#define PRS_SWPULSE_CH6PULSE (0x1UL << 6)
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#define _PRS_SWPULSE_CH6PULSE_SHIFT 6
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#define _PRS_SWPULSE_CH6PULSE_MASK 0x40UL
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#define _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)
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#define PRS_SWPULSE_CH7PULSE (0x1UL << 7)
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#define _PRS_SWPULSE_CH7PULSE_SHIFT 7
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#define _PRS_SWPULSE_CH7PULSE_MASK 0x80UL
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#define _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)
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#define PRS_SWPULSE_CH8PULSE (0x1UL << 8)
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#define _PRS_SWPULSE_CH8PULSE_SHIFT 8
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#define _PRS_SWPULSE_CH8PULSE_MASK 0x100UL
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#define _PRS_SWPULSE_CH8PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH8PULSE_DEFAULT (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8)
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#define PRS_SWPULSE_CH9PULSE (0x1UL << 9)
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#define _PRS_SWPULSE_CH9PULSE_SHIFT 9
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#define _PRS_SWPULSE_CH9PULSE_MASK 0x200UL
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#define _PRS_SWPULSE_CH9PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH9PULSE_DEFAULT (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9)
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#define PRS_SWPULSE_CH10PULSE (0x1UL << 10)
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#define _PRS_SWPULSE_CH10PULSE_SHIFT 10
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#define _PRS_SWPULSE_CH10PULSE_MASK 0x400UL
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#define _PRS_SWPULSE_CH10PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH10PULSE_DEFAULT (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10)
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#define PRS_SWPULSE_CH11PULSE (0x1UL << 11)
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#define _PRS_SWPULSE_CH11PULSE_SHIFT 11
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#define _PRS_SWPULSE_CH11PULSE_MASK 0x800UL
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#define _PRS_SWPULSE_CH11PULSE_DEFAULT 0x00000000UL
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#define PRS_SWPULSE_CH11PULSE_DEFAULT (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11)
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/* Bit fields for PRS SWLEVEL */
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#define _PRS_SWLEVEL_RESETVALUE 0x00000000UL
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#define _PRS_SWLEVEL_MASK 0x00000FFFUL
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#define PRS_SWLEVEL_CH0LEVEL (0x1UL << 0)
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#define _PRS_SWLEVEL_CH0LEVEL_SHIFT 0
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#define _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL
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#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
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#define PRS_SWLEVEL_CH1LEVEL (0x1UL << 1)
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#define _PRS_SWLEVEL_CH1LEVEL_SHIFT 1
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#define _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL
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#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
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#define PRS_SWLEVEL_CH2LEVEL (0x1UL << 2)
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#define _PRS_SWLEVEL_CH2LEVEL_SHIFT 2
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#define _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL
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#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
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#define PRS_SWLEVEL_CH3LEVEL (0x1UL << 3)
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#define _PRS_SWLEVEL_CH3LEVEL_SHIFT 3
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#define _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL
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#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
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#define PRS_SWLEVEL_CH4LEVEL (0x1UL << 4)
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#define _PRS_SWLEVEL_CH4LEVEL_SHIFT 4
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#define _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL
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#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)
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#define PRS_SWLEVEL_CH5LEVEL (0x1UL << 5)
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#define _PRS_SWLEVEL_CH5LEVEL_SHIFT 5
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#define _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL
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#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)
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#define PRS_SWLEVEL_CH6LEVEL (0x1UL << 6)
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#define _PRS_SWLEVEL_CH6LEVEL_SHIFT 6
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#define _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL
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#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)
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#define PRS_SWLEVEL_CH7LEVEL (0x1UL << 7)
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#define _PRS_SWLEVEL_CH7LEVEL_SHIFT 7
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#define _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL
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#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)
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#define PRS_SWLEVEL_CH8LEVEL (0x1UL << 8)
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#define _PRS_SWLEVEL_CH8LEVEL_SHIFT 8
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#define _PRS_SWLEVEL_CH8LEVEL_MASK 0x100UL
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#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH8LEVEL_DEFAULT (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8)
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#define PRS_SWLEVEL_CH9LEVEL (0x1UL << 9)
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#define _PRS_SWLEVEL_CH9LEVEL_SHIFT 9
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#define _PRS_SWLEVEL_CH9LEVEL_MASK 0x200UL
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#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH9LEVEL_DEFAULT (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9)
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#define PRS_SWLEVEL_CH10LEVEL (0x1UL << 10)
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#define _PRS_SWLEVEL_CH10LEVEL_SHIFT 10
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#define _PRS_SWLEVEL_CH10LEVEL_MASK 0x400UL
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#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH10LEVEL_DEFAULT (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10)
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#define PRS_SWLEVEL_CH11LEVEL (0x1UL << 11)
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#define _PRS_SWLEVEL_CH11LEVEL_SHIFT 11
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#define _PRS_SWLEVEL_CH11LEVEL_MASK 0x800UL
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#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT 0x00000000UL
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#define PRS_SWLEVEL_CH11LEVEL_DEFAULT (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11)
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/* Bit fields for PRS ROUTE */
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#define _PRS_ROUTE_RESETVALUE 0x00000000UL
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#define _PRS_ROUTE_MASK 0x0000070FUL
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#define PRS_ROUTE_CH0PEN (0x1UL << 0)
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#define _PRS_ROUTE_CH0PEN_SHIFT 0
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#define _PRS_ROUTE_CH0PEN_MASK 0x1UL
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#define _PRS_ROUTE_CH0PEN_DEFAULT 0x00000000UL
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#define PRS_ROUTE_CH0PEN_DEFAULT (_PRS_ROUTE_CH0PEN_DEFAULT << 0)
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#define PRS_ROUTE_CH1PEN (0x1UL << 1)
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#define _PRS_ROUTE_CH1PEN_SHIFT 1
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#define _PRS_ROUTE_CH1PEN_MASK 0x2UL
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#define _PRS_ROUTE_CH1PEN_DEFAULT 0x00000000UL
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#define PRS_ROUTE_CH1PEN_DEFAULT (_PRS_ROUTE_CH1PEN_DEFAULT << 1)
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#define PRS_ROUTE_CH2PEN (0x1UL << 2)
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#define _PRS_ROUTE_CH2PEN_SHIFT 2
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#define _PRS_ROUTE_CH2PEN_MASK 0x4UL
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#define _PRS_ROUTE_CH2PEN_DEFAULT 0x00000000UL
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#define PRS_ROUTE_CH2PEN_DEFAULT (_PRS_ROUTE_CH2PEN_DEFAULT << 2)
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#define PRS_ROUTE_CH3PEN (0x1UL << 3)
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#define _PRS_ROUTE_CH3PEN_SHIFT 3
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#define _PRS_ROUTE_CH3PEN_MASK 0x8UL
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#define _PRS_ROUTE_CH3PEN_DEFAULT 0x00000000UL
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#define PRS_ROUTE_CH3PEN_DEFAULT (_PRS_ROUTE_CH3PEN_DEFAULT << 3)
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#define _PRS_ROUTE_LOCATION_SHIFT 8
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#define _PRS_ROUTE_LOCATION_MASK 0x700UL
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#define _PRS_ROUTE_LOCATION_LOC0 0x00000000UL
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#define _PRS_ROUTE_LOCATION_DEFAULT 0x00000000UL
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#define _PRS_ROUTE_LOCATION_LOC1 0x00000001UL
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#define PRS_ROUTE_LOCATION_LOC0 (_PRS_ROUTE_LOCATION_LOC0 << 8)
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#define PRS_ROUTE_LOCATION_DEFAULT (_PRS_ROUTE_LOCATION_DEFAULT << 8)
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#define PRS_ROUTE_LOCATION_LOC1 (_PRS_ROUTE_LOCATION_LOC1 << 8)
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/* Bit fields for PRS CH_CTRL */
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#define _PRS_CH_CTRL_RESETVALUE 0x00000000UL
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#define _PRS_CH_CTRL_MASK 0x133F0007UL
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#define _PRS_CH_CTRL_SIGSEL_SHIFT 0
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#define _PRS_CH_CTRL_SIGSEL_MASK 0x7UL
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#define _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER3UF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_USBSOF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_BURTCOF 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0 0x00000000UL
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#define _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER3OF 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_USBSOFSR 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_UART0TXC 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_UART1TXC 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1 0x00000001UL
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#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_UART1RXDATAV 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2 0x00000002UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 0x00000003UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 0x00000004UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 0x00000005UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 0x00000005UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 0x00000006UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 0x00000006UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL
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#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 0x00000007UL
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#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 0x00000007UL
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#define PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
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#define PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
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#define PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)
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#define PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)
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#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
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#define PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER3UF (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0)
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#define PRS_CH_CTRL_SIGSEL_USBSOF (_PRS_CH_CTRL_SIGSEL_USBSOF << 0)
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#define PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
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#define PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
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#define PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
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#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0)
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#define PRS_CH_CTRL_SIGSEL_BURTCOF (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0)
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#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0)
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#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0)
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#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0)
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#define PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)
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#define PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
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#define PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)
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#define PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
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#define PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)
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#define PRS_CH_CTRL_SIGSEL_TIMER3OF (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0)
331
#define PRS_CH_CTRL_SIGSEL_USBSOFSR (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0)
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#define PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
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#define PRS_CH_CTRL_SIGSEL_UART0TXC (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)
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#define PRS_CH_CTRL_SIGSEL_UART1TXC (_PRS_CH_CTRL_SIGSEL_UART1TXC << 0)
335
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
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#define PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
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#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0)
338
#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0 (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0)
339
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0)
340
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0)
341
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0)
342
#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)
343
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
344
#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0)
345
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
346
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
347
#define PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)
348
#define PRS_CH_CTRL_SIGSEL_TIMER3CC0 (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0)
349
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
350
#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)
351
#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV (_PRS_CH_CTRL_SIGSEL_UART1RXDATAV << 0)
352
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
353
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
354
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0)
355
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0)
356
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0)
357
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
358
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
359
#define PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)
360
#define PRS_CH_CTRL_SIGSEL_TIMER3CC1 (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0)
361
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
362
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
363
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0)
364
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0)
365
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
366
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
367
#define PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)
368
#define PRS_CH_CTRL_SIGSEL_TIMER3CC2 (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0)
369
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
370
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
371
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0)
372
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0)
373
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
374
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
375
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0)
376
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0)
377
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
378
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
379
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0)
380
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0)
381
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
382
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
383
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0)
384
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0)
385
#define _PRS_CH_CTRL_SOURCESEL_SHIFT 16
386
#define _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL
387
#define _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL
388
#define _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL
389
#define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL
390
#define _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL
391
#define _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL
392
#define _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL
393
#define _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL
394
#define _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL
395
#define _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL
396
#define _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL
397
#define _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL
398
#define _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL
399
#define _PRS_CH_CTRL_SOURCESEL_TIMER3 0x0000001FUL
400
#define _PRS_CH_CTRL_SOURCESEL_USB 0x00000024UL
401
#define _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL
402
#define _PRS_CH_CTRL_SOURCESEL_UART0 0x00000029UL
403
#define _PRS_CH_CTRL_SOURCESEL_UART1 0x0000002AUL
404
#define _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL
405
#define _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL
406
#define _PRS_CH_CTRL_SOURCESEL_LETIMER0 0x00000034UL
407
#define _PRS_CH_CTRL_SOURCESEL_BURTC 0x00000037UL
408
#define _PRS_CH_CTRL_SOURCESEL_LESENSEL 0x00000039UL
409
#define _PRS_CH_CTRL_SOURCESEL_LESENSEH 0x0000003AUL
410
#define _PRS_CH_CTRL_SOURCESEL_LESENSED 0x0000003BUL
411
#define PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
412
#define PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
413
#define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
414
#define PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)
415
#define PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)
416
#define PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
417
#define PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)
418
#define PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
419
#define PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)
420
#define PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
421
#define PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
422
#define PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)
423
#define PRS_CH_CTRL_SOURCESEL_TIMER3 (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16)
424
#define PRS_CH_CTRL_SOURCESEL_USB (_PRS_CH_CTRL_SOURCESEL_USB << 16)
425
#define PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
426
#define PRS_CH_CTRL_SOURCESEL_UART0 (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)
427
#define PRS_CH_CTRL_SOURCESEL_UART1 (_PRS_CH_CTRL_SOURCESEL_UART1 << 16)
428
#define PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
429
#define PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
430
#define PRS_CH_CTRL_SOURCESEL_LETIMER0 (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16)
431
#define PRS_CH_CTRL_SOURCESEL_BURTC (_PRS_CH_CTRL_SOURCESEL_BURTC << 16)
432
#define PRS_CH_CTRL_SOURCESEL_LESENSEL (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16)
433
#define PRS_CH_CTRL_SOURCESEL_LESENSEH (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16)
434
#define PRS_CH_CTRL_SOURCESEL_LESENSED (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16)
435
#define _PRS_CH_CTRL_EDSEL_SHIFT 24
436
#define _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL
437
#define _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL
438
#define _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL
439
#define _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL
440
#define _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL
441
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL
442
#define PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
443
#define PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24)
444
#define PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
445
#define PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
446
#define PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)
447
#define PRS_CH_CTRL_ASYNC (0x1UL << 28)
448
#define _PRS_CH_CTRL_ASYNC_SHIFT 28
449
#define _PRS_CH_CTRL_ASYNC_MASK 0x10000000UL
450
#define _PRS_CH_CTRL_ASYNC_DEFAULT 0x00000000UL
451
#define PRS_CH_CTRL_ASYNC_DEFAULT (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)
PRS_TypeDef::ROUTE
__IOM uint32_t ROUTE
Definition:
efm32wg_prs.h:45
PRS_TypeDef
Definition:
efm32wg_prs.h:41
PRS_CH_TypeDef
PRS_CH EFM32WG PRS CH.
Definition:
efm32wg_prs_ch.h:39
PRS_TypeDef::SWLEVEL
__IOM uint32_t SWLEVEL
Definition:
efm32wg_prs.h:44
PRS_TypeDef::SWPULSE
__IOM uint32_t SWPULSE
Definition:
efm32wg_prs.h:43
platform
Device
SiliconLabs
EFM32WG
Include
efm32wg_prs.h
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