Detailed Description

EFM32WG_DMACTRL register and bit field definitions.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

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Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

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Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file efm32wg_dmactrl.h.

Go to the source code of this file.

Macros
#define	_DMA_CTRL_CYCLE_CTRL_AUTO 0x02

#define	_DMA_CTRL_CYCLE_CTRL_BASIC 0x01

#define	_DMA_CTRL_CYCLE_CTRL_INVALID 0x00

#define	_DMA_CTRL_CYCLE_CTRL_MASK 0x00000007UL

#define	_DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x04

#define	_DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x05

#define	_DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x06

#define	_DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x07

#define	_DMA_CTRL_CYCLE_CTRL_PINGPONG 0x03

#define	_DMA_CTRL_CYCLE_CTRL_SHIFT 0

#define	_DMA_CTRL_DST_INC_BYTE 0x00

#define	_DMA_CTRL_DST_INC_HALFWORD 0x01

#define	_DMA_CTRL_DST_INC_MASK 0xC0000000UL

#define	_DMA_CTRL_DST_INC_NONE 0x03

#define	_DMA_CTRL_DST_INC_SHIFT 30

#define	_DMA_CTRL_DST_INC_WORD 0x02

#define	_DMA_CTRL_DST_PROT_CTRL_MASK 0x00E00000UL

#define	_DMA_CTRL_DST_PROT_CTRL_SHIFT 21

#define	_DMA_CTRL_DST_SIZE_BYTE 0x00

#define	_DMA_CTRL_DST_SIZE_HALFWORD 0x01

#define	_DMA_CTRL_DST_SIZE_MASK 0x30000000UL

#define	_DMA_CTRL_DST_SIZE_RSVD 0x03

#define	_DMA_CTRL_DST_SIZE_SHIFT 28

#define	_DMA_CTRL_DST_SIZE_WORD 0x02

#define	_DMA_CTRL_N_MINUS_1_MASK 0x00003FF0UL

#define	_DMA_CTRL_N_MINUS_1_SHIFT 4

#define	_DMA_CTRL_NEXT_USEBURST_MASK 0x00000008UL

#define	_DMA_CTRL_NEXT_USEBURST_SHIFT 3

#define	_DMA_CTRL_PROT_NON_PRIVILEGED 0x00

#define	_DMA_CTRL_PROT_PRIVILEGED 0x01

#define	_DMA_CTRL_R_POWER_1 0x00

#define	_DMA_CTRL_R_POWER_1024 0x0a

#define	_DMA_CTRL_R_POWER_128 0x07

#define	_DMA_CTRL_R_POWER_16 0x04

#define	_DMA_CTRL_R_POWER_2 0x01

#define	_DMA_CTRL_R_POWER_256 0x08

#define	_DMA_CTRL_R_POWER_32 0x05

#define	_DMA_CTRL_R_POWER_4 0x02

#define	_DMA_CTRL_R_POWER_512 0x09

#define	_DMA_CTRL_R_POWER_64 0x06

#define	_DMA_CTRL_R_POWER_8 0x03

#define	_DMA_CTRL_R_POWER_MASK 0x0003C000UL

#define	_DMA_CTRL_R_POWER_SHIFT 14

#define	_DMA_CTRL_SRC_INC_BYTE 0x00

#define	_DMA_CTRL_SRC_INC_HALFWORD 0x01

#define	_DMA_CTRL_SRC_INC_MASK 0x0C000000UL

#define	_DMA_CTRL_SRC_INC_NONE 0x03

#define	_DMA_CTRL_SRC_INC_SHIFT 26

#define	_DMA_CTRL_SRC_INC_WORD 0x02

#define	_DMA_CTRL_SRC_PROT_CTRL_MASK 0x001C0000UL

#define	_DMA_CTRL_SRC_PROT_CTRL_SHIFT 18

#define	_DMA_CTRL_SRC_SIZE_BYTE 0x00

#define	_DMA_CTRL_SRC_SIZE_HALFWORD 0x01

#define	_DMA_CTRL_SRC_SIZE_MASK 0x03000000UL

#define	_DMA_CTRL_SRC_SIZE_RSVD 0x03

#define	_DMA_CTRL_SRC_SIZE_SHIFT 24

#define	_DMA_CTRL_SRC_SIZE_WORD 0x02

#define	DMA_CTRL_CYCLE_CTRL_AUTO 0x00000002UL

#define	DMA_CTRL_CYCLE_CTRL_BASIC 0x00000001UL

#define	DMA_CTRL_CYCLE_CTRL_INVALID 0x00000000UL

#define	DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x000000004UL

#define	DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x000000005UL

#define	DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x000000006UL

#define	DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x000000007UL

#define	DMA_CTRL_CYCLE_CTRL_PINGPONG 0x00000003UL

#define	DMA_CTRL_DST_INC_BYTE 0x00000000UL

#define	DMA_CTRL_DST_INC_HALFWORD 0x40000000UL

#define	DMA_CTRL_DST_INC_NONE 0xC0000000UL

#define	DMA_CTRL_DST_INC_WORD 0x80000000UL

#define	DMA_CTRL_DST_PROT_NON_PRIVILEGED 0x00000000UL

#define	DMA_CTRL_DST_PROT_PRIVILEGED 0x00200000UL

#define	DMA_CTRL_DST_SIZE_BYTE 0x00000000UL

#define	DMA_CTRL_DST_SIZE_HALFWORD 0x10000000UL

#define	DMA_CTRL_DST_SIZE_RSVD 0x30000000UL

#define	DMA_CTRL_DST_SIZE_WORD 0x20000000UL

#define	DMA_CTRL_R_POWER_1 0x00000000UL

#define	DMA_CTRL_R_POWER_1024 0x00028000UL

#define	DMA_CTRL_R_POWER_128 0x0001c000UL

#define	DMA_CTRL_R_POWER_16 0x00010000UL

#define	DMA_CTRL_R_POWER_2 0x00004000UL

#define	DMA_CTRL_R_POWER_256 0x00020000UL

#define	DMA_CTRL_R_POWER_32 0x00014000UL

#define	DMA_CTRL_R_POWER_4 0x00008000UL

#define	DMA_CTRL_R_POWER_512 0x00024000UL

#define	DMA_CTRL_R_POWER_64 0x00018000UL

#define	DMA_CTRL_R_POWER_8 0x0000c000UL

#define	DMA_CTRL_SRC_INC_BYTE 0x00000000UL

#define	DMA_CTRL_SRC_INC_HALFWORD 0x04000000UL

#define	DMA_CTRL_SRC_INC_NONE 0x0C000000UL

#define	DMA_CTRL_SRC_INC_WORD 0x08000000UL

#define	DMA_CTRL_SRC_PROT_NON_PRIVILEGED 0x00000000UL

#define	DMA_CTRL_SRC_PROT_PRIVILEGED 0x00040000UL

#define	DMA_CTRL_SRC_SIZE_BYTE 0x00000000UL

#define	DMA_CTRL_SRC_SIZE_HALFWORD 0x01000000UL

#define	DMA_CTRL_SRC_SIZE_RSVD 0x03000000UL

#define	DMA_CTRL_SRC_SIZE_WORD 0x02000000UL

Detailed Description

License

Macros