EFM32 Wonder Gecko Software Documentation  efm32wg-doc-5.1.2
efm32wg_devinfo.h
Go to the documentation of this file.
1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
40 typedef struct
41 {
42  __IM uint32_t CAL;
43  __IM uint32_t ADC0CAL0;
44  __IM uint32_t ADC0CAL1;
45  __IM uint32_t ADC0CAL2;
46  uint32_t RESERVED0[2];
47  __IM uint32_t DAC0CAL0;
48  __IM uint32_t DAC0CAL1;
49  __IM uint32_t DAC0CAL2;
50  __IM uint32_t AUXHFRCOCAL0;
51  __IM uint32_t AUXHFRCOCAL1;
52  __IM uint32_t HFRCOCAL0;
53  __IM uint32_t HFRCOCAL1;
54  __IM uint32_t MEMINFO;
55  uint32_t RESERVED2[2];
56  __IM uint32_t UNIQUEL;
57  __IM uint32_t UNIQUEH;
58  __IM uint32_t MSIZE;
59  __IM uint32_t PART;
62 /**************************************************************************/
66 /* Bit fields for EFM32WG_DEVINFO */
67 #define _DEVINFO_CAL_CRC_MASK 0x0000FFFFUL
68 #define _DEVINFO_CAL_CRC_SHIFT 0
69 #define _DEVINFO_CAL_TEMP_MASK 0x00FF0000UL
70 #define _DEVINFO_CAL_TEMP_SHIFT 16
71 #define _DEVINFO_ADC0CAL0_1V25_GAIN_MASK 0x00007F00UL
72 #define _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT 8
73 #define _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK 0x0000007FUL
74 #define _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT 0
75 #define _DEVINFO_ADC0CAL0_2V5_GAIN_MASK 0x7F000000UL
76 #define _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT 24
77 #define _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK 0x007F0000UL
78 #define _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT 16
79 #define _DEVINFO_ADC0CAL1_VDD_GAIN_MASK 0x00007F00UL
80 #define _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT 8
81 #define _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK 0x0000007FUL
82 #define _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT 0
83 #define _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK 0x7F000000UL
84 #define _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT 24
85 #define _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK 0x007F0000UL
86 #define _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT 16
87 #define _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK 0x0000007FUL
88 #define _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT 0
89 #define _DEVINFO_ADC0CAL2_TEMP1V25_MASK 0xFFF00000UL
90 #define _DEVINFO_ADC0CAL2_TEMP1V25_SHIFT 20
91 #define _DEVINFO_DAC0CAL0_1V25_GAIN_MASK 0x007F0000UL
92 #define _DEVINFO_DAC0CAL0_1V25_GAIN_SHIFT 16
93 #define _DEVINFO_DAC0CAL0_1V25_CH1_OFFSET_MASK 0x00003F00UL
94 #define _DEVINFO_DAC0CAL0_1V25_CH1_OFFSET_SHIFT 8
95 #define _DEVINFO_DAC0CAL0_1V25_CH0_OFFSET_MASK 0x0000003FUL
96 #define _DEVINFO_DAC0CAL0_1V25_CH0_OFFSET_SHIFT 0
97 #define _DEVINFO_DAC0CAL1_2V5_GAIN_MASK 0x007F0000UL
98 #define _DEVINFO_DAC0CAL1_2V5_GAIN_SHIFT 16
99 #define _DEVINFO_DAC0CAL1_2V5_CH1_OFFSET_MASK 0x00003F00UL
100 #define _DEVINFO_DAC0CAL1_2V5_CH1_OFFSET_SHIFT 8
101 #define _DEVINFO_DAC0CAL1_2V5_CH0_OFFSET_MASK 0x0000003FUL
102 #define _DEVINFO_DAC0CAL1_2V5_CH0_OFFSET_SHIFT 0
103 #define _DEVINFO_DAC0CAL2_VDD_GAIN_MASK 0x007F0000UL
104 #define _DEVINFO_DAC0CAL2_VDD_GAIN_SHIFT 16
105 #define _DEVINFO_DAC0CAL2_VDD_CH1_OFFSET_MASK 0x00003F00UL
106 #define _DEVINFO_DAC0CAL2_VDD_CH1_OFFSET_SHIFT 8
107 #define _DEVINFO_DAC0CAL2_VDD_CH0_OFFSET_MASK 0x0000003FUL
108 #define _DEVINFO_DAC0CAL2_VDD_CH0_OFFSET_SHIFT 0
109 #define _DEVINFO_AUXHFRCOCAL0_BAND1_MASK 0x000000FFUL
110 #define _DEVINFO_AUXHFRCOCAL0_BAND1_SHIFT 0
111 #define _DEVINFO_AUXHFRCOCAL0_BAND7_MASK 0x0000FF00UL
112 #define _DEVINFO_AUXHFRCOCAL0_BAND7_SHIFT 8
113 #define _DEVINFO_AUXHFRCOCAL0_BAND11_MASK 0x00FF0000UL
114 #define _DEVINFO_AUXHFRCOCAL0_BAND11_SHIFT 16
115 #define _DEVINFO_AUXHFRCOCAL0_BAND14_MASK 0xFF000000UL
116 #define _DEVINFO_AUXHFRCOCAL0_BAND14_SHIFT 24
117 #define _DEVINFO_AUXHFRCOCAL1_BAND21_MASK 0x000000FFUL
118 #define _DEVINFO_AUXHFRCOCAL1_BAND21_SHIFT 0
119 #define _DEVINFO_AUXHFRCOCAL1_BAND28_MASK 0x0000FF00UL
120 #define _DEVINFO_AUXHFRCOCAL1_BAND28_SHIFT 8
121 #define _DEVINFO_HFRCOCAL0_BAND1_MASK 0x000000FFUL
122 #define _DEVINFO_HFRCOCAL0_BAND1_SHIFT 0
123 #define _DEVINFO_HFRCOCAL0_BAND7_MASK 0x0000FF00UL
124 #define _DEVINFO_HFRCOCAL0_BAND7_SHIFT 8
125 #define _DEVINFO_HFRCOCAL0_BAND11_MASK 0x00FF0000UL
126 #define _DEVINFO_HFRCOCAL0_BAND11_SHIFT 16
127 #define _DEVINFO_HFRCOCAL0_BAND14_MASK 0xFF000000UL
128 #define _DEVINFO_HFRCOCAL0_BAND14_SHIFT 24
129 #define _DEVINFO_HFRCOCAL1_BAND21_MASK 0x000000FFUL
130 #define _DEVINFO_HFRCOCAL1_BAND21_SHIFT 0
131 #define _DEVINFO_HFRCOCAL1_BAND28_MASK 0x0000FF00UL
132 #define _DEVINFO_HFRCOCAL1_BAND28_SHIFT 8
133 #define _DEVINFO_MEMINFO_FLASH_PAGE_SIZE_MASK 0xFF000000UL
134 #define _DEVINFO_MEMINFO_FLASH_PAGE_SIZE_SHIFT 24
135 #define _DEVINFO_UNIQUEL_MASK 0xFFFFFFFFUL
136 #define _DEVINFO_UNIQUEL_SHIFT 0
137 #define _DEVINFO_UNIQUEH_MASK 0xFFFFFFFFUL
138 #define _DEVINFO_UNIQUEH_SHIFT 0
139 #define _DEVINFO_MSIZE_SRAM_MASK 0xFFFF0000UL
140 #define _DEVINFO_MSIZE_SRAM_SHIFT 16
141 #define _DEVINFO_MSIZE_FLASH_MASK 0x0000FFFFUL
142 #define _DEVINFO_MSIZE_FLASH_SHIFT 0
143 #define _DEVINFO_PART_PROD_REV_MASK 0xFF000000UL
144 #define _DEVINFO_PART_PROD_REV_SHIFT 24
145 #define _DEVINFO_PART_DEVICE_FAMILY_MASK 0x00FF0000UL
146 #define _DEVINFO_PART_DEVICE_FAMILY_SHIFT 16
147 /* Legacy family #defines */
148 #define _DEVINFO_PART_DEVICE_FAMILY_G 71
149 #define _DEVINFO_PART_DEVICE_FAMILY_GG 72
150 #define _DEVINFO_PART_DEVICE_FAMILY_TG 73
151 #define _DEVINFO_PART_DEVICE_FAMILY_LG 74
152 #define _DEVINFO_PART_DEVICE_FAMILY_WG 75
153 #define _DEVINFO_PART_DEVICE_FAMILY_ZG 76
154 #define _DEVINFO_PART_DEVICE_FAMILY_HG 77
155 /* New style family #defines */
156 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32G 71
157 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32GG 72
158 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32TG 73
159 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32LG 74
160 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32WG 75
161 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32ZG 76
162 #define _DEVINFO_PART_DEVICE_FAMILY_EFM32HG 77
163 #define _DEVINFO_PART_DEVICE_FAMILY_EZR32WG 120
164 #define _DEVINFO_PART_DEVICE_FAMILY_EZR32LG 121
165 #define _DEVINFO_PART_DEVICE_FAMILY_EZR32HG 122
166 #define _DEVINFO_PART_DEVICE_NUMBER_MASK 0x0000FFFFUL
167 #define _DEVINFO_PART_DEVICE_NUMBER_SHIFT 0
__IM uint32_t UNIQUEH
__IM uint32_t DAC0CAL1
__IM uint32_t AUXHFRCOCAL0
__IM uint32_t AUXHFRCOCAL1
__IM uint32_t MSIZE
__IM uint32_t ADC0CAL0
__IM uint32_t DAC0CAL0
__IM uint32_t MEMINFO
__IM uint32_t ADC0CAL1
__IM uint32_t DAC0CAL2
__IM uint32_t PART
__IM uint32_t UNIQUEL
__IM uint32_t HFRCOCAL1
__IM uint32_t CAL
__IM uint32_t ADC0CAL2
__IM uint32_t HFRCOCAL0