EFM32 Wonder Gecko Software Documentation  efm32wg-doc-5.1.2
efm32wg_acmp.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t INPUTSEL;
45  __IM uint32_t STATUS;
46  __IOM uint32_t IEN;
47  __IM uint32_t IF;
48  __IOM uint32_t IFS;
49  __IOM uint32_t IFC;
50  __IOM uint32_t ROUTE;
51 } ACMP_TypeDef;
53 /**************************************************************************/
58 /* Bit fields for ACMP CTRL */
59 #define _ACMP_CTRL_RESETVALUE 0x47000000UL
60 #define _ACMP_CTRL_MASK 0xCF03077FUL
61 #define ACMP_CTRL_EN (0x1UL << 0)
62 #define _ACMP_CTRL_EN_SHIFT 0
63 #define _ACMP_CTRL_EN_MASK 0x1UL
64 #define _ACMP_CTRL_EN_DEFAULT 0x00000000UL
65 #define ACMP_CTRL_EN_DEFAULT (_ACMP_CTRL_EN_DEFAULT << 0)
66 #define ACMP_CTRL_MUXEN (0x1UL << 1)
67 #define _ACMP_CTRL_MUXEN_SHIFT 1
68 #define _ACMP_CTRL_MUXEN_MASK 0x2UL
69 #define _ACMP_CTRL_MUXEN_DEFAULT 0x00000000UL
70 #define ACMP_CTRL_MUXEN_DEFAULT (_ACMP_CTRL_MUXEN_DEFAULT << 1)
71 #define ACMP_CTRL_INACTVAL (0x1UL << 2)
72 #define _ACMP_CTRL_INACTVAL_SHIFT 2
73 #define _ACMP_CTRL_INACTVAL_MASK 0x4UL
74 #define _ACMP_CTRL_INACTVAL_DEFAULT 0x00000000UL
75 #define _ACMP_CTRL_INACTVAL_LOW 0x00000000UL
76 #define _ACMP_CTRL_INACTVAL_HIGH 0x00000001UL
77 #define ACMP_CTRL_INACTVAL_DEFAULT (_ACMP_CTRL_INACTVAL_DEFAULT << 2)
78 #define ACMP_CTRL_INACTVAL_LOW (_ACMP_CTRL_INACTVAL_LOW << 2)
79 #define ACMP_CTRL_INACTVAL_HIGH (_ACMP_CTRL_INACTVAL_HIGH << 2)
80 #define ACMP_CTRL_GPIOINV (0x1UL << 3)
81 #define _ACMP_CTRL_GPIOINV_SHIFT 3
82 #define _ACMP_CTRL_GPIOINV_MASK 0x8UL
83 #define _ACMP_CTRL_GPIOINV_DEFAULT 0x00000000UL
84 #define _ACMP_CTRL_GPIOINV_NOTINV 0x00000000UL
85 #define _ACMP_CTRL_GPIOINV_INV 0x00000001UL
86 #define ACMP_CTRL_GPIOINV_DEFAULT (_ACMP_CTRL_GPIOINV_DEFAULT << 3)
87 #define ACMP_CTRL_GPIOINV_NOTINV (_ACMP_CTRL_GPIOINV_NOTINV << 3)
88 #define ACMP_CTRL_GPIOINV_INV (_ACMP_CTRL_GPIOINV_INV << 3)
89 #define _ACMP_CTRL_HYSTSEL_SHIFT 4
90 #define _ACMP_CTRL_HYSTSEL_MASK 0x70UL
91 #define _ACMP_CTRL_HYSTSEL_DEFAULT 0x00000000UL
92 #define _ACMP_CTRL_HYSTSEL_HYST0 0x00000000UL
93 #define _ACMP_CTRL_HYSTSEL_HYST1 0x00000001UL
94 #define _ACMP_CTRL_HYSTSEL_HYST2 0x00000002UL
95 #define _ACMP_CTRL_HYSTSEL_HYST3 0x00000003UL
96 #define _ACMP_CTRL_HYSTSEL_HYST4 0x00000004UL
97 #define _ACMP_CTRL_HYSTSEL_HYST5 0x00000005UL
98 #define _ACMP_CTRL_HYSTSEL_HYST6 0x00000006UL
99 #define _ACMP_CTRL_HYSTSEL_HYST7 0x00000007UL
100 #define ACMP_CTRL_HYSTSEL_DEFAULT (_ACMP_CTRL_HYSTSEL_DEFAULT << 4)
101 #define ACMP_CTRL_HYSTSEL_HYST0 (_ACMP_CTRL_HYSTSEL_HYST0 << 4)
102 #define ACMP_CTRL_HYSTSEL_HYST1 (_ACMP_CTRL_HYSTSEL_HYST1 << 4)
103 #define ACMP_CTRL_HYSTSEL_HYST2 (_ACMP_CTRL_HYSTSEL_HYST2 << 4)
104 #define ACMP_CTRL_HYSTSEL_HYST3 (_ACMP_CTRL_HYSTSEL_HYST3 << 4)
105 #define ACMP_CTRL_HYSTSEL_HYST4 (_ACMP_CTRL_HYSTSEL_HYST4 << 4)
106 #define ACMP_CTRL_HYSTSEL_HYST5 (_ACMP_CTRL_HYSTSEL_HYST5 << 4)
107 #define ACMP_CTRL_HYSTSEL_HYST6 (_ACMP_CTRL_HYSTSEL_HYST6 << 4)
108 #define ACMP_CTRL_HYSTSEL_HYST7 (_ACMP_CTRL_HYSTSEL_HYST7 << 4)
109 #define _ACMP_CTRL_WARMTIME_SHIFT 8
110 #define _ACMP_CTRL_WARMTIME_MASK 0x700UL
111 #define _ACMP_CTRL_WARMTIME_DEFAULT 0x00000000UL
112 #define _ACMP_CTRL_WARMTIME_4CYCLES 0x00000000UL
113 #define _ACMP_CTRL_WARMTIME_8CYCLES 0x00000001UL
114 #define _ACMP_CTRL_WARMTIME_16CYCLES 0x00000002UL
115 #define _ACMP_CTRL_WARMTIME_32CYCLES 0x00000003UL
116 #define _ACMP_CTRL_WARMTIME_64CYCLES 0x00000004UL
117 #define _ACMP_CTRL_WARMTIME_128CYCLES 0x00000005UL
118 #define _ACMP_CTRL_WARMTIME_256CYCLES 0x00000006UL
119 #define _ACMP_CTRL_WARMTIME_512CYCLES 0x00000007UL
120 #define ACMP_CTRL_WARMTIME_DEFAULT (_ACMP_CTRL_WARMTIME_DEFAULT << 8)
121 #define ACMP_CTRL_WARMTIME_4CYCLES (_ACMP_CTRL_WARMTIME_4CYCLES << 8)
122 #define ACMP_CTRL_WARMTIME_8CYCLES (_ACMP_CTRL_WARMTIME_8CYCLES << 8)
123 #define ACMP_CTRL_WARMTIME_16CYCLES (_ACMP_CTRL_WARMTIME_16CYCLES << 8)
124 #define ACMP_CTRL_WARMTIME_32CYCLES (_ACMP_CTRL_WARMTIME_32CYCLES << 8)
125 #define ACMP_CTRL_WARMTIME_64CYCLES (_ACMP_CTRL_WARMTIME_64CYCLES << 8)
126 #define ACMP_CTRL_WARMTIME_128CYCLES (_ACMP_CTRL_WARMTIME_128CYCLES << 8)
127 #define ACMP_CTRL_WARMTIME_256CYCLES (_ACMP_CTRL_WARMTIME_256CYCLES << 8)
128 #define ACMP_CTRL_WARMTIME_512CYCLES (_ACMP_CTRL_WARMTIME_512CYCLES << 8)
129 #define ACMP_CTRL_IRISE (0x1UL << 16)
130 #define _ACMP_CTRL_IRISE_SHIFT 16
131 #define _ACMP_CTRL_IRISE_MASK 0x10000UL
132 #define _ACMP_CTRL_IRISE_DEFAULT 0x00000000UL
133 #define _ACMP_CTRL_IRISE_DISABLED 0x00000000UL
134 #define _ACMP_CTRL_IRISE_ENABLED 0x00000001UL
135 #define ACMP_CTRL_IRISE_DEFAULT (_ACMP_CTRL_IRISE_DEFAULT << 16)
136 #define ACMP_CTRL_IRISE_DISABLED (_ACMP_CTRL_IRISE_DISABLED << 16)
137 #define ACMP_CTRL_IRISE_ENABLED (_ACMP_CTRL_IRISE_ENABLED << 16)
138 #define ACMP_CTRL_IFALL (0x1UL << 17)
139 #define _ACMP_CTRL_IFALL_SHIFT 17
140 #define _ACMP_CTRL_IFALL_MASK 0x20000UL
141 #define _ACMP_CTRL_IFALL_DEFAULT 0x00000000UL
142 #define _ACMP_CTRL_IFALL_DISABLED 0x00000000UL
143 #define _ACMP_CTRL_IFALL_ENABLED 0x00000001UL
144 #define ACMP_CTRL_IFALL_DEFAULT (_ACMP_CTRL_IFALL_DEFAULT << 17)
145 #define ACMP_CTRL_IFALL_DISABLED (_ACMP_CTRL_IFALL_DISABLED << 17)
146 #define ACMP_CTRL_IFALL_ENABLED (_ACMP_CTRL_IFALL_ENABLED << 17)
147 #define _ACMP_CTRL_BIASPROG_SHIFT 24
148 #define _ACMP_CTRL_BIASPROG_MASK 0xF000000UL
149 #define _ACMP_CTRL_BIASPROG_DEFAULT 0x00000007UL
150 #define ACMP_CTRL_BIASPROG_DEFAULT (_ACMP_CTRL_BIASPROG_DEFAULT << 24)
151 #define ACMP_CTRL_HALFBIAS (0x1UL << 30)
152 #define _ACMP_CTRL_HALFBIAS_SHIFT 30
153 #define _ACMP_CTRL_HALFBIAS_MASK 0x40000000UL
154 #define _ACMP_CTRL_HALFBIAS_DEFAULT 0x00000001UL
155 #define ACMP_CTRL_HALFBIAS_DEFAULT (_ACMP_CTRL_HALFBIAS_DEFAULT << 30)
156 #define ACMP_CTRL_FULLBIAS (0x1UL << 31)
157 #define _ACMP_CTRL_FULLBIAS_SHIFT 31
158 #define _ACMP_CTRL_FULLBIAS_MASK 0x80000000UL
159 #define _ACMP_CTRL_FULLBIAS_DEFAULT 0x00000000UL
160 #define ACMP_CTRL_FULLBIAS_DEFAULT (_ACMP_CTRL_FULLBIAS_DEFAULT << 31)
162 /* Bit fields for ACMP INPUTSEL */
163 #define _ACMP_INPUTSEL_RESETVALUE 0x00010080UL
164 #define _ACMP_INPUTSEL_MASK 0x31013FF7UL
165 #define _ACMP_INPUTSEL_POSSEL_SHIFT 0
166 #define _ACMP_INPUTSEL_POSSEL_MASK 0x7UL
167 #define _ACMP_INPUTSEL_POSSEL_DEFAULT 0x00000000UL
168 #define _ACMP_INPUTSEL_POSSEL_CH0 0x00000000UL
169 #define _ACMP_INPUTSEL_POSSEL_CH1 0x00000001UL
170 #define _ACMP_INPUTSEL_POSSEL_CH2 0x00000002UL
171 #define _ACMP_INPUTSEL_POSSEL_CH3 0x00000003UL
172 #define _ACMP_INPUTSEL_POSSEL_CH4 0x00000004UL
173 #define _ACMP_INPUTSEL_POSSEL_CH5 0x00000005UL
174 #define _ACMP_INPUTSEL_POSSEL_CH6 0x00000006UL
175 #define _ACMP_INPUTSEL_POSSEL_CH7 0x00000007UL
176 #define ACMP_INPUTSEL_POSSEL_DEFAULT (_ACMP_INPUTSEL_POSSEL_DEFAULT << 0)
177 #define ACMP_INPUTSEL_POSSEL_CH0 (_ACMP_INPUTSEL_POSSEL_CH0 << 0)
178 #define ACMP_INPUTSEL_POSSEL_CH1 (_ACMP_INPUTSEL_POSSEL_CH1 << 0)
179 #define ACMP_INPUTSEL_POSSEL_CH2 (_ACMP_INPUTSEL_POSSEL_CH2 << 0)
180 #define ACMP_INPUTSEL_POSSEL_CH3 (_ACMP_INPUTSEL_POSSEL_CH3 << 0)
181 #define ACMP_INPUTSEL_POSSEL_CH4 (_ACMP_INPUTSEL_POSSEL_CH4 << 0)
182 #define ACMP_INPUTSEL_POSSEL_CH5 (_ACMP_INPUTSEL_POSSEL_CH5 << 0)
183 #define ACMP_INPUTSEL_POSSEL_CH6 (_ACMP_INPUTSEL_POSSEL_CH6 << 0)
184 #define ACMP_INPUTSEL_POSSEL_CH7 (_ACMP_INPUTSEL_POSSEL_CH7 << 0)
185 #define _ACMP_INPUTSEL_NEGSEL_SHIFT 4
186 #define _ACMP_INPUTSEL_NEGSEL_MASK 0xF0UL
187 #define _ACMP_INPUTSEL_NEGSEL_CH0 0x00000000UL
188 #define _ACMP_INPUTSEL_NEGSEL_CH1 0x00000001UL
189 #define _ACMP_INPUTSEL_NEGSEL_CH2 0x00000002UL
190 #define _ACMP_INPUTSEL_NEGSEL_CH3 0x00000003UL
191 #define _ACMP_INPUTSEL_NEGSEL_CH4 0x00000004UL
192 #define _ACMP_INPUTSEL_NEGSEL_CH5 0x00000005UL
193 #define _ACMP_INPUTSEL_NEGSEL_CH6 0x00000006UL
194 #define _ACMP_INPUTSEL_NEGSEL_CH7 0x00000007UL
195 #define _ACMP_INPUTSEL_NEGSEL_DEFAULT 0x00000008UL
196 #define _ACMP_INPUTSEL_NEGSEL_1V25 0x00000008UL
197 #define _ACMP_INPUTSEL_NEGSEL_2V5 0x00000009UL
198 #define _ACMP_INPUTSEL_NEGSEL_VDD 0x0000000AUL
199 #define _ACMP_INPUTSEL_NEGSEL_CAPSENSE 0x0000000BUL
200 #define _ACMP_INPUTSEL_NEGSEL_DAC0CH0 0x0000000CUL
201 #define _ACMP_INPUTSEL_NEGSEL_DAC0CH1 0x0000000DUL
202 #define ACMP_INPUTSEL_NEGSEL_CH0 (_ACMP_INPUTSEL_NEGSEL_CH0 << 4)
203 #define ACMP_INPUTSEL_NEGSEL_CH1 (_ACMP_INPUTSEL_NEGSEL_CH1 << 4)
204 #define ACMP_INPUTSEL_NEGSEL_CH2 (_ACMP_INPUTSEL_NEGSEL_CH2 << 4)
205 #define ACMP_INPUTSEL_NEGSEL_CH3 (_ACMP_INPUTSEL_NEGSEL_CH3 << 4)
206 #define ACMP_INPUTSEL_NEGSEL_CH4 (_ACMP_INPUTSEL_NEGSEL_CH4 << 4)
207 #define ACMP_INPUTSEL_NEGSEL_CH5 (_ACMP_INPUTSEL_NEGSEL_CH5 << 4)
208 #define ACMP_INPUTSEL_NEGSEL_CH6 (_ACMP_INPUTSEL_NEGSEL_CH6 << 4)
209 #define ACMP_INPUTSEL_NEGSEL_CH7 (_ACMP_INPUTSEL_NEGSEL_CH7 << 4)
210 #define ACMP_INPUTSEL_NEGSEL_DEFAULT (_ACMP_INPUTSEL_NEGSEL_DEFAULT << 4)
211 #define ACMP_INPUTSEL_NEGSEL_1V25 (_ACMP_INPUTSEL_NEGSEL_1V25 << 4)
212 #define ACMP_INPUTSEL_NEGSEL_2V5 (_ACMP_INPUTSEL_NEGSEL_2V5 << 4)
213 #define ACMP_INPUTSEL_NEGSEL_VDD (_ACMP_INPUTSEL_NEGSEL_VDD << 4)
214 #define ACMP_INPUTSEL_NEGSEL_CAPSENSE (_ACMP_INPUTSEL_NEGSEL_CAPSENSE << 4)
215 #define ACMP_INPUTSEL_NEGSEL_DAC0CH0 (_ACMP_INPUTSEL_NEGSEL_DAC0CH0 << 4)
216 #define ACMP_INPUTSEL_NEGSEL_DAC0CH1 (_ACMP_INPUTSEL_NEGSEL_DAC0CH1 << 4)
217 #define _ACMP_INPUTSEL_VDDLEVEL_SHIFT 8
218 #define _ACMP_INPUTSEL_VDDLEVEL_MASK 0x3F00UL
219 #define _ACMP_INPUTSEL_VDDLEVEL_DEFAULT 0x00000000UL
220 #define ACMP_INPUTSEL_VDDLEVEL_DEFAULT (_ACMP_INPUTSEL_VDDLEVEL_DEFAULT << 8)
221 #define ACMP_INPUTSEL_LPREF (0x1UL << 16)
222 #define _ACMP_INPUTSEL_LPREF_SHIFT 16
223 #define _ACMP_INPUTSEL_LPREF_MASK 0x10000UL
224 #define _ACMP_INPUTSEL_LPREF_DEFAULT 0x00000001UL
225 #define ACMP_INPUTSEL_LPREF_DEFAULT (_ACMP_INPUTSEL_LPREF_DEFAULT << 16)
226 #define ACMP_INPUTSEL_CSRESEN (0x1UL << 24)
227 #define _ACMP_INPUTSEL_CSRESEN_SHIFT 24
228 #define _ACMP_INPUTSEL_CSRESEN_MASK 0x1000000UL
229 #define _ACMP_INPUTSEL_CSRESEN_DEFAULT 0x00000000UL
230 #define ACMP_INPUTSEL_CSRESEN_DEFAULT (_ACMP_INPUTSEL_CSRESEN_DEFAULT << 24)
231 #define _ACMP_INPUTSEL_CSRESSEL_SHIFT 28
232 #define _ACMP_INPUTSEL_CSRESSEL_MASK 0x30000000UL
233 #define _ACMP_INPUTSEL_CSRESSEL_DEFAULT 0x00000000UL
234 #define _ACMP_INPUTSEL_CSRESSEL_RES0 0x00000000UL
235 #define _ACMP_INPUTSEL_CSRESSEL_RES1 0x00000001UL
236 #define _ACMP_INPUTSEL_CSRESSEL_RES2 0x00000002UL
237 #define _ACMP_INPUTSEL_CSRESSEL_RES3 0x00000003UL
238 #define ACMP_INPUTSEL_CSRESSEL_DEFAULT (_ACMP_INPUTSEL_CSRESSEL_DEFAULT << 28)
239 #define ACMP_INPUTSEL_CSRESSEL_RES0 (_ACMP_INPUTSEL_CSRESSEL_RES0 << 28)
240 #define ACMP_INPUTSEL_CSRESSEL_RES1 (_ACMP_INPUTSEL_CSRESSEL_RES1 << 28)
241 #define ACMP_INPUTSEL_CSRESSEL_RES2 (_ACMP_INPUTSEL_CSRESSEL_RES2 << 28)
242 #define ACMP_INPUTSEL_CSRESSEL_RES3 (_ACMP_INPUTSEL_CSRESSEL_RES3 << 28)
244 /* Bit fields for ACMP STATUS */
245 #define _ACMP_STATUS_RESETVALUE 0x00000000UL
246 #define _ACMP_STATUS_MASK 0x00000003UL
247 #define ACMP_STATUS_ACMPACT (0x1UL << 0)
248 #define _ACMP_STATUS_ACMPACT_SHIFT 0
249 #define _ACMP_STATUS_ACMPACT_MASK 0x1UL
250 #define _ACMP_STATUS_ACMPACT_DEFAULT 0x00000000UL
251 #define ACMP_STATUS_ACMPACT_DEFAULT (_ACMP_STATUS_ACMPACT_DEFAULT << 0)
252 #define ACMP_STATUS_ACMPOUT (0x1UL << 1)
253 #define _ACMP_STATUS_ACMPOUT_SHIFT 1
254 #define _ACMP_STATUS_ACMPOUT_MASK 0x2UL
255 #define _ACMP_STATUS_ACMPOUT_DEFAULT 0x00000000UL
256 #define ACMP_STATUS_ACMPOUT_DEFAULT (_ACMP_STATUS_ACMPOUT_DEFAULT << 1)
258 /* Bit fields for ACMP IEN */
259 #define _ACMP_IEN_RESETVALUE 0x00000000UL
260 #define _ACMP_IEN_MASK 0x00000003UL
261 #define ACMP_IEN_EDGE (0x1UL << 0)
262 #define _ACMP_IEN_EDGE_SHIFT 0
263 #define _ACMP_IEN_EDGE_MASK 0x1UL
264 #define _ACMP_IEN_EDGE_DEFAULT 0x00000000UL
265 #define ACMP_IEN_EDGE_DEFAULT (_ACMP_IEN_EDGE_DEFAULT << 0)
266 #define ACMP_IEN_WARMUP (0x1UL << 1)
267 #define _ACMP_IEN_WARMUP_SHIFT 1
268 #define _ACMP_IEN_WARMUP_MASK 0x2UL
269 #define _ACMP_IEN_WARMUP_DEFAULT 0x00000000UL
270 #define ACMP_IEN_WARMUP_DEFAULT (_ACMP_IEN_WARMUP_DEFAULT << 1)
272 /* Bit fields for ACMP IF */
273 #define _ACMP_IF_RESETVALUE 0x00000000UL
274 #define _ACMP_IF_MASK 0x00000003UL
275 #define ACMP_IF_EDGE (0x1UL << 0)
276 #define _ACMP_IF_EDGE_SHIFT 0
277 #define _ACMP_IF_EDGE_MASK 0x1UL
278 #define _ACMP_IF_EDGE_DEFAULT 0x00000000UL
279 #define ACMP_IF_EDGE_DEFAULT (_ACMP_IF_EDGE_DEFAULT << 0)
280 #define ACMP_IF_WARMUP (0x1UL << 1)
281 #define _ACMP_IF_WARMUP_SHIFT 1
282 #define _ACMP_IF_WARMUP_MASK 0x2UL
283 #define _ACMP_IF_WARMUP_DEFAULT 0x00000000UL
284 #define ACMP_IF_WARMUP_DEFAULT (_ACMP_IF_WARMUP_DEFAULT << 1)
286 /* Bit fields for ACMP IFS */
287 #define _ACMP_IFS_RESETVALUE 0x00000000UL
288 #define _ACMP_IFS_MASK 0x00000003UL
289 #define ACMP_IFS_EDGE (0x1UL << 0)
290 #define _ACMP_IFS_EDGE_SHIFT 0
291 #define _ACMP_IFS_EDGE_MASK 0x1UL
292 #define _ACMP_IFS_EDGE_DEFAULT 0x00000000UL
293 #define ACMP_IFS_EDGE_DEFAULT (_ACMP_IFS_EDGE_DEFAULT << 0)
294 #define ACMP_IFS_WARMUP (0x1UL << 1)
295 #define _ACMP_IFS_WARMUP_SHIFT 1
296 #define _ACMP_IFS_WARMUP_MASK 0x2UL
297 #define _ACMP_IFS_WARMUP_DEFAULT 0x00000000UL
298 #define ACMP_IFS_WARMUP_DEFAULT (_ACMP_IFS_WARMUP_DEFAULT << 1)
300 /* Bit fields for ACMP IFC */
301 #define _ACMP_IFC_RESETVALUE 0x00000000UL
302 #define _ACMP_IFC_MASK 0x00000003UL
303 #define ACMP_IFC_EDGE (0x1UL << 0)
304 #define _ACMP_IFC_EDGE_SHIFT 0
305 #define _ACMP_IFC_EDGE_MASK 0x1UL
306 #define _ACMP_IFC_EDGE_DEFAULT 0x00000000UL
307 #define ACMP_IFC_EDGE_DEFAULT (_ACMP_IFC_EDGE_DEFAULT << 0)
308 #define ACMP_IFC_WARMUP (0x1UL << 1)
309 #define _ACMP_IFC_WARMUP_SHIFT 1
310 #define _ACMP_IFC_WARMUP_MASK 0x2UL
311 #define _ACMP_IFC_WARMUP_DEFAULT 0x00000000UL
312 #define ACMP_IFC_WARMUP_DEFAULT (_ACMP_IFC_WARMUP_DEFAULT << 1)
314 /* Bit fields for ACMP ROUTE */
315 #define _ACMP_ROUTE_RESETVALUE 0x00000000UL
316 #define _ACMP_ROUTE_MASK 0x00000701UL
317 #define ACMP_ROUTE_ACMPPEN (0x1UL << 0)
318 #define _ACMP_ROUTE_ACMPPEN_SHIFT 0
319 #define _ACMP_ROUTE_ACMPPEN_MASK 0x1UL
320 #define _ACMP_ROUTE_ACMPPEN_DEFAULT 0x00000000UL
321 #define ACMP_ROUTE_ACMPPEN_DEFAULT (_ACMP_ROUTE_ACMPPEN_DEFAULT << 0)
322 #define _ACMP_ROUTE_LOCATION_SHIFT 8
323 #define _ACMP_ROUTE_LOCATION_MASK 0x700UL
324 #define _ACMP_ROUTE_LOCATION_LOC0 0x00000000UL
325 #define _ACMP_ROUTE_LOCATION_DEFAULT 0x00000000UL
326 #define _ACMP_ROUTE_LOCATION_LOC1 0x00000001UL
327 #define _ACMP_ROUTE_LOCATION_LOC2 0x00000002UL
328 #define ACMP_ROUTE_LOCATION_LOC0 (_ACMP_ROUTE_LOCATION_LOC0 << 8)
329 #define ACMP_ROUTE_LOCATION_DEFAULT (_ACMP_ROUTE_LOCATION_DEFAULT << 8)
330 #define ACMP_ROUTE_LOCATION_LOC1 (_ACMP_ROUTE_LOCATION_LOC1 << 8)
331 #define ACMP_ROUTE_LOCATION_LOC2 (_ACMP_ROUTE_LOCATION_LOC2 << 8)
__IOM uint32_t IFC
Definition: efm32wg_acmp.h:49
__IM uint32_t STATUS
Definition: efm32wg_acmp.h:45
__IOM uint32_t IEN
Definition: efm32wg_acmp.h:46
__IOM uint32_t INPUTSEL
Definition: efm32wg_acmp.h:44
__IOM uint32_t CTRL
Definition: efm32wg_acmp.h:43
__IOM uint32_t IFS
Definition: efm32wg_acmp.h:48
__IM uint32_t IF
Definition: efm32wg_acmp.h:47
__IOM uint32_t ROUTE
Definition: efm32wg_acmp.h:50