EFM32 Pearl Gecko 12 Software Documentation
efm32pg12-doc-5.1.2
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Linked Direct Memory Access (LDMA) Peripheral API.
The LDMA API functions provide full support for the LDMA peripheral.
The LDMA supports these DMA transfer types:
The LDMA supports linked lists of DMA descriptors allowing:
The LDMA has some advanced features:
A basic understanding of the LDMA controller is assumed. Please refer to the reference manual for further details. The LDMA examples described in the reference manual are particularly helpful in understanding LDMA operations.
In order to use the DMA controller, the initialization function LDMA_Init() must have been executed once (normally during system init).
DMA transfers are initiated by a call to LDMA_StartTransfer(), the transfer properties are controlled by the contents of LDMA_TransferCfg_t and LDMA_Descriptor_t structure parameters. The LDMA_Descriptor_t structure parameter may be a pointer to an array of descriptors, the descriptors in the array should be linked together as needed.
Transfer and descriptor initialization macros are provided for the most common transfer types. Due to the flexibility of the LDMA peripheral only a small subset of all possible initializer macros are provided, the user should create new one's when needed.
Examples of LDMA usage:
A simple memory to memory transfer:
A linked list of three memory to memory transfers:
DMA from serial port peripheral to memory:
Ping pong DMA from serial port peripheral to memory:
Data Structures | |
union | LDMA_Descriptor_t |
DMA descriptor. More... | |
struct | LDMA_Init_t |
LDMA initialization configuration structure. More... | |
struct | LDMA_TransferCfg_t |
DMA transfer configuration structure. More... | |
Macros | |
#define | LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) |
DMA descriptor initializer for linked memory to memory byte transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) |
DMA descriptor initializer for linked memory to memory half-word transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) |
DMA descriptor initializer for linked memory to memory word transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) |
DMA descriptor initializer for SYNC transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) |
DMA descriptor initializer for Immediate WRITE transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory byte transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory half-word transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory word transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) |
DMA descriptor initializer for byte transfers from memory to a peripheral. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) |
DMA descriptor initializer for byte transfers from a peripheral to memory. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp) |
DMA descriptor initializer for SYNC transfer. More... | |
#define | LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) |
DMA descriptor initializer for Immediate WRITE transfer. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) |
DMA descriptor initializer for single memory to memory byte transfer. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) |
DMA descriptor initializer for single memory to memory half-word transfer. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) |
DMA descriptor initializer for single memory to memory word transfer. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) |
DMA descriptor initializer for byte transfers from memory to a peripheral. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) |
DMA descriptor initializer for byte transfers from a peripheral to memory. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) |
DMA descriptor initializer for byte transfers from a peripheral to a peripheral. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) |
DMA descriptor initializer for SYNC transfer. More... | |
#define | LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) |
DMA descriptor initializer for Immediate WRITE transfer. More... | |
#define | LDMA_INIT_DEFAULT |
Default DMA initialization structure. More... | |
#define | LDMA_TRANSFER_CFG_MEMORY() |
Generic DMA transfer configuration for memory to memory transfers. More... | |
#define | LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt) |
Generic DMA transfer configuration for looped memory to memory transfers. More... | |
#define | LDMA_TRANSFER_CFG_PERIPHERAL(signal) |
Generic DMA transfer configuration for memory to/from peripheral transfers. More... | |
#define | LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) |
Generic DMA transfer configuration for looped memory to/from peripheral transfers. More... | |
Enumerations | |
enum | LDMA_CfgArbSlots_t { ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE, ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO, ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR, ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT } |
enum | LDMA_CfgDstIncSign_t { ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE, ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE } |
enum | LDMA_CfgSrcIncSign_t { ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE, ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE } |
enum | LDMA_CtrlBlockSize_t { ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1, ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2, ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3, ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4, ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6, ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8, ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16, ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32, ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64, ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128, ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256, ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512, ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024, ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL } |
enum | LDMA_CtrlDstAddrMode_t { ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE, ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE } |
enum | LDMA_CtrlDstInc_t { ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE, ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO, ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR, ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE } |
enum | LDMA_CtrlReqMode_t { ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK, ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL } |
enum | LDMA_CtrlSize_t { ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE, ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD, ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD } |
enum | LDMA_CtrlSrcAddrMode_t { ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE, ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE } |
enum | LDMA_CtrlSrcInc_t { ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE, ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO, ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR, ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE } |
enum | LDMA_CtrlStructType_t { ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER, ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE, ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE } |
enum | LDMA_LinkMode_t { ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE, ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE } |
enum | LDMA_PeripheralSignal_t { ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE, ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0, ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0, ldmaPeripheralSignal_CRYPTO0_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ldmaPeripheralSignal_CRYPTO0_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ldmaPeripheralSignal_CRYPTO0_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ldmaPeripheralSignal_CRYPTO0_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ldmaPeripheralSignal_CRYPTO0_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ldmaPeripheralSignal_CRYPTO1_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ldmaPeripheralSignal_CRYPTO1_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ldmaPeripheralSignal_CRYPTO1_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ldmaPeripheralSignal_CRYPTO1_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ldmaPeripheralSignal_CRYPTO1_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ldmaPeripheralSignal_CSEN_BSLN = LDMA_CH_REQSEL_SIGSEL_CSENBSLN | LDMA_CH_REQSEL_SOURCESEL_CSEN, ldmaPeripheralSignal_CSEN_DATA = LDMA_CH_REQSEL_SIGSEL_CSENDATA | LDMA_CH_REQSEL_SOURCESEL_CSEN, ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0, ldmaPeripheralSignal_I2C0_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C0TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C0, ldmaPeripheralSignal_I2C1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C1, ldmaPeripheralSignal_I2C1_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C1TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C1, ldmaPeripheralSignal_LESENSE_BUFDATAV = LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV | LDMA_CH_REQSEL_SOURCESEL_LESENSE, ldmaPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ldmaPeripheralSignal_LEUART0_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC, ldmaPeripheralSignal_PRS_REQ0 = LDMA_CH_REQSEL_SIGSEL_PRSREQ0 | LDMA_CH_REQSEL_SOURCESEL_PRS, ldmaPeripheralSignal_PRS_REQ1 = LDMA_CH_REQSEL_SIGSEL_PRSREQ1 | LDMA_CH_REQSEL_SOURCESEL_PRS, ldmaPeripheralSignal_TIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_TXBL = LDMA_CH_REQSEL_SIGSEL_USART0TXBL | LDMA_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXBL = LDMA_CH_REQSEL_SIGSEL_USART1TXBL | LDMA_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART2_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_TXBL = LDMA_CH_REQSEL_SIGSEL_USART2TXBL | LDMA_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART3_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART3, ldmaPeripheralSignal_USART3_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ldmaPeripheralSignal_USART3_TXBL = LDMA_CH_REQSEL_SIGSEL_USART3TXBL | LDMA_CH_REQSEL_SOURCESEL_USART3, ldmaPeripheralSignal_USART3_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ldmaPeripheralSignal_USART3_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART3, ldmaPeripheralSignal_VDAC0_CH0 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ldmaPeripheralSignal_VDAC0_CH1 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ldmaPeripheralSignal_WTIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ldmaPeripheralSignal_WTIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ldmaPeripheralSignal_WTIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ldmaPeripheralSignal_WTIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ldmaPeripheralSignal_WTIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ldmaPeripheralSignal_WTIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ldmaPeripheralSignal_WTIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ldmaPeripheralSignal_WTIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1 } |
Functions | |
void | LDMA_DeInit (void) |
De-initialize the LDMA controller. More... | |
void | LDMA_EnableChannelRequest (int ch, bool enable) |
Enable or disable a LDMA channel request. More... | |
void | LDMA_Init (const LDMA_Init_t *init) |
Initialize the LDMA controller. More... | |
__STATIC_INLINE void | LDMA_IntClear (uint32_t flags) |
Clear one or more pending LDMA interrupts. More... | |
__STATIC_INLINE void | LDMA_IntDisable (uint32_t flags) |
Disable one or more LDMA interrupts. More... | |
__STATIC_INLINE void | LDMA_IntEnable (uint32_t flags) |
Enable one or more LDMA interrupts. More... | |
__STATIC_INLINE uint32_t | LDMA_IntGet (void) |
Get pending LDMA interrupt flags. More... | |
__STATIC_INLINE uint32_t | LDMA_IntGetEnabled (void) |
Get enabled and pending LDMA interrupt flags. Useful for handling more interrupt sources in the same interrupt handler. More... | |
__STATIC_INLINE void | LDMA_IntSet (uint32_t flags) |
Set one or more pending LDMA interrupts. More... | |
void | LDMA_StartTransfer (int ch, const LDMA_TransferCfg_t *transfer, const LDMA_Descriptor_t *descriptor) |
Start a DMA transfer. More... | |
void | LDMA_StopTransfer (int ch) |
Stop a DMA transfer. More... | |
bool | LDMA_TransferDone (int ch) |
Check if a DMA transfer has completed. More... | |
uint32_t | LDMA_TransferRemainingCount (int ch) |
Get number of items remaining in a transfer. More... | |
#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for linked memory to memory byte transfer.
The link address must be an absolute address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of bytes to transfer. |
#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for linked memory to memory half-word transfer.
The link address must be an absolute address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of half-words to transfer. |
#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for linked memory to memory word transfer.
The link address must be an absolute address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of words to transfer. |
#define LDMA_DESCRIPTOR_LINKABS_SYNC | ( | set, | |
clr, | |||
matchValue, | |||
matchEnable | |||
) |
DMA descriptor initializer for SYNC transfer.
The link address must be an absolute address.
[in] | set | Sync pattern bits to set. |
[in] | clr | Sync pattern bits to clear. |
[in] | matchValue | Sync pattern to match. |
[in] | matchEnable | Sync pattern bits to enable for match. |
#define LDMA_DESCRIPTOR_LINKABS_WRITE | ( | value, | |
address | |||
) |
DMA descriptor initializer for Immediate WRITE transfer.
The link address must be an absolute address.
[in] | value | Immediate value to write. |
[in] | address | Write sddress. |
#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE | ( | src, | |
dest, | |||
count, | |||
linkjmp | |||
) |
DMA descriptor initializer for linked memory to memory byte transfer.
The link address is a relative address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of bytes to transfer. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF | ( | src, | |
dest, | |||
count, | |||
linkjmp | |||
) |
DMA descriptor initializer for linked memory to memory half-word transfer.
The link address is a relative address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of half-words to transfer. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD | ( | src, | |
dest, | |||
count, | |||
linkjmp | |||
) |
DMA descriptor initializer for linked memory to memory word transfer.
The link address is a relative address.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of words to transfer. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE | ( | src, | |
dest, | |||
count, | |||
linkjmp | |||
) |
DMA descriptor initializer for byte transfers from memory to a peripheral.
[in] | src | Source data address. |
[in] | dest | Peripheral data register destination address. |
[in] | count | Number of bytes to transfer. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE | ( | src, | |
dest, | |||
count, | |||
linkjmp | |||
) |
DMA descriptor initializer for byte transfers from a peripheral to memory.
[in] | src | Peripheral data source register address. |
[in] | dest | Destination data address. |
[in] | count | Number of bytes to transfer. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_SYNC | ( | set, | |
clr, | |||
matchValue, | |||
matchEnable, | |||
linkjmp | |||
) |
DMA descriptor initializer for SYNC transfer.
[in] | set | Sync pattern bits to set. |
[in] | clr | Sync pattern bits to clear. |
[in] | matchValue | Sync pattern to match. |
[in] | matchEnable | Sync pattern bits to enable for match. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_LINKREL_WRITE | ( | value, | |
address, | |||
linkjmp | |||
) |
DMA descriptor initializer for Immediate WRITE transfer.
[in] | value | Immediate value to write. |
[in] | address | Write sddress. |
[in] | linkjmp | Address of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory. |
#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for single memory to memory byte transfer.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of bytes to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for single memory to memory half-word transfer.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of half-words to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for single memory to memory word transfer.
[in] | src | Source data address. |
[in] | dest | Destination data address. |
[in] | count | Number of words to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for byte transfers from memory to a peripheral.
[in] | src | Source data address. |
[in] | dest | Peripheral data register destination address. |
[in] | count | Number of bytes to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for byte transfers from a peripheral to memory.
[in] | src | Peripheral data source register address. |
[in] | dest | Destination data address. |
[in] | count | Number of bytes to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE | ( | src, | |
dest, | |||
count | |||
) |
DMA descriptor initializer for byte transfers from a peripheral to a peripheral.
[in] | src | Peripheral data source register address. |
[in] | dest | Peripheral data destination register address. |
[in] | count | Number of bytes to transfer. |
#define LDMA_DESCRIPTOR_SINGLE_SYNC | ( | set, | |
clr, | |||
matchValue, | |||
matchEnable | |||
) |
DMA descriptor initializer for SYNC transfer.
[in] | set | Sync pattern bits to set. |
[in] | clr | Sync pattern bits to clear. |
[in] | matchValue | Sync pattern to match. |
[in] | matchEnable | Sync pattern bits to enable for match. |
#define LDMA_DESCRIPTOR_SINGLE_WRITE | ( | value, | |
address | |||
) |
DMA descriptor initializer for Immediate WRITE transfer.
[in] | value | Immediate value to write. |
[in] | address | Write sddress. |
#define LDMA_INIT_DEFAULT |
Default DMA initialization structure.
Definition at line 586 of file em_ldma.h.
Referenced by DMADRV_Init().
#define LDMA_TRANSFER_CFG_MEMORY | ( | ) |
Generic DMA transfer configuration for memory to memory transfers.
#define LDMA_TRANSFER_CFG_MEMORY_LOOP | ( | loopCnt | ) |
Generic DMA transfer configuration for looped memory to memory transfers.
#define LDMA_TRANSFER_CFG_PERIPHERAL | ( | signal | ) |
Generic DMA transfer configuration for memory to/from peripheral transfers.
#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP | ( | signal, | |
loopCnt | |||
) |
Generic DMA transfer configuration for looped memory to/from peripheral transfers.
enum LDMA_CfgArbSlots_t |
enum LDMA_CfgDstIncSign_t |
enum LDMA_CfgSrcIncSign_t |
enum LDMA_CtrlBlockSize_t |
This value controls the number of unit data transfers per arbitration cycle, providing a means to balance DMA channels' load on the controller.
enum LDMA_CtrlDstInc_t |
Destination address increment unit size.
enum LDMA_CtrlReqMode_t |
enum LDMA_CtrlSize_t |
enum LDMA_CtrlSrcInc_t |
Source address increment unit size.
enum LDMA_LinkMode_t |
Peripherals that can trigger LDMA transfers.
void LDMA_DeInit | ( | void | ) |
De-initialize the LDMA controller.
LDMA interrupts are disabled and the LDMA clock is stopped.
Definition at line 90 of file em_ldma.c.
References CMU_ClockEnable(), cmuClock_LDMA, LDMA, and LDMA_IRQn.
Referenced by DMADRV_DeInit().
void LDMA_EnableChannelRequest | ( | int | ch, |
bool | enable | ||
) |
Enable or disable a LDMA channel request.
Use this function to enable or disable a LDMA channel request. This will prevent the LDMA from proceeding after its current transaction if disabled.
[in] | channel | LDMA channel to enable or disable requests on. |
[in] | enable | If 'true' request will be enabled. If 'false' request will be disabled. |
Definition at line 112 of file em_ldma.c.
References BUS_RegBitWrite(), and LDMA.
Referenced by DMADRV_PauseTransfer(), and DMADRV_ResumeTransfer().
void LDMA_Init | ( | const LDMA_Init_t * | init | ) |
Initialize the LDMA controller.
This function will disable all the LDMA channels and enable the LDMA bus clock in the CMU. This function will also enable the LDMA IRQ in the NVIC and set the LDMA IRQ priority to a user configurable priority. The LDMA interrupt priority is configured using the LDMA_Init_t structure.
[in] | init | Pointer to initialization structure used to configure the LDMA. |
Definition at line 137 of file em_ldma.c.
References __NVIC_PRIO_BITS, _LDMA_CTRL_NUMFIXED_MASK, _LDMA_CTRL_NUMFIXED_SHIFT, _LDMA_CTRL_SYNCPRSCLREN_MASK, _LDMA_CTRL_SYNCPRSCLREN_SHIFT, _LDMA_CTRL_SYNCPRSSETEN_MASK, _LDMA_CTRL_SYNCPRSSETEN_SHIFT, CMU_ClockEnable(), cmuClock_LDMA, LDMA, LDMA_IEN_ERROR, LDMA_IRQn, LDMA_Init_t::ldmaInitCtrlNumFixed, LDMA_Init_t::ldmaInitCtrlSyncPrsClrEn, LDMA_Init_t::ldmaInitCtrlSyncPrsSetEn, and LDMA_Init_t::ldmaInitIrqPriority.
Referenced by DMADRV_Init().
__STATIC_INLINE void LDMA_IntClear | ( | uint32_t | flags | ) |
Clear one or more pending LDMA interrupts.
[in] | flags | Pending LDMA interrupt sources to clear. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IFC_ERROR and one done flag for each channel. |
Definition at line 1407 of file em_ldma.h.
References LDMA.
__STATIC_INLINE void LDMA_IntDisable | ( | uint32_t | flags | ) |
Disable one or more LDMA interrupts.
[in] | flags | LDMA interrupt sources to disable. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel. |
Definition at line 1422 of file em_ldma.h.
References LDMA.
__STATIC_INLINE void LDMA_IntEnable | ( | uint32_t | flags | ) |
Enable one or more LDMA interrupts.
[in] | flags | LDMA interrupt sources to enable. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel. |
Definition at line 1442 of file em_ldma.h.
References LDMA.
__STATIC_INLINE uint32_t LDMA_IntGet | ( | void | ) |
Get pending LDMA interrupt flags.
Definition at line 1460 of file em_ldma.h.
References LDMA.
__STATIC_INLINE uint32_t LDMA_IntGetEnabled | ( | void | ) |
Get enabled and pending LDMA interrupt flags. Useful for handling more interrupt sources in the same interrupt handler.
Definition at line 1480 of file em_ldma.h.
References LDMA.
__STATIC_INLINE void LDMA_IntSet | ( | uint32_t | flags | ) |
Set one or more pending LDMA interrupts.
[in] | flags | LDMA interrupt sources to set to pending. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IFS_ERROR and one done flag for each LDMA channel. |
Definition at line 1498 of file em_ldma.h.
References LDMA.
void LDMA_StartTransfer | ( | int | ch, |
const LDMA_TransferCfg_t * | transfer, | ||
const LDMA_Descriptor_t * | descriptor | ||
) |
Start a DMA transfer.
[in] | ch | DMA channel. |
[in] | transfer | Initialization structure used to configure the transfer. |
[in] | descriptor | Transfer descriptor, can be an array of descriptors linked together. |
Definition at line 183 of file em_ldma.c.
References _LDMA_CH_CFG_ARBSLOTS_MASK, _LDMA_CH_CFG_ARBSLOTS_SHIFT, _LDMA_CH_CFG_DSTINCSIGN_MASK, _LDMA_CH_CFG_DSTINCSIGN_SHIFT, _LDMA_CH_CFG_SRCINCSIGN_MASK, _LDMA_CH_CFG_SRCINCSIGN_SHIFT, _LDMA_CH_LINK_LINKADDR_MASK, _LDMA_CH_LOOP_LOOPCNT_MASK, _LDMA_CH_LOOP_LOOPCNT_SHIFT, _LDMA_CH_REQSEL_MASK, _LDMA_CTRL_SYNCPRSCLREN_MASK, _LDMA_CTRL_SYNCPRSCLREN_SHIFT, _LDMA_CTRL_SYNCPRSSETEN_MASK, _LDMA_CTRL_SYNCPRSSETEN_SHIFT, BUS_RegMaskedClear(), CORE_DECLARE_IRQ_STATE, CORE_ENTER_ATOMIC, CORE_EXIT_ATOMIC, LDMA, LDMA_TransferCfg_t::ldmaCfgArbSlots, LDMA_TransferCfg_t::ldmaCfgDstIncSign, LDMA_TransferCfg_t::ldmaCfgSrcIncSign, LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOff, LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOn, LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOff, LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOn, LDMA_TransferCfg_t::ldmaDbgHalt, LDMA_TransferCfg_t::ldmaLoopCnt, LDMA_TransferCfg_t::ldmaReqDis, and LDMA_TransferCfg_t::ldmaReqSel.
Referenced by DMADRV_LdmaStartTransfer().
void LDMA_StopTransfer | ( | int | ch | ) |
Stop a DMA transfer.
[in] | ch | DMA channel to stop. |
Definition at line 284 of file em_ldma.c.
References BUS_RegMaskedClear(), CORE_ATOMIC_SECTION, and LDMA.
Referenced by DMADRV_StopTransfer().
bool LDMA_TransferDone | ( | int | ch | ) |
Check if a DMA transfer has completed.
[in] | ch | DMA channel to check. |
Definition at line 306 of file em_ldma.c.
References CORE_ATOMIC_SECTION, and LDMA.
Referenced by DMADRV_TransferDone().
uint32_t LDMA_TransferRemainingCount | ( | int | ch | ) |
Get number of items remaining in a transfer.
[in] | ch | The channel number of the transfer to check. |
Definition at line 338 of file em_ldma.c.
References _LDMA_CH_CTRL_XFERCNT_MASK, _LDMA_CH_CTRL_XFERCNT_SHIFT, CORE_ATOMIC_SECTION, and LDMA.
Referenced by DMADRV_TransferRemainingCount().