37 #if defined( EMU_PRESENT )
60 #if defined( _EMU_EM4CONF_OSC_MASK )
65 emuEM4Osc_ULFRCO = EMU_EM4CONF_OSC_ULFRCO,
67 emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO,
69 emuEM4Osc_LFRCO = EMU_EM4CONF_OSC_LFRCO
73 #if defined( _EMU_BUCTRL_PROBE_MASK )
78 emuProbe_Disable = EMU_BUCTRL_PROBE_DISABLE,
80 emuProbe_VDDDReg = EMU_BUCTRL_PROBE_VDDDREG,
82 emuProbe_BUIN = EMU_BUCTRL_PROBE_BUIN,
84 emuProbe_BUOUT = EMU_BUCTRL_PROBE_BUOUT
88 #if defined( _EMU_PWRCONF_PWRRES_MASK )
93 emuRes_Res0 = EMU_PWRCONF_PWRRES_RES0,
95 emuRes_Res1 = EMU_PWRCONF_PWRRES_RES1,
97 emuRes_Res2 = EMU_PWRCONF_PWRRES_RES2,
99 emuRes_Res3 = EMU_PWRCONF_PWRRES_RES3,
100 } EMU_Resistor_TypeDef;
103 #if defined( BU_PRESENT )
108 emuPower_None = EMU_BUINACT_PWRCON_NONE,
111 emuPower_BUMain = EMU_BUINACT_PWRCON_BUMAIN,
114 emuPower_MainBU = EMU_BUINACT_PWRCON_MAINBU,
116 emuPower_NoDiode = EMU_BUINACT_PWRCON_NODIODE,
129 #if defined( _EMU_EM4CTRL_EM4STATE_MASK )
141 #if defined( _EMU_EM4CTRL_EM4IORETMODE_MASK )
162 #if defined( _EMU_DCDCCTRL_MASK )
170 #if defined(_EMU_DCDCLPEM01CFG_MASK)
177 #if defined( _EMU_DCDCCTRL_MASK )
190 #if defined( _EMU_PWRCTRL_MASK )
201 #if defined( _EMU_DCDCMISCCTRL_MASK )
206 #define emuDcdcLnHighEfficiency -1
209 #define emuDcdcLnFastTransient 160
213 #if defined( _EMU_DCDCCTRL_MASK )
237 #define EMU_DcdcLnRcoBand_3MHz emuDcdcLnRcoBand_3MHz
238 #define EMU_DcdcLnRcoBand_4MHz emuDcdcLnRcoBand_4MHz
239 #define EMU_DcdcLnRcoBand_5MHz emuDcdcLnRcoBand_5MHz
240 #define EMU_DcdcLnRcoBand_6MHz emuDcdcLnRcoBand_6MHz
241 #define EMU_DcdcLnRcoBand_7MHz emuDcdcLnRcoBand_7MHz
242 #define EMU_DcdcLnRcoBand_8MHz emuDcdcLnRcoBand_8MHz
243 #define EMU_DcdcLnRcoBand_9MHz emuDcdcLnRcoBand_9MHz
244 #define EMU_DcdcLnRcoBand_10MHz emuDcdcLnRcoBand_10MHz
249 #if defined( _EMU_DCDCCTRL_MASK )
261 #if defined( EMU_STATUS_VMONRDY )
266 emuVmonChannel_ALTAVDD,
268 emuVmonChannel_IOVDD0
272 #if defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 )
278 emuBiasMode_Continuous
279 } EMU_BiasMode_TypeDef;
282 #if defined( _EMU_CMD_EM01VSCALE0_MASK )
297 #if defined( _EMU_CTRL_EM23VSCALE_MASK )
310 #if defined( _EMU_CTRL_EM4HVSCALE_MASK )
323 #if defined(_EMU_EM23PERNORETAINCTRL_MASK)
338 #if defined( _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK )
354 #if defined( _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK )
360 emuPeripheralRetention_ALL = emuPeripheralRetention_D1
361 | emuPeripheralRetention_D2,
369 #if defined( _EMU_CMD_EM01VSCALE0_MASK )
379 #if defined( _EMU_CMD_EM01VSCALE0_MASK )
381 #define EMU_EM01INIT_DEFAULT \
391 #if defined( _EMU_CTRL_EM23VSCALE_MASK )
397 #if defined( _EMU_CTRL_EM4HVSCALE_MASK )
398 #define EMU_EM23INIT_DEFAULT \
401 emuVScaleEM23_FastWakeup, \
404 #define EMU_EM23INIT_DEFAULT \
410 #if defined( _EMU_EM4CONF_MASK ) || defined( _EMU_EM4CTRL_MASK )
414 #if defined( _EMU_EM4CONF_MASK )
418 EMU_EM4Osc_TypeDef osc;
421 #elif defined( _EMU_EM4CTRL_MASK )
429 #if defined( _EMU_CTRL_EM4HVSCALE_MASK )
435 #if defined( _EMU_EM4CONF_MASK )
437 #define EMU_EM4INIT_DEFAULT \
446 #elif defined( _EMU_CTRL_EM4HVSCALE_MASK )
448 #define EMU_EM4INIT_DEFAULT \
454 emuPinRetentionDisable, \
455 emuVScaleEM4H_FastWakeup, \
458 #elif defined( _EMU_EM4CTRL_MASK )
460 #define EMU_EM4INIT_DEFAULT \
466 emuPinRetentionDisable, \
470 #if defined( BU_PRESENT )
477 EMU_Probe_TypeDef probe;
481 bool statusPinEnable;
485 EMU_Resistor_TypeDef resistor;
493 EMU_Power_TypeDef inactivePower;
495 EMU_Power_TypeDef activePower;
498 } EMU_BUPDInit_TypeDef;
501 #define EMU_BUPDINIT_DEFAULT \
518 #if defined( _EMU_DCDCCTRL_MASK )
539 EMU_DcdcLnReverseCurrentControl_TypeDef
549 #if defined( _EFM_DEVICE )
550 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
551 #define EMU_DCDCINIT_DEFAULT \
553 emuPowerConfig_DcdcToDvdd, \
554 emuDcdcMode_LowNoise, \
560 emuDcdcAnaPeripheralPower_DCDC, \
561 emuDcdcLnHighEfficiency, \
562 emuDcdcLnCompCtrl_1u0F, \
565 #define EMU_DCDCINIT_DEFAULT \
567 emuPowerConfig_DcdcToDvdd, \
568 emuDcdcMode_LowPower, \
574 emuDcdcAnaPeripheralPower_DCDC, \
575 emuDcdcLnHighEfficiency, \
576 emuDcdcLnCompCtrl_4u7F, \
581 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
582 #define EMU_DCDCINIT_DEFAULT \
584 emuPowerConfig_DcdcToDvdd, \
585 emuDcdcMode_LowNoise, \
591 emuDcdcAnaPeripheralPower_DCDC, \
593 emuDcdcLnCompCtrl_1u0F, \
596 #define EMU_DCDCINIT_DEFAULT \
598 emuPowerConfig_DcdcToDvdd, \
599 emuDcdcMode_LowNoise, \
605 emuDcdcAnaPeripheralPower_DCDC, \
607 emuDcdcLnCompCtrl_4u7F, \
613 #if defined( EMU_STATUS_VMONRDY )
626 #define EMU_VMONINIT_DEFAULT \
628 emuVmonChannel_AVDD, \
648 #define EMU_VMONHYSTINIT_DEFAULT \
650 emuVmonChannel_AVDD, \
663 #if defined( _EMU_CMD_EM01VSCALE0_MASK )
667 #if defined( _EMU_EM4CONF_MASK ) || defined( _EMU_EM4CTRL_MASK )
674 #if defined( _EMU_EM4CTRL_MASK )
680 #if defined(_EMU_EM23PERNORETAINCTRL_MASK)
684 #if defined( _EMU_CMD_EM01VSCALE0_MASK )
688 #if defined( BU_PRESENT )
689 void EMU_BUPDInit(
const EMU_BUPDInit_TypeDef *bupdInit);
693 #if defined( _EMU_DCDCCTRL_MASK )
702 #if defined( EMU_STATUS_VMONRDY )
716 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
721 #if defined( _EMU_STATUS_VSCALE_MASK )
732 #if defined( _EMU_STATUS_VSCALE_MASK )
748 #if defined( _EMU_STATUS_VMONRDY_MASK )
763 #if defined( _EMU_IF_MASK )
847 return EMU->IF & ien;
866 #if defined( _EMU_EM4CONF_LOCKCONF_MASK )
873 __STATIC_INLINE
void EMU_EM4Lock(
bool enable)
879 #if defined( _EMU_STATUS_BURDY_MASK )
884 __STATIC_INLINE
void EMU_BUReady(
void)
886 while(!(
EMU->STATUS & EMU_STATUS_BURDY))
891 #if defined( _EMU_ROUTE_BUVINPEN_MASK )
898 __STATIC_INLINE
void EMU_BUPinEnable(
bool enable)
932 #if defined( _EMU_PWRLOCK_MASK )
974 #if defined( _EMU_EM4CTRL_EM4IORETMODE_MASK )
989 #if defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 )
990 void EMU_SetBiasMode(EMU_BiasMode_TypeDef mode);
EMU_PeripheralRetention_TypeDef
EMU_DcdcAnaPeripheralPower_TypeDef anaPeripheralPower
#define _EMU_CTRL_EM4HVSCALE_VSCALE2
bool EMU_DCDCInit(const EMU_DCDCInit_TypeDef *dcdcInit)
Configure DCDC regulator.
EMU_EM4PinRetention_TypeDef pinRetentionMode
#define _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_MASK
bool EMU_DCDCPowerOff(void)
Power off the DCDC regulator.
EMU_DcdcLnCompCtrl_TypeDef dcdcLnCompCtrl
__STATIC_INLINE EMU_VScaleEM01_TypeDef EMU_VScaleGet(void)
Get current voltage scaling level.
#define _EMU_EM23PERNORETAINCTRL_DAC0DIS_MASK
void EMU_EnterEM4(void)
Enter energy mode 4 (EM4).
#define _EMU_STATUS_VSCALE_MASK
RAM and peripheral bit-field set and clear API.
#define _EMU_EM23PERNORETAINCTRL_PCNT2DIS_MASK
__STATIC_INLINE void EMU_IntDisable(uint32_t flags)
Disable one or more EMU interrupts.
void EMU_MemPwrDown(uint32_t blocks)
Power down memory block.
EMU_DcdcLnCompCtrl_TypeDef
void EMU_PeripheralRetention(EMU_PeripheralRetention_TypeDef periMask, bool enable)
Set EM2 3 peripheral retention control.
void EMU_EM4Init(const EMU_EM4Init_TypeDef *em4Init)
Update EMU module with Energy Mode 4 configuration.
#define _EMU_STATUS_VSCALE_VSCALE2
void EMU_EnterEM3(bool restore)
Enter energy mode 3 (EM3).
void EMU_EnterEM2(bool restore)
Enter energy mode 2 (EM2).
#define _EMU_EM23PERNORETAINCTRL_ACMP0DIS_MASK
EMU_PowerConfig_TypeDef powerConfig
bool EMU_DCDCOutputVoltageSet(uint32_t mV, bool setLpVoltage, bool setLnVoltage)
Set DCDC output voltage.
#define EMU_PWRCTRL_ANASW_DVDD
EMU_VScaleEM23_TypeDef vScaleEM23Voltage
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK
void EMU_VmonEnable(EMU_VmonChannel_TypeDef channel, bool enable)
Enable or disable a VMON channel.
#define EMU_LOCK_LOCKKEY_LOCK
__STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a peripheral register.
#define _EMU_CTRL_EM2BLOCK_SHIFT
#define EMU_EM4CTRL_EM4IORETMODE_DISABLE
#define _EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK
uint16_t em01LoadCurrent_mA
__STATIC_INLINE void EMU_Unlock(void)
Unlock the EMU so that writing to locked registers again is possible.
void EMU_VScaleEM01ByClock(uint32_t clockFrequency, bool wait)
Voltage scale in EM0 and 1 by clock frequency.
__STATIC_INLINE void EMU_Lock(void)
Lock the EMU in order to protect its registers against unintended modification.
void EMU_Restore(void)
Restore CMU HF clock select state, oscillator enable and voltage scaling (if available) after EMU_Ent...
#define EMU_DCDCCTRL_DCDCMODE_BYPASS
void EMU_DCDCOptimizeSlice(uint32_t mALoadCurrent)
Optimize DCDC slice count based on the estimated average load current in EM0.
uint16_t em234LoadCurrent_uA
void EMU_EnterEM4H(void)
Enter energy mode 4 hibernate (EM4H).
#define EMU_EM4CTRL_EM4STATE_EM4S
#define _EMU_EM23PERNORETAINCTRL_CSENDIS_MASK
#define _EMU_EM23PERNORETAINCTRL_ADC0DIS_MASK
#define _EMU_STATUS_VSCALEBUSY_SHIFT
__STATIC_INLINE void EMU_PowerLock(void)
Lock the EMU regulator control registers in order to protect against unintended modification.
EMU_DcdcLnReverseCurrentControl_TypeDef reverseCurrentControl
void EMU_RamPowerDown(uint32_t start, uint32_t end)
Power down RAM memory blocks.
EMU_DcdcAnaPeripheralPower_TypeDef
#define _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_MASK
bool vScaleEM01LowPowerVoltageEnable
#define _EMU_EM23PERNORETAINCTRL_ACMP1DIS_MASK
__STATIC_INLINE void EMU_UnlatchPinRetention(void)
When EM4 pin retention is set to emuPinRetentionLatch, then pins are retained through EM4 entry and w...
#define _EMU_CTRL_EM4HVSCALE_VSCALE0
__STATIC_INLINE void EMU_EnterEM1(void)
Enter energy mode 1 (EM1).
void EMU_VScaleEM01(EMU_VScaleEM01_TypeDef voltage, bool wait)
Force voltage scaling in EM0 and 1 to a specific voltage level.
EMU_DcdcLnRcoBand_TypeDef
void EMU_DCDCLnRcoBandSet(EMU_DcdcLnRcoBand_TypeDef band)
Set DCDC Low-noise RCO band.
void EMU_DCDCConductionModeSet(EMU_DcdcConductionMode_TypeDef conductionMode, bool rcoDefaultSet)
Set DCDC LN regulator conduction mode.
#define _EMU_EM23PERNORETAINCTRL_I2C0DIS_MASK
EMU_VScaleEM4H_TypeDef vScaleEM4HVoltage
__STATIC_INLINE void EMU_EM2UnBlock(void)
Unblock entering EM2 or higher number energy modes.
void EMU_VmonHystInit(const EMU_VmonHystInit_TypeDef *vmonInit)
Initialize VMON channel with hysteresis (separate rise and fall triggers).
#define _EMU_EM23PERNORETAINCTRL_PCNT0DIS_MASK
#define _EMU_STATUS_VSCALE_VSCALE0
#define EMU_EM4CTRL_EM4STATE_EM4H
__STATIC_INLINE void EMU_IntEnable(uint32_t flags)
Enable one or more EMU interrupts.
void EMU_EM23Init(const EMU_EM23Init_TypeDef *em23Init)
Update EMU module with Energy Mode 2 and 3 configuration.
#define EMU_CMD_EM4UNLATCH
#define _EMU_CTRL_EM23VSCALE_VSCALE0
#define EMU_LOCK_LOCKKEY_UNLOCK
__STATIC_INLINE void EMU_PowerUnlock(void)
Unlock the EMU power control registers so that writing to locked registers again is possible...
#define EMU_DCDCCTRL_DCDCMODE_LOWPOWER
bool EMU_VmonChannelStatusGet(EMU_VmonChannel_TypeDef channel)
Get the status of a voltage monitor channel.
#define EMU_PWRLOCK_LOCKKEY_UNLOCK
void EMU_DCDCModeSet(EMU_DcdcMode_TypeDef dcdcMode)
Set DCDC regulator operating mode.
#define EMU_EM4CTRL_EM4IORETMODE_EM4EXIT
EMU_DcdcConductionMode_TypeDef
EMU_VmonChannel_TypeDef channel
EMU_DcdcMode_TypeDef dcdcMode
__STATIC_INLINE void EMU_IntClear(uint32_t flags)
Clear one or more pending EMU interrupts.
#define EMU_EM4CTRL_EM4IORETMODE_SWUNLATCH
#define _EMU_EM23PERNORETAINCTRL_LEUART0DIS_MASK
#define _EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK
__STATIC_INLINE void EMU_VScaleWait(void)
Wait for voltage scaling to complete.
#define EMU_DCDCCTRL_DCDCMODE_LOWNOISE
#define EMU_PWRCTRL_ANASW_AVDD
int16_t EMU_DcdcLnReverseCurrentControl_TypeDef
#define _EMU_STATUS_VMONRDY_SHIFT
__STATIC_INLINE uint32_t EMU_IntGet(void)
Get pending EMU interrupt flags.
EMU_VmonChannel_TypeDef channel
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
EMU_EM4State_TypeDef em4State
void EMU_EM01Init(const EMU_EM01Init_TypeDef *em01Init)
Update EMU module with Energy Mode 0 and 1 configuration.
EMU_EM4PinRetention_TypeDef
void EMU_VmonInit(const EMU_VmonInit_TypeDef *vmonInit)
Initialize VMON channel.
#define EMU_PWRLOCK_LOCKKEY_LOCK
__STATIC_INLINE bool EMU_VmonStatusGet(void)
Get the status of the voltage monitor (VMON).
void EMU_UpdateOscConfig(void)
Update EMU module with CMU oscillator selection/enable status.
#define _EMU_STATUS_VSCALE_SHIFT
__STATIC_INLINE uint32_t EMU_IntGetEnabled(void)
Get enabled and pending EMU interrupt flags. Useful for handling more interrupt sources in the same i...
#define _EMU_CTRL_EM23VSCALE_VSCALE2
__STATIC_INLINE void EMU_EM2Block(void)
Block entering EM2 or higher number energy modes.
__STATIC_INLINE void EMU_IntSet(uint32_t flags)
Set one or more pending EMU interrupts.
void EMU_EnterEM4S(void)
Enter energy mode 4 shutoff (EM4S).