efm32pg12/html/efm32pg12b__rtcc_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t   CTRL;

   __IOM uint32_t   PRECNT;

   __IOM uint32_t   CNT;

   __IM uint32_t    COMBCNT;

   __IOM uint32_t   TIME;

   __IOM uint32_t   DATE;

   __IM uint32_t    IF;

   __IOM uint32_t   IFS;

   __IOM uint32_t   IFC;

   __IOM uint32_t   IEN;

   __IM uint32_t    STATUS;

   __IOM uint32_t   CMD;

   __IM uint32_t    SYNCBUSY;

   __IOM uint32_t   POWERDOWN;

   __IOM uint32_t   LOCK;

   __IOM uint32_t   EM4WUEN;

   RTCC_CC_TypeDef  CC[3];

   uint32_t         RESERVED0[37];

   RTCC_RET_TypeDef RET[32];

 } RTCC_TypeDef;

 /**************************************************************************/

 /* Bit fields for RTCC CTRL */

 #define _RTCC_CTRL_RESETVALUE               0x00000000UL

 #define _RTCC_CTRL_MASK                     0x00039F35UL

 #define RTCC_CTRL_ENABLE                    (0x1UL << 0)

 #define _RTCC_CTRL_ENABLE_SHIFT             0

 #define _RTCC_CTRL_ENABLE_MASK              0x1UL

 #define _RTCC_CTRL_ENABLE_DEFAULT           0x00000000UL

 #define RTCC_CTRL_ENABLE_DEFAULT            (_RTCC_CTRL_ENABLE_DEFAULT << 0)

 #define RTCC_CTRL_DEBUGRUN                  (0x1UL << 2)

 #define _RTCC_CTRL_DEBUGRUN_SHIFT           2

 #define _RTCC_CTRL_DEBUGRUN_MASK            0x4UL

 #define _RTCC_CTRL_DEBUGRUN_DEFAULT         0x00000000UL

 #define RTCC_CTRL_DEBUGRUN_DEFAULT          (_RTCC_CTRL_DEBUGRUN_DEFAULT << 2)

 #define RTCC_CTRL_PRECCV0TOP                (0x1UL << 4)

 #define _RTCC_CTRL_PRECCV0TOP_SHIFT         4

 #define _RTCC_CTRL_PRECCV0TOP_MASK          0x10UL

 #define _RTCC_CTRL_PRECCV0TOP_DEFAULT       0x00000000UL

 #define RTCC_CTRL_PRECCV0TOP_DEFAULT        (_RTCC_CTRL_PRECCV0TOP_DEFAULT << 4)

 #define RTCC_CTRL_CCV1TOP                   (0x1UL << 5)

 #define _RTCC_CTRL_CCV1TOP_SHIFT            5

 #define _RTCC_CTRL_CCV1TOP_MASK             0x20UL

 #define _RTCC_CTRL_CCV1TOP_DEFAULT          0x00000000UL

 #define RTCC_CTRL_CCV1TOP_DEFAULT           (_RTCC_CTRL_CCV1TOP_DEFAULT << 5)

 #define _RTCC_CTRL_CNTPRESC_SHIFT           8

 #define _RTCC_CTRL_CNTPRESC_MASK            0xF00UL

 #define _RTCC_CTRL_CNTPRESC_DEFAULT         0x00000000UL

 #define _RTCC_CTRL_CNTPRESC_DIV1            0x00000000UL

 #define _RTCC_CTRL_CNTPRESC_DIV2            0x00000001UL

 #define _RTCC_CTRL_CNTPRESC_DIV4            0x00000002UL

 #define _RTCC_CTRL_CNTPRESC_DIV8            0x00000003UL

 #define _RTCC_CTRL_CNTPRESC_DIV16           0x00000004UL

 #define _RTCC_CTRL_CNTPRESC_DIV32           0x00000005UL

 #define _RTCC_CTRL_CNTPRESC_DIV64           0x00000006UL

 #define _RTCC_CTRL_CNTPRESC_DIV128          0x00000007UL

 #define _RTCC_CTRL_CNTPRESC_DIV256          0x00000008UL

 #define _RTCC_CTRL_CNTPRESC_DIV512          0x00000009UL

 #define _RTCC_CTRL_CNTPRESC_DIV1024         0x0000000AUL

 #define _RTCC_CTRL_CNTPRESC_DIV2048         0x0000000BUL

 #define _RTCC_CTRL_CNTPRESC_DIV4096         0x0000000CUL

 #define _RTCC_CTRL_CNTPRESC_DIV8192         0x0000000DUL

 #define _RTCC_CTRL_CNTPRESC_DIV16384        0x0000000EUL

 #define _RTCC_CTRL_CNTPRESC_DIV32768        0x0000000FUL

 #define RTCC_CTRL_CNTPRESC_DEFAULT          (_RTCC_CTRL_CNTPRESC_DEFAULT << 8)

 #define RTCC_CTRL_CNTPRESC_DIV1             (_RTCC_CTRL_CNTPRESC_DIV1 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV2             (_RTCC_CTRL_CNTPRESC_DIV2 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV4             (_RTCC_CTRL_CNTPRESC_DIV4 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV8             (_RTCC_CTRL_CNTPRESC_DIV8 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV16            (_RTCC_CTRL_CNTPRESC_DIV16 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV32            (_RTCC_CTRL_CNTPRESC_DIV32 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV64            (_RTCC_CTRL_CNTPRESC_DIV64 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV128           (_RTCC_CTRL_CNTPRESC_DIV128 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV256           (_RTCC_CTRL_CNTPRESC_DIV256 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV512           (_RTCC_CTRL_CNTPRESC_DIV512 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV1024          (_RTCC_CTRL_CNTPRESC_DIV1024 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV2048          (_RTCC_CTRL_CNTPRESC_DIV2048 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV4096          (_RTCC_CTRL_CNTPRESC_DIV4096 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV8192          (_RTCC_CTRL_CNTPRESC_DIV8192 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV16384         (_RTCC_CTRL_CNTPRESC_DIV16384 << 8)

 #define RTCC_CTRL_CNTPRESC_DIV32768         (_RTCC_CTRL_CNTPRESC_DIV32768 << 8)

 #define RTCC_CTRL_CNTTICK                   (0x1UL << 12)

 #define _RTCC_CTRL_CNTTICK_SHIFT            12

 #define _RTCC_CTRL_CNTTICK_MASK             0x1000UL

 #define _RTCC_CTRL_CNTTICK_DEFAULT          0x00000000UL

 #define _RTCC_CTRL_CNTTICK_PRESC            0x00000000UL

 #define _RTCC_CTRL_CNTTICK_CCV0MATCH        0x00000001UL

 #define RTCC_CTRL_CNTTICK_DEFAULT           (_RTCC_CTRL_CNTTICK_DEFAULT << 12)

 #define RTCC_CTRL_CNTTICK_PRESC             (_RTCC_CTRL_CNTTICK_PRESC << 12)

 #define RTCC_CTRL_CNTTICK_CCV0MATCH         (_RTCC_CTRL_CNTTICK_CCV0MATCH << 12)

 #define RTCC_CTRL_OSCFDETEN                 (0x1UL << 15)

 #define _RTCC_CTRL_OSCFDETEN_SHIFT          15

 #define _RTCC_CTRL_OSCFDETEN_MASK           0x8000UL

 #define _RTCC_CTRL_OSCFDETEN_DEFAULT        0x00000000UL

 #define RTCC_CTRL_OSCFDETEN_DEFAULT         (_RTCC_CTRL_OSCFDETEN_DEFAULT << 15)

 #define RTCC_CTRL_CNTMODE                   (0x1UL << 16)

 #define _RTCC_CTRL_CNTMODE_SHIFT            16

 #define _RTCC_CTRL_CNTMODE_MASK             0x10000UL

 #define _RTCC_CTRL_CNTMODE_DEFAULT          0x00000000UL

 #define _RTCC_CTRL_CNTMODE_NORMAL           0x00000000UL

 #define _RTCC_CTRL_CNTMODE_CALENDAR         0x00000001UL

 #define RTCC_CTRL_CNTMODE_DEFAULT           (_RTCC_CTRL_CNTMODE_DEFAULT << 16)

 #define RTCC_CTRL_CNTMODE_NORMAL            (_RTCC_CTRL_CNTMODE_NORMAL << 16)

 #define RTCC_CTRL_CNTMODE_CALENDAR          (_RTCC_CTRL_CNTMODE_CALENDAR << 16)

 #define RTCC_CTRL_LYEARCORRDIS              (0x1UL << 17)

 #define _RTCC_CTRL_LYEARCORRDIS_SHIFT       17

 #define _RTCC_CTRL_LYEARCORRDIS_MASK        0x20000UL

 #define _RTCC_CTRL_LYEARCORRDIS_DEFAULT     0x00000000UL

 #define RTCC_CTRL_LYEARCORRDIS_DEFAULT      (_RTCC_CTRL_LYEARCORRDIS_DEFAULT << 17)

 /* Bit fields for RTCC PRECNT */

 #define _RTCC_PRECNT_RESETVALUE             0x00000000UL

 #define _RTCC_PRECNT_MASK                   0x00007FFFUL

 #define _RTCC_PRECNT_PRECNT_SHIFT           0

 #define _RTCC_PRECNT_PRECNT_MASK            0x7FFFUL

 #define _RTCC_PRECNT_PRECNT_DEFAULT         0x00000000UL

 #define RTCC_PRECNT_PRECNT_DEFAULT          (_RTCC_PRECNT_PRECNT_DEFAULT << 0)

 /* Bit fields for RTCC CNT */

 #define _RTCC_CNT_RESETVALUE                0x00000000UL

 #define _RTCC_CNT_MASK                      0xFFFFFFFFUL

 #define _RTCC_CNT_CNT_SHIFT                 0

 #define _RTCC_CNT_CNT_MASK                  0xFFFFFFFFUL

 #define _RTCC_CNT_CNT_DEFAULT               0x00000000UL

 #define RTCC_CNT_CNT_DEFAULT                (_RTCC_CNT_CNT_DEFAULT << 0)

 /* Bit fields for RTCC COMBCNT */

 #define _RTCC_COMBCNT_RESETVALUE            0x00000000UL

 #define _RTCC_COMBCNT_MASK                  0xFFFFFFFFUL

 #define _RTCC_COMBCNT_PRECNT_SHIFT          0

 #define _RTCC_COMBCNT_PRECNT_MASK           0x7FFFUL

 #define _RTCC_COMBCNT_PRECNT_DEFAULT        0x00000000UL

 #define RTCC_COMBCNT_PRECNT_DEFAULT         (_RTCC_COMBCNT_PRECNT_DEFAULT << 0)

 #define _RTCC_COMBCNT_CNTLSB_SHIFT          15

 #define _RTCC_COMBCNT_CNTLSB_MASK           0xFFFF8000UL

 #define _RTCC_COMBCNT_CNTLSB_DEFAULT        0x00000000UL

 #define RTCC_COMBCNT_CNTLSB_DEFAULT         (_RTCC_COMBCNT_CNTLSB_DEFAULT << 15)

 /* Bit fields for RTCC TIME */

 #define _RTCC_TIME_RESETVALUE               0x00000000UL

 #define _RTCC_TIME_MASK                     0x003F7F7FUL

 #define _RTCC_TIME_SECU_SHIFT               0

 #define _RTCC_TIME_SECU_MASK                0xFUL

 #define _RTCC_TIME_SECU_DEFAULT             0x00000000UL

 #define RTCC_TIME_SECU_DEFAULT              (_RTCC_TIME_SECU_DEFAULT << 0)

 #define _RTCC_TIME_SECT_SHIFT               4

 #define _RTCC_TIME_SECT_MASK                0x70UL

 #define _RTCC_TIME_SECT_DEFAULT             0x00000000UL

 #define RTCC_TIME_SECT_DEFAULT              (_RTCC_TIME_SECT_DEFAULT << 4)

 #define _RTCC_TIME_MINU_SHIFT               8

 #define _RTCC_TIME_MINU_MASK                0xF00UL

 #define _RTCC_TIME_MINU_DEFAULT             0x00000000UL

 #define RTCC_TIME_MINU_DEFAULT              (_RTCC_TIME_MINU_DEFAULT << 8)

 #define _RTCC_TIME_MINT_SHIFT               12

 #define _RTCC_TIME_MINT_MASK                0x7000UL

 #define _RTCC_TIME_MINT_DEFAULT             0x00000000UL

 #define RTCC_TIME_MINT_DEFAULT              (_RTCC_TIME_MINT_DEFAULT << 12)

 #define _RTCC_TIME_HOURU_SHIFT              16

 #define _RTCC_TIME_HOURU_MASK               0xF0000UL

 #define _RTCC_TIME_HOURU_DEFAULT            0x00000000UL

 #define RTCC_TIME_HOURU_DEFAULT             (_RTCC_TIME_HOURU_DEFAULT << 16)

 #define _RTCC_TIME_HOURT_SHIFT              20

 #define _RTCC_TIME_HOURT_MASK               0x300000UL

 #define _RTCC_TIME_HOURT_DEFAULT            0x00000000UL

 #define RTCC_TIME_HOURT_DEFAULT             (_RTCC_TIME_HOURT_DEFAULT << 20)

 /* Bit fields for RTCC DATE */

 #define _RTCC_DATE_RESETVALUE               0x00000000UL

 #define _RTCC_DATE_MASK                     0x07FF1F3FUL

 #define _RTCC_DATE_DAYOMU_SHIFT             0

 #define _RTCC_DATE_DAYOMU_MASK              0xFUL

 #define _RTCC_DATE_DAYOMU_DEFAULT           0x00000000UL

 #define RTCC_DATE_DAYOMU_DEFAULT            (_RTCC_DATE_DAYOMU_DEFAULT << 0)

 #define _RTCC_DATE_DAYOMT_SHIFT             4

 #define _RTCC_DATE_DAYOMT_MASK              0x30UL

 #define _RTCC_DATE_DAYOMT_DEFAULT           0x00000000UL

 #define RTCC_DATE_DAYOMT_DEFAULT            (_RTCC_DATE_DAYOMT_DEFAULT << 4)

 #define _RTCC_DATE_MONTHU_SHIFT             8

 #define _RTCC_DATE_MONTHU_MASK              0xF00UL

 #define _RTCC_DATE_MONTHU_DEFAULT           0x00000000UL

 #define RTCC_DATE_MONTHU_DEFAULT            (_RTCC_DATE_MONTHU_DEFAULT << 8)

 #define RTCC_DATE_MONTHT                    (0x1UL << 12)

 #define _RTCC_DATE_MONTHT_SHIFT             12

 #define _RTCC_DATE_MONTHT_MASK              0x1000UL

 #define _RTCC_DATE_MONTHT_DEFAULT           0x00000000UL

 #define RTCC_DATE_MONTHT_DEFAULT            (_RTCC_DATE_MONTHT_DEFAULT << 12)

 #define _RTCC_DATE_YEARU_SHIFT              16

 #define _RTCC_DATE_YEARU_MASK               0xF0000UL

 #define _RTCC_DATE_YEARU_DEFAULT            0x00000000UL

 #define RTCC_DATE_YEARU_DEFAULT             (_RTCC_DATE_YEARU_DEFAULT << 16)

 #define _RTCC_DATE_YEART_SHIFT              20

 #define _RTCC_DATE_YEART_MASK               0xF00000UL

 #define _RTCC_DATE_YEART_DEFAULT            0x00000000UL

 #define RTCC_DATE_YEART_DEFAULT             (_RTCC_DATE_YEART_DEFAULT << 20)

 #define _RTCC_DATE_DAYOW_SHIFT              24

 #define _RTCC_DATE_DAYOW_MASK               0x7000000UL

 #define _RTCC_DATE_DAYOW_DEFAULT            0x00000000UL

 #define RTCC_DATE_DAYOW_DEFAULT             (_RTCC_DATE_DAYOW_DEFAULT << 24)

 /* Bit fields for RTCC IF */

 #define _RTCC_IF_RESETVALUE                 0x00000000UL

 #define _RTCC_IF_MASK                       0x000007FFUL

 #define RTCC_IF_OF                          (0x1UL << 0)

 #define _RTCC_IF_OF_SHIFT                   0

 #define _RTCC_IF_OF_MASK                    0x1UL

 #define _RTCC_IF_OF_DEFAULT                 0x00000000UL

 #define RTCC_IF_OF_DEFAULT                  (_RTCC_IF_OF_DEFAULT << 0)

 #define RTCC_IF_CC0                         (0x1UL << 1)

 #define _RTCC_IF_CC0_SHIFT                  1

 #define _RTCC_IF_CC0_MASK                   0x2UL

 #define _RTCC_IF_CC0_DEFAULT                0x00000000UL

 #define RTCC_IF_CC0_DEFAULT                 (_RTCC_IF_CC0_DEFAULT << 1)

 #define RTCC_IF_CC1                         (0x1UL << 2)

 #define _RTCC_IF_CC1_SHIFT                  2

 #define _RTCC_IF_CC1_MASK                   0x4UL

 #define _RTCC_IF_CC1_DEFAULT                0x00000000UL

 #define RTCC_IF_CC1_DEFAULT                 (_RTCC_IF_CC1_DEFAULT << 2)

 #define RTCC_IF_CC2                         (0x1UL << 3)

 #define _RTCC_IF_CC2_SHIFT                  3

 #define _RTCC_IF_CC2_MASK                   0x8UL

 #define _RTCC_IF_CC2_DEFAULT                0x00000000UL

 #define RTCC_IF_CC2_DEFAULT                 (_RTCC_IF_CC2_DEFAULT << 3)

 #define RTCC_IF_OSCFAIL                     (0x1UL << 4)

 #define _RTCC_IF_OSCFAIL_SHIFT              4

 #define _RTCC_IF_OSCFAIL_MASK               0x10UL

 #define _RTCC_IF_OSCFAIL_DEFAULT            0x00000000UL

 #define RTCC_IF_OSCFAIL_DEFAULT             (_RTCC_IF_OSCFAIL_DEFAULT << 4)

 #define RTCC_IF_CNTTICK                     (0x1UL << 5)

 #define _RTCC_IF_CNTTICK_SHIFT              5

 #define _RTCC_IF_CNTTICK_MASK               0x20UL

 #define _RTCC_IF_CNTTICK_DEFAULT            0x00000000UL

 #define RTCC_IF_CNTTICK_DEFAULT             (_RTCC_IF_CNTTICK_DEFAULT << 5)

 #define RTCC_IF_MINTICK                     (0x1UL << 6)

 #define _RTCC_IF_MINTICK_SHIFT              6

 #define _RTCC_IF_MINTICK_MASK               0x40UL

 #define _RTCC_IF_MINTICK_DEFAULT            0x00000000UL

 #define RTCC_IF_MINTICK_DEFAULT             (_RTCC_IF_MINTICK_DEFAULT << 6)

 #define RTCC_IF_HOURTICK                    (0x1UL << 7)

 #define _RTCC_IF_HOURTICK_SHIFT             7

 #define _RTCC_IF_HOURTICK_MASK              0x80UL

 #define _RTCC_IF_HOURTICK_DEFAULT           0x00000000UL

 #define RTCC_IF_HOURTICK_DEFAULT            (_RTCC_IF_HOURTICK_DEFAULT << 7)

 #define RTCC_IF_DAYTICK                     (0x1UL << 8)

 #define _RTCC_IF_DAYTICK_SHIFT              8

 #define _RTCC_IF_DAYTICK_MASK               0x100UL

 #define _RTCC_IF_DAYTICK_DEFAULT            0x00000000UL

 #define RTCC_IF_DAYTICK_DEFAULT             (_RTCC_IF_DAYTICK_DEFAULT << 8)

 #define RTCC_IF_DAYOWOF                     (0x1UL << 9)

 #define _RTCC_IF_DAYOWOF_SHIFT              9

 #define _RTCC_IF_DAYOWOF_MASK               0x200UL

 #define _RTCC_IF_DAYOWOF_DEFAULT            0x00000000UL

 #define RTCC_IF_DAYOWOF_DEFAULT             (_RTCC_IF_DAYOWOF_DEFAULT << 9)

 #define RTCC_IF_MONTHTICK                   (0x1UL << 10)

 #define _RTCC_IF_MONTHTICK_SHIFT            10

 #define _RTCC_IF_MONTHTICK_MASK             0x400UL

 #define _RTCC_IF_MONTHTICK_DEFAULT          0x00000000UL

 #define RTCC_IF_MONTHTICK_DEFAULT           (_RTCC_IF_MONTHTICK_DEFAULT << 10)

 /* Bit fields for RTCC IFS */

 #define _RTCC_IFS_RESETVALUE                0x00000000UL

 #define _RTCC_IFS_MASK                      0x000007FFUL

 #define RTCC_IFS_OF                         (0x1UL << 0)

 #define _RTCC_IFS_OF_SHIFT                  0

 #define _RTCC_IFS_OF_MASK                   0x1UL

 #define _RTCC_IFS_OF_DEFAULT                0x00000000UL

 #define RTCC_IFS_OF_DEFAULT                 (_RTCC_IFS_OF_DEFAULT << 0)

 #define RTCC_IFS_CC0                        (0x1UL << 1)

 #define _RTCC_IFS_CC0_SHIFT                 1

 #define _RTCC_IFS_CC0_MASK                  0x2UL

 #define _RTCC_IFS_CC0_DEFAULT               0x00000000UL

 #define RTCC_IFS_CC0_DEFAULT                (_RTCC_IFS_CC0_DEFAULT << 1)

 #define RTCC_IFS_CC1                        (0x1UL << 2)

 #define _RTCC_IFS_CC1_SHIFT                 2

 #define _RTCC_IFS_CC1_MASK                  0x4UL

 #define _RTCC_IFS_CC1_DEFAULT               0x00000000UL

 #define RTCC_IFS_CC1_DEFAULT                (_RTCC_IFS_CC1_DEFAULT << 2)

 #define RTCC_IFS_CC2                        (0x1UL << 3)

 #define _RTCC_IFS_CC2_SHIFT                 3

 #define _RTCC_IFS_CC2_MASK                  0x8UL

 #define _RTCC_IFS_CC2_DEFAULT               0x00000000UL

 #define RTCC_IFS_CC2_DEFAULT                (_RTCC_IFS_CC2_DEFAULT << 3)

 #define RTCC_IFS_OSCFAIL                    (0x1UL << 4)

 #define _RTCC_IFS_OSCFAIL_SHIFT             4

 #define _RTCC_IFS_OSCFAIL_MASK              0x10UL

 #define _RTCC_IFS_OSCFAIL_DEFAULT           0x00000000UL

 #define RTCC_IFS_OSCFAIL_DEFAULT            (_RTCC_IFS_OSCFAIL_DEFAULT << 4)

 #define RTCC_IFS_CNTTICK                    (0x1UL << 5)

 #define _RTCC_IFS_CNTTICK_SHIFT             5

 #define _RTCC_IFS_CNTTICK_MASK              0x20UL

 #define _RTCC_IFS_CNTTICK_DEFAULT           0x00000000UL

 #define RTCC_IFS_CNTTICK_DEFAULT            (_RTCC_IFS_CNTTICK_DEFAULT << 5)

 #define RTCC_IFS_MINTICK                    (0x1UL << 6)

 #define _RTCC_IFS_MINTICK_SHIFT             6

 #define _RTCC_IFS_MINTICK_MASK              0x40UL

 #define _RTCC_IFS_MINTICK_DEFAULT           0x00000000UL

 #define RTCC_IFS_MINTICK_DEFAULT            (_RTCC_IFS_MINTICK_DEFAULT << 6)

 #define RTCC_IFS_HOURTICK                   (0x1UL << 7)

 #define _RTCC_IFS_HOURTICK_SHIFT            7

 #define _RTCC_IFS_HOURTICK_MASK             0x80UL

 #define _RTCC_IFS_HOURTICK_DEFAULT          0x00000000UL

 #define RTCC_IFS_HOURTICK_DEFAULT           (_RTCC_IFS_HOURTICK_DEFAULT << 7)

 #define RTCC_IFS_DAYTICK                    (0x1UL << 8)

 #define _RTCC_IFS_DAYTICK_SHIFT             8

 #define _RTCC_IFS_DAYTICK_MASK              0x100UL

 #define _RTCC_IFS_DAYTICK_DEFAULT           0x00000000UL

 #define RTCC_IFS_DAYTICK_DEFAULT            (_RTCC_IFS_DAYTICK_DEFAULT << 8)

 #define RTCC_IFS_DAYOWOF                    (0x1UL << 9)

 #define _RTCC_IFS_DAYOWOF_SHIFT             9

 #define _RTCC_IFS_DAYOWOF_MASK              0x200UL

 #define _RTCC_IFS_DAYOWOF_DEFAULT           0x00000000UL

 #define RTCC_IFS_DAYOWOF_DEFAULT            (_RTCC_IFS_DAYOWOF_DEFAULT << 9)

 #define RTCC_IFS_MONTHTICK                  (0x1UL << 10)

 #define _RTCC_IFS_MONTHTICK_SHIFT           10

 #define _RTCC_IFS_MONTHTICK_MASK            0x400UL

 #define _RTCC_IFS_MONTHTICK_DEFAULT         0x00000000UL

 #define RTCC_IFS_MONTHTICK_DEFAULT          (_RTCC_IFS_MONTHTICK_DEFAULT << 10)

 /* Bit fields for RTCC IFC */

 #define _RTCC_IFC_RESETVALUE                0x00000000UL

 #define _RTCC_IFC_MASK                      0x000007FFUL

 #define RTCC_IFC_OF                         (0x1UL << 0)

 #define _RTCC_IFC_OF_SHIFT                  0

 #define _RTCC_IFC_OF_MASK                   0x1UL

 #define _RTCC_IFC_OF_DEFAULT                0x00000000UL

 #define RTCC_IFC_OF_DEFAULT                 (_RTCC_IFC_OF_DEFAULT << 0)

 #define RTCC_IFC_CC0                        (0x1UL << 1)

 #define _RTCC_IFC_CC0_SHIFT                 1

 #define _RTCC_IFC_CC0_MASK                  0x2UL

 #define _RTCC_IFC_CC0_DEFAULT               0x00000000UL

 #define RTCC_IFC_CC0_DEFAULT                (_RTCC_IFC_CC0_DEFAULT << 1)

 #define RTCC_IFC_CC1                        (0x1UL << 2)

 #define _RTCC_IFC_CC1_SHIFT                 2

 #define _RTCC_IFC_CC1_MASK                  0x4UL

 #define _RTCC_IFC_CC1_DEFAULT               0x00000000UL

 #define RTCC_IFC_CC1_DEFAULT                (_RTCC_IFC_CC1_DEFAULT << 2)

 #define RTCC_IFC_CC2                        (0x1UL << 3)

 #define _RTCC_IFC_CC2_SHIFT                 3

 #define _RTCC_IFC_CC2_MASK                  0x8UL

 #define _RTCC_IFC_CC2_DEFAULT               0x00000000UL

 #define RTCC_IFC_CC2_DEFAULT                (_RTCC_IFC_CC2_DEFAULT << 3)

 #define RTCC_IFC_OSCFAIL                    (0x1UL << 4)

 #define _RTCC_IFC_OSCFAIL_SHIFT             4

 #define _RTCC_IFC_OSCFAIL_MASK              0x10UL

 #define _RTCC_IFC_OSCFAIL_DEFAULT           0x00000000UL

 #define RTCC_IFC_OSCFAIL_DEFAULT            (_RTCC_IFC_OSCFAIL_DEFAULT << 4)

 #define RTCC_IFC_CNTTICK                    (0x1UL << 5)

 #define _RTCC_IFC_CNTTICK_SHIFT             5

 #define _RTCC_IFC_CNTTICK_MASK              0x20UL

 #define _RTCC_IFC_CNTTICK_DEFAULT           0x00000000UL

 #define RTCC_IFC_CNTTICK_DEFAULT            (_RTCC_IFC_CNTTICK_DEFAULT << 5)

 #define RTCC_IFC_MINTICK                    (0x1UL << 6)

 #define _RTCC_IFC_MINTICK_SHIFT             6

 #define _RTCC_IFC_MINTICK_MASK              0x40UL

 #define _RTCC_IFC_MINTICK_DEFAULT           0x00000000UL

 #define RTCC_IFC_MINTICK_DEFAULT            (_RTCC_IFC_MINTICK_DEFAULT << 6)

 #define RTCC_IFC_HOURTICK                   (0x1UL << 7)

 #define _RTCC_IFC_HOURTICK_SHIFT            7

 #define _RTCC_IFC_HOURTICK_MASK             0x80UL

 #define _RTCC_IFC_HOURTICK_DEFAULT          0x00000000UL

 #define RTCC_IFC_HOURTICK_DEFAULT           (_RTCC_IFC_HOURTICK_DEFAULT << 7)

 #define RTCC_IFC_DAYTICK                    (0x1UL << 8)

 #define _RTCC_IFC_DAYTICK_SHIFT             8

 #define _RTCC_IFC_DAYTICK_MASK              0x100UL

 #define _RTCC_IFC_DAYTICK_DEFAULT           0x00000000UL

 #define RTCC_IFC_DAYTICK_DEFAULT            (_RTCC_IFC_DAYTICK_DEFAULT << 8)

 #define RTCC_IFC_DAYOWOF                    (0x1UL << 9)

 #define _RTCC_IFC_DAYOWOF_SHIFT             9

 #define _RTCC_IFC_DAYOWOF_MASK              0x200UL

 #define _RTCC_IFC_DAYOWOF_DEFAULT           0x00000000UL

 #define RTCC_IFC_DAYOWOF_DEFAULT            (_RTCC_IFC_DAYOWOF_DEFAULT << 9)

 #define RTCC_IFC_MONTHTICK                  (0x1UL << 10)

 #define _RTCC_IFC_MONTHTICK_SHIFT           10

 #define _RTCC_IFC_MONTHTICK_MASK            0x400UL

 #define _RTCC_IFC_MONTHTICK_DEFAULT         0x00000000UL

 #define RTCC_IFC_MONTHTICK_DEFAULT          (_RTCC_IFC_MONTHTICK_DEFAULT << 10)

 /* Bit fields for RTCC IEN */

 #define _RTCC_IEN_RESETVALUE                0x00000000UL

 #define _RTCC_IEN_MASK                      0x000007FFUL

 #define RTCC_IEN_OF                         (0x1UL << 0)

 #define _RTCC_IEN_OF_SHIFT                  0

 #define _RTCC_IEN_OF_MASK                   0x1UL

 #define _RTCC_IEN_OF_DEFAULT                0x00000000UL

 #define RTCC_IEN_OF_DEFAULT                 (_RTCC_IEN_OF_DEFAULT << 0)

 #define RTCC_IEN_CC0                        (0x1UL << 1)

 #define _RTCC_IEN_CC0_SHIFT                 1

 #define _RTCC_IEN_CC0_MASK                  0x2UL

 #define _RTCC_IEN_CC0_DEFAULT               0x00000000UL

 #define RTCC_IEN_CC0_DEFAULT                (_RTCC_IEN_CC0_DEFAULT << 1)

 #define RTCC_IEN_CC1                        (0x1UL << 2)

 #define _RTCC_IEN_CC1_SHIFT                 2

 #define _RTCC_IEN_CC1_MASK                  0x4UL

 #define _RTCC_IEN_CC1_DEFAULT               0x00000000UL

 #define RTCC_IEN_CC1_DEFAULT                (_RTCC_IEN_CC1_DEFAULT << 2)

 #define RTCC_IEN_CC2                        (0x1UL << 3)

 #define _RTCC_IEN_CC2_SHIFT                 3

 #define _RTCC_IEN_CC2_MASK                  0x8UL

 #define _RTCC_IEN_CC2_DEFAULT               0x00000000UL

 #define RTCC_IEN_CC2_DEFAULT                (_RTCC_IEN_CC2_DEFAULT << 3)

 #define RTCC_IEN_OSCFAIL                    (0x1UL << 4)

 #define _RTCC_IEN_OSCFAIL_SHIFT             4

 #define _RTCC_IEN_OSCFAIL_MASK              0x10UL

 #define _RTCC_IEN_OSCFAIL_DEFAULT           0x00000000UL

 #define RTCC_IEN_OSCFAIL_DEFAULT            (_RTCC_IEN_OSCFAIL_DEFAULT << 4)

 #define RTCC_IEN_CNTTICK                    (0x1UL << 5)

 #define _RTCC_IEN_CNTTICK_SHIFT             5

 #define _RTCC_IEN_CNTTICK_MASK              0x20UL

 #define _RTCC_IEN_CNTTICK_DEFAULT           0x00000000UL

 #define RTCC_IEN_CNTTICK_DEFAULT            (_RTCC_IEN_CNTTICK_DEFAULT << 5)

 #define RTCC_IEN_MINTICK                    (0x1UL << 6)

 #define _RTCC_IEN_MINTICK_SHIFT             6

 #define _RTCC_IEN_MINTICK_MASK              0x40UL

 #define _RTCC_IEN_MINTICK_DEFAULT           0x00000000UL

 #define RTCC_IEN_MINTICK_DEFAULT            (_RTCC_IEN_MINTICK_DEFAULT << 6)

 #define RTCC_IEN_HOURTICK                   (0x1UL << 7)

 #define _RTCC_IEN_HOURTICK_SHIFT            7

 #define _RTCC_IEN_HOURTICK_MASK             0x80UL

 #define _RTCC_IEN_HOURTICK_DEFAULT          0x00000000UL

 #define RTCC_IEN_HOURTICK_DEFAULT           (_RTCC_IEN_HOURTICK_DEFAULT << 7)

 #define RTCC_IEN_DAYTICK                    (0x1UL << 8)

 #define _RTCC_IEN_DAYTICK_SHIFT             8

 #define _RTCC_IEN_DAYTICK_MASK              0x100UL

 #define _RTCC_IEN_DAYTICK_DEFAULT           0x00000000UL

 #define RTCC_IEN_DAYTICK_DEFAULT            (_RTCC_IEN_DAYTICK_DEFAULT << 8)

 #define RTCC_IEN_DAYOWOF                    (0x1UL << 9)

 #define _RTCC_IEN_DAYOWOF_SHIFT             9

 #define _RTCC_IEN_DAYOWOF_MASK              0x200UL

 #define _RTCC_IEN_DAYOWOF_DEFAULT           0x00000000UL

 #define RTCC_IEN_DAYOWOF_DEFAULT            (_RTCC_IEN_DAYOWOF_DEFAULT << 9)

 #define RTCC_IEN_MONTHTICK                  (0x1UL << 10)

 #define _RTCC_IEN_MONTHTICK_SHIFT           10

 #define _RTCC_IEN_MONTHTICK_MASK            0x400UL

 #define _RTCC_IEN_MONTHTICK_DEFAULT         0x00000000UL

 #define RTCC_IEN_MONTHTICK_DEFAULT          (_RTCC_IEN_MONTHTICK_DEFAULT << 10)

 /* Bit fields for RTCC STATUS */

 #define _RTCC_STATUS_RESETVALUE             0x00000000UL

 #define _RTCC_STATUS_MASK                   0x00000000UL

 /* Bit fields for RTCC CMD */

 #define _RTCC_CMD_RESETVALUE                0x00000000UL

 #define _RTCC_CMD_MASK                      0x00000001UL

 #define RTCC_CMD_CLRSTATUS                  (0x1UL << 0)

 #define _RTCC_CMD_CLRSTATUS_SHIFT           0

 #define _RTCC_CMD_CLRSTATUS_MASK            0x1UL

 #define _RTCC_CMD_CLRSTATUS_DEFAULT         0x00000000UL

 #define RTCC_CMD_CLRSTATUS_DEFAULT          (_RTCC_CMD_CLRSTATUS_DEFAULT << 0)

 /* Bit fields for RTCC SYNCBUSY */

 #define _RTCC_SYNCBUSY_RESETVALUE           0x00000000UL

 #define _RTCC_SYNCBUSY_MASK                 0x00000020UL

 #define RTCC_SYNCBUSY_CMD                   (0x1UL << 5)

 #define _RTCC_SYNCBUSY_CMD_SHIFT            5

 #define _RTCC_SYNCBUSY_CMD_MASK             0x20UL

 #define _RTCC_SYNCBUSY_CMD_DEFAULT          0x00000000UL

 #define RTCC_SYNCBUSY_CMD_DEFAULT           (_RTCC_SYNCBUSY_CMD_DEFAULT << 5)

 /* Bit fields for RTCC POWERDOWN */

 #define _RTCC_POWERDOWN_RESETVALUE          0x00000000UL

 #define _RTCC_POWERDOWN_MASK                0x00000001UL

 #define RTCC_POWERDOWN_RAM                  (0x1UL << 0)

 #define _RTCC_POWERDOWN_RAM_SHIFT           0

 #define _RTCC_POWERDOWN_RAM_MASK            0x1UL

 #define _RTCC_POWERDOWN_RAM_DEFAULT         0x00000000UL

 #define RTCC_POWERDOWN_RAM_DEFAULT          (_RTCC_POWERDOWN_RAM_DEFAULT << 0)

 /* Bit fields for RTCC LOCK */

 #define _RTCC_LOCK_RESETVALUE               0x00000000UL

 #define _RTCC_LOCK_MASK                     0x0000FFFFUL

 #define _RTCC_LOCK_LOCKKEY_SHIFT            0

 #define _RTCC_LOCK_LOCKKEY_MASK             0xFFFFUL

 #define _RTCC_LOCK_LOCKKEY_DEFAULT          0x00000000UL

 #define _RTCC_LOCK_LOCKKEY_LOCK             0x00000000UL

 #define _RTCC_LOCK_LOCKKEY_UNLOCKED         0x00000000UL

 #define _RTCC_LOCK_LOCKKEY_LOCKED           0x00000001UL

 #define _RTCC_LOCK_LOCKKEY_UNLOCK           0x0000AEE8UL

 #define RTCC_LOCK_LOCKKEY_DEFAULT           (_RTCC_LOCK_LOCKKEY_DEFAULT << 0)

 #define RTCC_LOCK_LOCKKEY_LOCK              (_RTCC_LOCK_LOCKKEY_LOCK << 0)

 #define RTCC_LOCK_LOCKKEY_UNLOCKED          (_RTCC_LOCK_LOCKKEY_UNLOCKED << 0)

 #define RTCC_LOCK_LOCKKEY_LOCKED            (_RTCC_LOCK_LOCKKEY_LOCKED << 0)

 #define RTCC_LOCK_LOCKKEY_UNLOCK            (_RTCC_LOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for RTCC EM4WUEN */

 #define _RTCC_EM4WUEN_RESETVALUE            0x00000000UL

 #define _RTCC_EM4WUEN_MASK                  0x00000001UL

 #define RTCC_EM4WUEN_EM4WU                  (0x1UL << 0)

 #define _RTCC_EM4WUEN_EM4WU_SHIFT           0

 #define _RTCC_EM4WUEN_EM4WU_MASK            0x1UL

 #define _RTCC_EM4WUEN_EM4WU_DEFAULT         0x00000000UL

 #define RTCC_EM4WUEN_EM4WU_DEFAULT          (_RTCC_EM4WUEN_EM4WU_DEFAULT << 0)

 /* Bit fields for RTCC CC_CTRL */

 #define _RTCC_CC_CTRL_RESETVALUE            0x00000000UL

 #define _RTCC_CC_CTRL_MASK                  0x0003FBFFUL

 #define _RTCC_CC_CTRL_MODE_SHIFT            0

 #define _RTCC_CC_CTRL_MODE_MASK             0x3UL

 #define _RTCC_CC_CTRL_MODE_DEFAULT          0x00000000UL

 #define _RTCC_CC_CTRL_MODE_OFF              0x00000000UL

 #define _RTCC_CC_CTRL_MODE_INPUTCAPTURE     0x00000001UL

 #define _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE    0x00000002UL

 #define RTCC_CC_CTRL_MODE_DEFAULT           (_RTCC_CC_CTRL_MODE_DEFAULT << 0)

 #define RTCC_CC_CTRL_MODE_OFF               (_RTCC_CC_CTRL_MODE_OFF << 0)

 #define RTCC_CC_CTRL_MODE_INPUTCAPTURE      (_RTCC_CC_CTRL_MODE_INPUTCAPTURE << 0)

 #define RTCC_CC_CTRL_MODE_OUTPUTCOMPARE     (_RTCC_CC_CTRL_MODE_OUTPUTCOMPARE << 0)

 #define _RTCC_CC_CTRL_CMOA_SHIFT            2

 #define _RTCC_CC_CTRL_CMOA_MASK             0xCUL

 #define _RTCC_CC_CTRL_CMOA_DEFAULT          0x00000000UL

 #define _RTCC_CC_CTRL_CMOA_PULSE            0x00000000UL

 #define _RTCC_CC_CTRL_CMOA_TOGGLE           0x00000001UL

 #define _RTCC_CC_CTRL_CMOA_CLEAR            0x00000002UL

 #define _RTCC_CC_CTRL_CMOA_SET              0x00000003UL

 #define RTCC_CC_CTRL_CMOA_DEFAULT           (_RTCC_CC_CTRL_CMOA_DEFAULT << 2)

 #define RTCC_CC_CTRL_CMOA_PULSE             (_RTCC_CC_CTRL_CMOA_PULSE << 2)

 #define RTCC_CC_CTRL_CMOA_TOGGLE            (_RTCC_CC_CTRL_CMOA_TOGGLE << 2)

 #define RTCC_CC_CTRL_CMOA_CLEAR             (_RTCC_CC_CTRL_CMOA_CLEAR << 2)

 #define RTCC_CC_CTRL_CMOA_SET               (_RTCC_CC_CTRL_CMOA_SET << 2)

 #define _RTCC_CC_CTRL_ICEDGE_SHIFT          4

 #define _RTCC_CC_CTRL_ICEDGE_MASK           0x30UL

 #define _RTCC_CC_CTRL_ICEDGE_DEFAULT        0x00000000UL

 #define _RTCC_CC_CTRL_ICEDGE_RISING         0x00000000UL

 #define _RTCC_CC_CTRL_ICEDGE_FALLING        0x00000001UL

 #define _RTCC_CC_CTRL_ICEDGE_BOTH           0x00000002UL

 #define _RTCC_CC_CTRL_ICEDGE_NONE           0x00000003UL

 #define RTCC_CC_CTRL_ICEDGE_DEFAULT         (_RTCC_CC_CTRL_ICEDGE_DEFAULT << 4)

 #define RTCC_CC_CTRL_ICEDGE_RISING          (_RTCC_CC_CTRL_ICEDGE_RISING << 4)

 #define RTCC_CC_CTRL_ICEDGE_FALLING         (_RTCC_CC_CTRL_ICEDGE_FALLING << 4)

 #define RTCC_CC_CTRL_ICEDGE_BOTH            (_RTCC_CC_CTRL_ICEDGE_BOTH << 4)

 #define RTCC_CC_CTRL_ICEDGE_NONE            (_RTCC_CC_CTRL_ICEDGE_NONE << 4)

 #define _RTCC_CC_CTRL_PRSSEL_SHIFT          6

 #define _RTCC_CC_CTRL_PRSSEL_MASK           0x3C0UL

 #define _RTCC_CC_CTRL_PRSSEL_DEFAULT        0x00000000UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH0         0x00000000UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH1         0x00000001UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH2         0x00000002UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH3         0x00000003UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH4         0x00000004UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH5         0x00000005UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH6         0x00000006UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH7         0x00000007UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH8         0x00000008UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH9         0x00000009UL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH10        0x0000000AUL

 #define _RTCC_CC_CTRL_PRSSEL_PRSCH11        0x0000000BUL

 #define RTCC_CC_CTRL_PRSSEL_DEFAULT         (_RTCC_CC_CTRL_PRSSEL_DEFAULT << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH0          (_RTCC_CC_CTRL_PRSSEL_PRSCH0 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH1          (_RTCC_CC_CTRL_PRSSEL_PRSCH1 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH2          (_RTCC_CC_CTRL_PRSSEL_PRSCH2 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH3          (_RTCC_CC_CTRL_PRSSEL_PRSCH3 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH4          (_RTCC_CC_CTRL_PRSSEL_PRSCH4 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH5          (_RTCC_CC_CTRL_PRSSEL_PRSCH5 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH6          (_RTCC_CC_CTRL_PRSSEL_PRSCH6 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH7          (_RTCC_CC_CTRL_PRSSEL_PRSCH7 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH8          (_RTCC_CC_CTRL_PRSSEL_PRSCH8 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH9          (_RTCC_CC_CTRL_PRSSEL_PRSCH9 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH10         (_RTCC_CC_CTRL_PRSSEL_PRSCH10 << 6)

 #define RTCC_CC_CTRL_PRSSEL_PRSCH11         (_RTCC_CC_CTRL_PRSSEL_PRSCH11 << 6)

 #define RTCC_CC_CTRL_COMPBASE               (0x1UL << 11)

 #define _RTCC_CC_CTRL_COMPBASE_SHIFT        11

 #define _RTCC_CC_CTRL_COMPBASE_MASK         0x800UL

 #define _RTCC_CC_CTRL_COMPBASE_DEFAULT      0x00000000UL

 #define _RTCC_CC_CTRL_COMPBASE_CNT          0x00000000UL

 #define _RTCC_CC_CTRL_COMPBASE_PRECNT       0x00000001UL

 #define RTCC_CC_CTRL_COMPBASE_DEFAULT       (_RTCC_CC_CTRL_COMPBASE_DEFAULT << 11)

 #define RTCC_CC_CTRL_COMPBASE_CNT           (_RTCC_CC_CTRL_COMPBASE_CNT << 11)

 #define RTCC_CC_CTRL_COMPBASE_PRECNT        (_RTCC_CC_CTRL_COMPBASE_PRECNT << 11)

 #define _RTCC_CC_CTRL_COMPMASK_SHIFT        12

 #define _RTCC_CC_CTRL_COMPMASK_MASK         0x1F000UL

 #define _RTCC_CC_CTRL_COMPMASK_DEFAULT      0x00000000UL

 #define RTCC_CC_CTRL_COMPMASK_DEFAULT       (_RTCC_CC_CTRL_COMPMASK_DEFAULT << 12)

 #define RTCC_CC_CTRL_DAYCC                  (0x1UL << 17)

 #define _RTCC_CC_CTRL_DAYCC_SHIFT           17

 #define _RTCC_CC_CTRL_DAYCC_MASK            0x20000UL

 #define _RTCC_CC_CTRL_DAYCC_DEFAULT         0x00000000UL

 #define _RTCC_CC_CTRL_DAYCC_MONTH           0x00000000UL

 #define _RTCC_CC_CTRL_DAYCC_WEEK            0x00000001UL

 #define RTCC_CC_CTRL_DAYCC_DEFAULT          (_RTCC_CC_CTRL_DAYCC_DEFAULT << 17)

 #define RTCC_CC_CTRL_DAYCC_MONTH            (_RTCC_CC_CTRL_DAYCC_MONTH << 17)

 #define RTCC_CC_CTRL_DAYCC_WEEK             (_RTCC_CC_CTRL_DAYCC_WEEK << 17)

 /* Bit fields for RTCC CC_CCV */

 #define _RTCC_CC_CCV_RESETVALUE             0x00000000UL

 #define _RTCC_CC_CCV_MASK                   0xFFFFFFFFUL

 #define _RTCC_CC_CCV_CCV_SHIFT              0

 #define _RTCC_CC_CCV_CCV_MASK               0xFFFFFFFFUL

 #define _RTCC_CC_CCV_CCV_DEFAULT            0x00000000UL

 #define RTCC_CC_CCV_CCV_DEFAULT             (_RTCC_CC_CCV_CCV_DEFAULT << 0)

 /* Bit fields for RTCC CC_TIME */

 #define _RTCC_CC_TIME_RESETVALUE            0x00000000UL

 #define _RTCC_CC_TIME_MASK                  0x003F7F7FUL

 #define _RTCC_CC_TIME_SECU_SHIFT            0

 #define _RTCC_CC_TIME_SECU_MASK             0xFUL

 #define _RTCC_CC_TIME_SECU_DEFAULT          0x00000000UL

 #define RTCC_CC_TIME_SECU_DEFAULT           (_RTCC_CC_TIME_SECU_DEFAULT << 0)

 #define _RTCC_CC_TIME_SECT_SHIFT            4

 #define _RTCC_CC_TIME_SECT_MASK             0x70UL

 #define _RTCC_CC_TIME_SECT_DEFAULT          0x00000000UL

 #define RTCC_CC_TIME_SECT_DEFAULT           (_RTCC_CC_TIME_SECT_DEFAULT << 4)

 #define _RTCC_CC_TIME_MINU_SHIFT            8

 #define _RTCC_CC_TIME_MINU_MASK             0xF00UL

 #define _RTCC_CC_TIME_MINU_DEFAULT          0x00000000UL

 #define RTCC_CC_TIME_MINU_DEFAULT           (_RTCC_CC_TIME_MINU_DEFAULT << 8)

 #define _RTCC_CC_TIME_MINT_SHIFT            12

 #define _RTCC_CC_TIME_MINT_MASK             0x7000UL

 #define _RTCC_CC_TIME_MINT_DEFAULT          0x00000000UL

 #define RTCC_CC_TIME_MINT_DEFAULT           (_RTCC_CC_TIME_MINT_DEFAULT << 12)

 #define _RTCC_CC_TIME_HOURU_SHIFT           16

 #define _RTCC_CC_TIME_HOURU_MASK            0xF0000UL

 #define _RTCC_CC_TIME_HOURU_DEFAULT         0x00000000UL

 #define RTCC_CC_TIME_HOURU_DEFAULT          (_RTCC_CC_TIME_HOURU_DEFAULT << 16)

 #define _RTCC_CC_TIME_HOURT_SHIFT           20

 #define _RTCC_CC_TIME_HOURT_MASK            0x300000UL

 #define _RTCC_CC_TIME_HOURT_DEFAULT         0x00000000UL

 #define RTCC_CC_TIME_HOURT_DEFAULT          (_RTCC_CC_TIME_HOURT_DEFAULT << 20)

 /* Bit fields for RTCC CC_DATE */

 #define _RTCC_CC_DATE_RESETVALUE            0x00000000UL

 #define _RTCC_CC_DATE_MASK                  0x00001F3FUL

 #define _RTCC_CC_DATE_DAYU_SHIFT            0

 #define _RTCC_CC_DATE_DAYU_MASK             0xFUL

 #define _RTCC_CC_DATE_DAYU_DEFAULT          0x00000000UL

 #define RTCC_CC_DATE_DAYU_DEFAULT           (_RTCC_CC_DATE_DAYU_DEFAULT << 0)

 #define _RTCC_CC_DATE_DAYT_SHIFT            4

 #define _RTCC_CC_DATE_DAYT_MASK             0x30UL

 #define _RTCC_CC_DATE_DAYT_DEFAULT          0x00000000UL

 #define RTCC_CC_DATE_DAYT_DEFAULT           (_RTCC_CC_DATE_DAYT_DEFAULT << 4)

 #define _RTCC_CC_DATE_MONTHU_SHIFT          8

 #define _RTCC_CC_DATE_MONTHU_MASK           0xF00UL

 #define _RTCC_CC_DATE_MONTHU_DEFAULT        0x00000000UL

 #define RTCC_CC_DATE_MONTHU_DEFAULT         (_RTCC_CC_DATE_MONTHU_DEFAULT << 8)

 #define RTCC_CC_DATE_MONTHT                 (0x1UL << 12)

 #define _RTCC_CC_DATE_MONTHT_SHIFT          12

 #define _RTCC_CC_DATE_MONTHT_MASK           0x1000UL

 #define _RTCC_CC_DATE_MONTHT_DEFAULT        0x00000000UL

 #define RTCC_CC_DATE_MONTHT_DEFAULT         (_RTCC_CC_DATE_MONTHT_DEFAULT << 12)

 /* Bit fields for RTCC RET_REG */

 #define _RTCC_RET_REG_RESETVALUE            0x00000000UL

 #define _RTCC_RET_REG_MASK                  0xFFFFFFFFUL

 #define _RTCC_RET_REG_REG_SHIFT             0

 #define _RTCC_RET_REG_REG_MASK              0xFFFFFFFFUL

 #define _RTCC_RET_REG_REG_DEFAULT           0x00000000UL

 #define RTCC_RET_REG_REG_DEFAULT            (_RTCC_RET_REG_REG_DEFAULT << 0)

RTCC_TypeDef::POWERDOWN
__IOM uint32_t POWERDOWN
Definition: efm32pg12b_rtcc.h:56

RTCC_TypeDef::IFS
__IOM uint32_t IFS
Definition: efm32pg12b_rtcc.h:50

RTCC_TypeDef
Definition: efm32pg12b_rtcc.h:41

RTCC_TypeDef::CNT
__IOM uint32_t CNT
Definition: efm32pg12b_rtcc.h:45

RTCC_TypeDef::CMD
__IOM uint32_t CMD
Definition: efm32pg12b_rtcc.h:54

RTCC_TypeDef::IEN
__IOM uint32_t IEN
Definition: efm32pg12b_rtcc.h:52

RTCC_TypeDef::DATE
__IOM uint32_t DATE
Definition: efm32pg12b_rtcc.h:48

RTCC_TypeDef::TIME
__IOM uint32_t TIME
Definition: efm32pg12b_rtcc.h:47

RTCC_TypeDef::IFC
__IOM uint32_t IFC
Definition: efm32pg12b_rtcc.h:51

RTCC_TypeDef::EM4WUEN
__IOM uint32_t EM4WUEN
Definition: efm32pg12b_rtcc.h:58

RTCC_TypeDef::SYNCBUSY
__IM uint32_t SYNCBUSY
Definition: efm32pg12b_rtcc.h:55

RTCC_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efm32pg12b_rtcc.h:53

RTCC_TypeDef::PRECNT
__IOM uint32_t PRECNT
Definition: efm32pg12b_rtcc.h:44

RTCC_CC_TypeDef
RTCC_CC EFM32PG12B RTCC CC.
Definition: efm32pg12b_rtcc_cc.h:39

RTCC_RET_TypeDef
RTCC_RET EFM32PG12B RTCC RET.
Definition: efm32pg12b_rtcc_ret.h:39

RTCC_TypeDef::COMBCNT
__IM uint32_t COMBCNT
Definition: efm32pg12b_rtcc.h:46

RTCC_TypeDef::LOCK
__IOM uint32_t LOCK
Definition: efm32pg12b_rtcc.h:57

RTCC_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32pg12b_rtcc.h:43

RTCC_TypeDef::IF
__IM uint32_t IF
Definition: efm32pg12b_rtcc.h:49