efm32pg12/html/efm32pg12b__msc_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   __IOM uint32_t READCTRL;

   __IOM uint32_t WRITECTRL;

   __IOM uint32_t WRITECMD;

   __IOM uint32_t ADDRB;

   uint32_t       RESERVED0[1];

   __IOM uint32_t WDATA;

   __IM uint32_t  STATUS;

   uint32_t       RESERVED1[4];

   __IM uint32_t  IF;

   __IOM uint32_t IFS;

   __IOM uint32_t IFC;

   __IOM uint32_t IEN;

   __IOM uint32_t LOCK;

   __IOM uint32_t CACHECMD;

   __IM uint32_t  CACHEHITS;

   __IM uint32_t  CACHEMISSES;

   uint32_t       RESERVED2[1];

   __IOM uint32_t MASSLOCK;

   uint32_t       RESERVED3[1];

   __IOM uint32_t STARTUP;

   uint32_t       RESERVED4[4];

   __IOM uint32_t BANKSWITCHLOCK;

   __IOM uint32_t CMD;

   uint32_t       RESERVED5[6];

   __IOM uint32_t BOOTLOADERCTRL;

   __IOM uint32_t AAPUNLOCKCMD;

   __IOM uint32_t CACHECONFIG0;

   uint32_t       RESERVED6[25];

   __IOM uint32_t RAMCTRL;

 } MSC_TypeDef;

 /**************************************************************************/

 /* Bit fields for MSC CTRL */

 #define _MSC_CTRL_RESETVALUE                              0x00000001UL

 #define _MSC_CTRL_MASK                                    0x0000001FUL

 #define MSC_CTRL_ADDRFAULTEN                              (0x1UL << 0)

 #define _MSC_CTRL_ADDRFAULTEN_SHIFT                       0

 #define _MSC_CTRL_ADDRFAULTEN_MASK                        0x1UL

 #define _MSC_CTRL_ADDRFAULTEN_DEFAULT                     0x00000001UL

 #define MSC_CTRL_ADDRFAULTEN_DEFAULT                      (_MSC_CTRL_ADDRFAULTEN_DEFAULT << 0)

 #define MSC_CTRL_CLKDISFAULTEN                            (0x1UL << 1)

 #define _MSC_CTRL_CLKDISFAULTEN_SHIFT                     1

 #define _MSC_CTRL_CLKDISFAULTEN_MASK                      0x2UL

 #define _MSC_CTRL_CLKDISFAULTEN_DEFAULT                   0x00000000UL

 #define MSC_CTRL_CLKDISFAULTEN_DEFAULT                    (_MSC_CTRL_CLKDISFAULTEN_DEFAULT << 1)

 #define MSC_CTRL_PWRUPONDEMAND                            (0x1UL << 2)

 #define _MSC_CTRL_PWRUPONDEMAND_SHIFT                     2

 #define _MSC_CTRL_PWRUPONDEMAND_MASK                      0x4UL

 #define _MSC_CTRL_PWRUPONDEMAND_DEFAULT                   0x00000000UL

 #define MSC_CTRL_PWRUPONDEMAND_DEFAULT                    (_MSC_CTRL_PWRUPONDEMAND_DEFAULT << 2)

 #define MSC_CTRL_IFCREADCLEAR                             (0x1UL << 3)

 #define _MSC_CTRL_IFCREADCLEAR_SHIFT                      3

 #define _MSC_CTRL_IFCREADCLEAR_MASK                       0x8UL

 #define _MSC_CTRL_IFCREADCLEAR_DEFAULT                    0x00000000UL

 #define MSC_CTRL_IFCREADCLEAR_DEFAULT                     (_MSC_CTRL_IFCREADCLEAR_DEFAULT << 3)

 #define MSC_CTRL_TIMEOUTFAULTEN                           (0x1UL << 4)

 #define _MSC_CTRL_TIMEOUTFAULTEN_SHIFT                    4

 #define _MSC_CTRL_TIMEOUTFAULTEN_MASK                     0x10UL

 #define _MSC_CTRL_TIMEOUTFAULTEN_DEFAULT                  0x00000000UL

 #define MSC_CTRL_TIMEOUTFAULTEN_DEFAULT                   (_MSC_CTRL_TIMEOUTFAULTEN_DEFAULT << 4)

 /* Bit fields for MSC READCTRL */

 #define _MSC_READCTRL_RESETVALUE                          0x01000100UL

 #define _MSC_READCTRL_MASK                                0x13000338UL

 #define MSC_READCTRL_IFCDIS                               (0x1UL << 3)

 #define _MSC_READCTRL_IFCDIS_SHIFT                        3

 #define _MSC_READCTRL_IFCDIS_MASK                         0x8UL

 #define _MSC_READCTRL_IFCDIS_DEFAULT                      0x00000000UL

 #define MSC_READCTRL_IFCDIS_DEFAULT                       (_MSC_READCTRL_IFCDIS_DEFAULT << 3)

 #define MSC_READCTRL_AIDIS                                (0x1UL << 4)

 #define _MSC_READCTRL_AIDIS_SHIFT                         4

 #define _MSC_READCTRL_AIDIS_MASK                          0x10UL

 #define _MSC_READCTRL_AIDIS_DEFAULT                       0x00000000UL

 #define MSC_READCTRL_AIDIS_DEFAULT                        (_MSC_READCTRL_AIDIS_DEFAULT << 4)

 #define MSC_READCTRL_ICCDIS                               (0x1UL << 5)

 #define _MSC_READCTRL_ICCDIS_SHIFT                        5

 #define _MSC_READCTRL_ICCDIS_MASK                         0x20UL

 #define _MSC_READCTRL_ICCDIS_DEFAULT                      0x00000000UL

 #define MSC_READCTRL_ICCDIS_DEFAULT                       (_MSC_READCTRL_ICCDIS_DEFAULT << 5)

 #define MSC_READCTRL_PREFETCH                             (0x1UL << 8)

 #define _MSC_READCTRL_PREFETCH_SHIFT                      8

 #define _MSC_READCTRL_PREFETCH_MASK                       0x100UL

 #define _MSC_READCTRL_PREFETCH_DEFAULT                    0x00000001UL

 #define MSC_READCTRL_PREFETCH_DEFAULT                     (_MSC_READCTRL_PREFETCH_DEFAULT << 8)

 #define MSC_READCTRL_USEHPROT                             (0x1UL << 9)

 #define _MSC_READCTRL_USEHPROT_SHIFT                      9

 #define _MSC_READCTRL_USEHPROT_MASK                       0x200UL

 #define _MSC_READCTRL_USEHPROT_DEFAULT                    0x00000000UL

 #define MSC_READCTRL_USEHPROT_DEFAULT                     (_MSC_READCTRL_USEHPROT_DEFAULT << 9)

 #define _MSC_READCTRL_MODE_SHIFT                          24

 #define _MSC_READCTRL_MODE_MASK                           0x3000000UL

 #define _MSC_READCTRL_MODE_WS0                            0x00000000UL

 #define _MSC_READCTRL_MODE_DEFAULT                        0x00000001UL

 #define _MSC_READCTRL_MODE_WS1                            0x00000001UL

 #define _MSC_READCTRL_MODE_WS2                            0x00000002UL

 #define _MSC_READCTRL_MODE_WS3                            0x00000003UL

 #define MSC_READCTRL_MODE_WS0                             (_MSC_READCTRL_MODE_WS0 << 24)

 #define MSC_READCTRL_MODE_DEFAULT                         (_MSC_READCTRL_MODE_DEFAULT << 24)

 #define MSC_READCTRL_MODE_WS1                             (_MSC_READCTRL_MODE_WS1 << 24)

 #define MSC_READCTRL_MODE_WS2                             (_MSC_READCTRL_MODE_WS2 << 24)

 #define MSC_READCTRL_MODE_WS3                             (_MSC_READCTRL_MODE_WS3 << 24)

 #define MSC_READCTRL_SCBTP                                (0x1UL << 28)

 #define _MSC_READCTRL_SCBTP_SHIFT                         28

 #define _MSC_READCTRL_SCBTP_MASK                          0x10000000UL

 #define _MSC_READCTRL_SCBTP_DEFAULT                       0x00000000UL

 #define MSC_READCTRL_SCBTP_DEFAULT                        (_MSC_READCTRL_SCBTP_DEFAULT << 28)

 /* Bit fields for MSC WRITECTRL */

 #define _MSC_WRITECTRL_RESETVALUE                         0x00000000UL

 #define _MSC_WRITECTRL_MASK                               0x00000023UL

 #define MSC_WRITECTRL_WREN                                (0x1UL << 0)

 #define _MSC_WRITECTRL_WREN_SHIFT                         0

 #define _MSC_WRITECTRL_WREN_MASK                          0x1UL

 #define _MSC_WRITECTRL_WREN_DEFAULT                       0x00000000UL

 #define MSC_WRITECTRL_WREN_DEFAULT                        (_MSC_WRITECTRL_WREN_DEFAULT << 0)

 #define MSC_WRITECTRL_IRQERASEABORT                       (0x1UL << 1)

 #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT                1

 #define _MSC_WRITECTRL_IRQERASEABORT_MASK                 0x2UL

 #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT              0x00000000UL

 #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT               (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)

 #define MSC_WRITECTRL_RWWEN                               (0x1UL << 5)

 #define _MSC_WRITECTRL_RWWEN_SHIFT                        5

 #define _MSC_WRITECTRL_RWWEN_MASK                         0x20UL

 #define _MSC_WRITECTRL_RWWEN_DEFAULT                      0x00000000UL

 #define MSC_WRITECTRL_RWWEN_DEFAULT                       (_MSC_WRITECTRL_RWWEN_DEFAULT << 5)

 /* Bit fields for MSC WRITECMD */

 #define _MSC_WRITECMD_RESETVALUE                          0x00000000UL

 #define _MSC_WRITECMD_MASK                                0x0000133FUL

 #define MSC_WRITECMD_LADDRIM                              (0x1UL << 0)

 #define _MSC_WRITECMD_LADDRIM_SHIFT                       0

 #define _MSC_WRITECMD_LADDRIM_MASK                        0x1UL

 #define _MSC_WRITECMD_LADDRIM_DEFAULT                     0x00000000UL

 #define MSC_WRITECMD_LADDRIM_DEFAULT                      (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)

 #define MSC_WRITECMD_ERASEPAGE                            (0x1UL << 1)

 #define _MSC_WRITECMD_ERASEPAGE_SHIFT                     1

 #define _MSC_WRITECMD_ERASEPAGE_MASK                      0x2UL

 #define _MSC_WRITECMD_ERASEPAGE_DEFAULT                   0x00000000UL

 #define MSC_WRITECMD_ERASEPAGE_DEFAULT                    (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)

 #define MSC_WRITECMD_WRITEEND                             (0x1UL << 2)

 #define _MSC_WRITECMD_WRITEEND_SHIFT                      2

 #define _MSC_WRITECMD_WRITEEND_MASK                       0x4UL

 #define _MSC_WRITECMD_WRITEEND_DEFAULT                    0x00000000UL

 #define MSC_WRITECMD_WRITEEND_DEFAULT                     (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)

 #define MSC_WRITECMD_WRITEONCE                            (0x1UL << 3)

 #define _MSC_WRITECMD_WRITEONCE_SHIFT                     3

 #define _MSC_WRITECMD_WRITEONCE_MASK                      0x8UL

 #define _MSC_WRITECMD_WRITEONCE_DEFAULT                   0x00000000UL

 #define MSC_WRITECMD_WRITEONCE_DEFAULT                    (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)

 #define MSC_WRITECMD_WRITETRIG                            (0x1UL << 4)

 #define _MSC_WRITECMD_WRITETRIG_SHIFT                     4

 #define _MSC_WRITECMD_WRITETRIG_MASK                      0x10UL

 #define _MSC_WRITECMD_WRITETRIG_DEFAULT                   0x00000000UL

 #define MSC_WRITECMD_WRITETRIG_DEFAULT                    (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)

 #define MSC_WRITECMD_ERASEABORT                           (0x1UL << 5)

 #define _MSC_WRITECMD_ERASEABORT_SHIFT                    5

 #define _MSC_WRITECMD_ERASEABORT_MASK                     0x20UL

 #define _MSC_WRITECMD_ERASEABORT_DEFAULT                  0x00000000UL

 #define MSC_WRITECMD_ERASEABORT_DEFAULT                   (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)

 #define MSC_WRITECMD_ERASEMAIN0                           (0x1UL << 8)

 #define _MSC_WRITECMD_ERASEMAIN0_SHIFT                    8

 #define _MSC_WRITECMD_ERASEMAIN0_MASK                     0x100UL

 #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT                  0x00000000UL

 #define MSC_WRITECMD_ERASEMAIN0_DEFAULT                   (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)

 #define MSC_WRITECMD_ERASEMAIN1                           (0x1UL << 9)

 #define _MSC_WRITECMD_ERASEMAIN1_SHIFT                    9

 #define _MSC_WRITECMD_ERASEMAIN1_MASK                     0x200UL

 #define _MSC_WRITECMD_ERASEMAIN1_DEFAULT                  0x00000000UL

 #define MSC_WRITECMD_ERASEMAIN1_DEFAULT                   (_MSC_WRITECMD_ERASEMAIN1_DEFAULT << 9)

 #define MSC_WRITECMD_CLEARWDATA                           (0x1UL << 12)

 #define _MSC_WRITECMD_CLEARWDATA_SHIFT                    12

 #define _MSC_WRITECMD_CLEARWDATA_MASK                     0x1000UL

 #define _MSC_WRITECMD_CLEARWDATA_DEFAULT                  0x00000000UL

 #define MSC_WRITECMD_CLEARWDATA_DEFAULT                   (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)

 /* Bit fields for MSC ADDRB */

 #define _MSC_ADDRB_RESETVALUE                             0x00000000UL

 #define _MSC_ADDRB_MASK                                   0xFFFFFFFFUL

 #define _MSC_ADDRB_ADDRB_SHIFT                            0

 #define _MSC_ADDRB_ADDRB_MASK                             0xFFFFFFFFUL

 #define _MSC_ADDRB_ADDRB_DEFAULT                          0x00000000UL

 #define MSC_ADDRB_ADDRB_DEFAULT                           (_MSC_ADDRB_ADDRB_DEFAULT << 0)

 /* Bit fields for MSC WDATA */

 #define _MSC_WDATA_RESETVALUE                             0x00000000UL

 #define _MSC_WDATA_MASK                                   0xFFFFFFFFUL

 #define _MSC_WDATA_WDATA_SHIFT                            0

 #define _MSC_WDATA_WDATA_MASK                             0xFFFFFFFFUL

 #define _MSC_WDATA_WDATA_DEFAULT                          0x00000000UL

 #define MSC_WDATA_WDATA_DEFAULT                           (_MSC_WDATA_WDATA_DEFAULT << 0)

 /* Bit fields for MSC STATUS */

 #define _MSC_STATUS_RESETVALUE                            0x00000008UL

 #define _MSC_STATUS_MASK                                  0xFF0000FFUL

 #define MSC_STATUS_BUSY                                   (0x1UL << 0)

 #define _MSC_STATUS_BUSY_SHIFT                            0

 #define _MSC_STATUS_BUSY_MASK                             0x1UL

 #define _MSC_STATUS_BUSY_DEFAULT                          0x00000000UL

 #define MSC_STATUS_BUSY_DEFAULT                           (_MSC_STATUS_BUSY_DEFAULT << 0)

 #define MSC_STATUS_LOCKED                                 (0x1UL << 1)

 #define _MSC_STATUS_LOCKED_SHIFT                          1

 #define _MSC_STATUS_LOCKED_MASK                           0x2UL

 #define _MSC_STATUS_LOCKED_DEFAULT                        0x00000000UL

 #define MSC_STATUS_LOCKED_DEFAULT                         (_MSC_STATUS_LOCKED_DEFAULT << 1)

 #define MSC_STATUS_INVADDR                                (0x1UL << 2)

 #define _MSC_STATUS_INVADDR_SHIFT                         2

 #define _MSC_STATUS_INVADDR_MASK                          0x4UL

 #define _MSC_STATUS_INVADDR_DEFAULT                       0x00000000UL

 #define MSC_STATUS_INVADDR_DEFAULT                        (_MSC_STATUS_INVADDR_DEFAULT << 2)

 #define MSC_STATUS_WDATAREADY                             (0x1UL << 3)

 #define _MSC_STATUS_WDATAREADY_SHIFT                      3

 #define _MSC_STATUS_WDATAREADY_MASK                       0x8UL

 #define _MSC_STATUS_WDATAREADY_DEFAULT                    0x00000001UL

 #define MSC_STATUS_WDATAREADY_DEFAULT                     (_MSC_STATUS_WDATAREADY_DEFAULT << 3)

 #define MSC_STATUS_WORDTIMEOUT                            (0x1UL << 4)

 #define _MSC_STATUS_WORDTIMEOUT_SHIFT                     4

 #define _MSC_STATUS_WORDTIMEOUT_MASK                      0x10UL

 #define _MSC_STATUS_WORDTIMEOUT_DEFAULT                   0x00000000UL

 #define MSC_STATUS_WORDTIMEOUT_DEFAULT                    (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)

 #define MSC_STATUS_ERASEABORTED                           (0x1UL << 5)

 #define _MSC_STATUS_ERASEABORTED_SHIFT                    5

 #define _MSC_STATUS_ERASEABORTED_MASK                     0x20UL

 #define _MSC_STATUS_ERASEABORTED_DEFAULT                  0x00000000UL

 #define MSC_STATUS_ERASEABORTED_DEFAULT                   (_MSC_STATUS_ERASEABORTED_DEFAULT << 5)

 #define MSC_STATUS_PCRUNNING                              (0x1UL << 6)

 #define _MSC_STATUS_PCRUNNING_SHIFT                       6

 #define _MSC_STATUS_PCRUNNING_MASK                        0x40UL

 #define _MSC_STATUS_PCRUNNING_DEFAULT                     0x00000000UL

 #define MSC_STATUS_PCRUNNING_DEFAULT                      (_MSC_STATUS_PCRUNNING_DEFAULT << 6)

 #define MSC_STATUS_BANKSWITCHED                           (0x1UL << 7)

 #define _MSC_STATUS_BANKSWITCHED_SHIFT                    7

 #define _MSC_STATUS_BANKSWITCHED_MASK                     0x80UL

 #define _MSC_STATUS_BANKSWITCHED_DEFAULT                  0x00000000UL

 #define MSC_STATUS_BANKSWITCHED_DEFAULT                   (_MSC_STATUS_BANKSWITCHED_DEFAULT << 7)

 #define _MSC_STATUS_WDATAVALID_SHIFT                      24

 #define _MSC_STATUS_WDATAVALID_MASK                       0xF000000UL

 #define _MSC_STATUS_WDATAVALID_DEFAULT                    0x00000000UL

 #define MSC_STATUS_WDATAVALID_DEFAULT                     (_MSC_STATUS_WDATAVALID_DEFAULT << 24)

 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_SHIFT              28

 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_MASK               0xF0000000UL

 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT            0x00000000UL

 #define MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT             (_MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT << 28)

 /* Bit fields for MSC IF */

 #define _MSC_IF_RESETVALUE                                0x00000000UL

 #define _MSC_IF_MASK                                      0x0000017FUL

 #define MSC_IF_ERASE                                      (0x1UL << 0)

 #define _MSC_IF_ERASE_SHIFT                               0

 #define _MSC_IF_ERASE_MASK                                0x1UL

 #define _MSC_IF_ERASE_DEFAULT                             0x00000000UL

 #define MSC_IF_ERASE_DEFAULT                              (_MSC_IF_ERASE_DEFAULT << 0)

 #define MSC_IF_WRITE                                      (0x1UL << 1)

 #define _MSC_IF_WRITE_SHIFT                               1

 #define _MSC_IF_WRITE_MASK                                0x2UL

 #define _MSC_IF_WRITE_DEFAULT                             0x00000000UL

 #define MSC_IF_WRITE_DEFAULT                              (_MSC_IF_WRITE_DEFAULT << 1)

 #define MSC_IF_CHOF                                       (0x1UL << 2)

 #define _MSC_IF_CHOF_SHIFT                                2

 #define _MSC_IF_CHOF_MASK                                 0x4UL

 #define _MSC_IF_CHOF_DEFAULT                              0x00000000UL

 #define MSC_IF_CHOF_DEFAULT                               (_MSC_IF_CHOF_DEFAULT << 2)

 #define MSC_IF_CMOF                                       (0x1UL << 3)

 #define _MSC_IF_CMOF_SHIFT                                3

 #define _MSC_IF_CMOF_MASK                                 0x8UL

 #define _MSC_IF_CMOF_DEFAULT                              0x00000000UL

 #define MSC_IF_CMOF_DEFAULT                               (_MSC_IF_CMOF_DEFAULT << 3)

 #define MSC_IF_PWRUPF                                     (0x1UL << 4)

 #define _MSC_IF_PWRUPF_SHIFT                              4

 #define _MSC_IF_PWRUPF_MASK                               0x10UL

 #define _MSC_IF_PWRUPF_DEFAULT                            0x00000000UL

 #define MSC_IF_PWRUPF_DEFAULT                             (_MSC_IF_PWRUPF_DEFAULT << 4)

 #define MSC_IF_ICACHERR                                   (0x1UL << 5)

 #define _MSC_IF_ICACHERR_SHIFT                            5

 #define _MSC_IF_ICACHERR_MASK                             0x20UL

 #define _MSC_IF_ICACHERR_DEFAULT                          0x00000000UL

 #define MSC_IF_ICACHERR_DEFAULT                           (_MSC_IF_ICACHERR_DEFAULT << 5)

 #define MSC_IF_WDATAOV                                    (0x1UL << 6)

 #define _MSC_IF_WDATAOV_SHIFT                             6

 #define _MSC_IF_WDATAOV_MASK                              0x40UL

 #define _MSC_IF_WDATAOV_DEFAULT                           0x00000000UL

 #define MSC_IF_WDATAOV_DEFAULT                            (_MSC_IF_WDATAOV_DEFAULT << 6)

 #define MSC_IF_LVEWRITE                                   (0x1UL << 8)

 #define _MSC_IF_LVEWRITE_SHIFT                            8

 #define _MSC_IF_LVEWRITE_MASK                             0x100UL

 #define _MSC_IF_LVEWRITE_DEFAULT                          0x00000000UL

 #define MSC_IF_LVEWRITE_DEFAULT                           (_MSC_IF_LVEWRITE_DEFAULT << 8)

 /* Bit fields for MSC IFS */

 #define _MSC_IFS_RESETVALUE                               0x00000000UL

 #define _MSC_IFS_MASK                                     0x0000017FUL

 #define MSC_IFS_ERASE                                     (0x1UL << 0)

 #define _MSC_IFS_ERASE_SHIFT                              0

 #define _MSC_IFS_ERASE_MASK                               0x1UL

 #define _MSC_IFS_ERASE_DEFAULT                            0x00000000UL

 #define MSC_IFS_ERASE_DEFAULT                             (_MSC_IFS_ERASE_DEFAULT << 0)

 #define MSC_IFS_WRITE                                     (0x1UL << 1)

 #define _MSC_IFS_WRITE_SHIFT                              1

 #define _MSC_IFS_WRITE_MASK                               0x2UL

 #define _MSC_IFS_WRITE_DEFAULT                            0x00000000UL

 #define MSC_IFS_WRITE_DEFAULT                             (_MSC_IFS_WRITE_DEFAULT << 1)

 #define MSC_IFS_CHOF                                      (0x1UL << 2)

 #define _MSC_IFS_CHOF_SHIFT                               2

 #define _MSC_IFS_CHOF_MASK                                0x4UL

 #define _MSC_IFS_CHOF_DEFAULT                             0x00000000UL

 #define MSC_IFS_CHOF_DEFAULT                              (_MSC_IFS_CHOF_DEFAULT << 2)

 #define MSC_IFS_CMOF                                      (0x1UL << 3)

 #define _MSC_IFS_CMOF_SHIFT                               3

 #define _MSC_IFS_CMOF_MASK                                0x8UL

 #define _MSC_IFS_CMOF_DEFAULT                             0x00000000UL

 #define MSC_IFS_CMOF_DEFAULT                              (_MSC_IFS_CMOF_DEFAULT << 3)

 #define MSC_IFS_PWRUPF                                    (0x1UL << 4)

 #define _MSC_IFS_PWRUPF_SHIFT                             4

 #define _MSC_IFS_PWRUPF_MASK                              0x10UL

 #define _MSC_IFS_PWRUPF_DEFAULT                           0x00000000UL

 #define MSC_IFS_PWRUPF_DEFAULT                            (_MSC_IFS_PWRUPF_DEFAULT << 4)

 #define MSC_IFS_ICACHERR                                  (0x1UL << 5)

 #define _MSC_IFS_ICACHERR_SHIFT                           5

 #define _MSC_IFS_ICACHERR_MASK                            0x20UL

 #define _MSC_IFS_ICACHERR_DEFAULT                         0x00000000UL

 #define MSC_IFS_ICACHERR_DEFAULT                          (_MSC_IFS_ICACHERR_DEFAULT << 5)

 #define MSC_IFS_WDATAOV                                   (0x1UL << 6)

 #define _MSC_IFS_WDATAOV_SHIFT                            6

 #define _MSC_IFS_WDATAOV_MASK                             0x40UL

 #define _MSC_IFS_WDATAOV_DEFAULT                          0x00000000UL

 #define MSC_IFS_WDATAOV_DEFAULT                           (_MSC_IFS_WDATAOV_DEFAULT << 6)

 #define MSC_IFS_LVEWRITE                                  (0x1UL << 8)

 #define _MSC_IFS_LVEWRITE_SHIFT                           8

 #define _MSC_IFS_LVEWRITE_MASK                            0x100UL

 #define _MSC_IFS_LVEWRITE_DEFAULT                         0x00000000UL

 #define MSC_IFS_LVEWRITE_DEFAULT                          (_MSC_IFS_LVEWRITE_DEFAULT << 8)

 /* Bit fields for MSC IFC */

 #define _MSC_IFC_RESETVALUE                               0x00000000UL

 #define _MSC_IFC_MASK                                     0x0000017FUL

 #define MSC_IFC_ERASE                                     (0x1UL << 0)

 #define _MSC_IFC_ERASE_SHIFT                              0

 #define _MSC_IFC_ERASE_MASK                               0x1UL

 #define _MSC_IFC_ERASE_DEFAULT                            0x00000000UL

 #define MSC_IFC_ERASE_DEFAULT                             (_MSC_IFC_ERASE_DEFAULT << 0)

 #define MSC_IFC_WRITE                                     (0x1UL << 1)

 #define _MSC_IFC_WRITE_SHIFT                              1

 #define _MSC_IFC_WRITE_MASK                               0x2UL

 #define _MSC_IFC_WRITE_DEFAULT                            0x00000000UL

 #define MSC_IFC_WRITE_DEFAULT                             (_MSC_IFC_WRITE_DEFAULT << 1)

 #define MSC_IFC_CHOF                                      (0x1UL << 2)

 #define _MSC_IFC_CHOF_SHIFT                               2

 #define _MSC_IFC_CHOF_MASK                                0x4UL

 #define _MSC_IFC_CHOF_DEFAULT                             0x00000000UL

 #define MSC_IFC_CHOF_DEFAULT                              (_MSC_IFC_CHOF_DEFAULT << 2)

 #define MSC_IFC_CMOF                                      (0x1UL << 3)

 #define _MSC_IFC_CMOF_SHIFT                               3

 #define _MSC_IFC_CMOF_MASK                                0x8UL

 #define _MSC_IFC_CMOF_DEFAULT                             0x00000000UL

 #define MSC_IFC_CMOF_DEFAULT                              (_MSC_IFC_CMOF_DEFAULT << 3)

 #define MSC_IFC_PWRUPF                                    (0x1UL << 4)

 #define _MSC_IFC_PWRUPF_SHIFT                             4

 #define _MSC_IFC_PWRUPF_MASK                              0x10UL

 #define _MSC_IFC_PWRUPF_DEFAULT                           0x00000000UL

 #define MSC_IFC_PWRUPF_DEFAULT                            (_MSC_IFC_PWRUPF_DEFAULT << 4)

 #define MSC_IFC_ICACHERR                                  (0x1UL << 5)

 #define _MSC_IFC_ICACHERR_SHIFT                           5

 #define _MSC_IFC_ICACHERR_MASK                            0x20UL

 #define _MSC_IFC_ICACHERR_DEFAULT                         0x00000000UL

 #define MSC_IFC_ICACHERR_DEFAULT                          (_MSC_IFC_ICACHERR_DEFAULT << 5)

 #define MSC_IFC_WDATAOV                                   (0x1UL << 6)

 #define _MSC_IFC_WDATAOV_SHIFT                            6

 #define _MSC_IFC_WDATAOV_MASK                             0x40UL

 #define _MSC_IFC_WDATAOV_DEFAULT                          0x00000000UL

 #define MSC_IFC_WDATAOV_DEFAULT                           (_MSC_IFC_WDATAOV_DEFAULT << 6)

 #define MSC_IFC_LVEWRITE                                  (0x1UL << 8)

 #define _MSC_IFC_LVEWRITE_SHIFT                           8

 #define _MSC_IFC_LVEWRITE_MASK                            0x100UL

 #define _MSC_IFC_LVEWRITE_DEFAULT                         0x00000000UL

 #define MSC_IFC_LVEWRITE_DEFAULT                          (_MSC_IFC_LVEWRITE_DEFAULT << 8)

 /* Bit fields for MSC IEN */

 #define _MSC_IEN_RESETVALUE                               0x00000000UL

 #define _MSC_IEN_MASK                                     0x0000017FUL

 #define MSC_IEN_ERASE                                     (0x1UL << 0)

 #define _MSC_IEN_ERASE_SHIFT                              0

 #define _MSC_IEN_ERASE_MASK                               0x1UL

 #define _MSC_IEN_ERASE_DEFAULT                            0x00000000UL

 #define MSC_IEN_ERASE_DEFAULT                             (_MSC_IEN_ERASE_DEFAULT << 0)

 #define MSC_IEN_WRITE                                     (0x1UL << 1)

 #define _MSC_IEN_WRITE_SHIFT                              1

 #define _MSC_IEN_WRITE_MASK                               0x2UL

 #define _MSC_IEN_WRITE_DEFAULT                            0x00000000UL

 #define MSC_IEN_WRITE_DEFAULT                             (_MSC_IEN_WRITE_DEFAULT << 1)

 #define MSC_IEN_CHOF                                      (0x1UL << 2)

 #define _MSC_IEN_CHOF_SHIFT                               2

 #define _MSC_IEN_CHOF_MASK                                0x4UL

 #define _MSC_IEN_CHOF_DEFAULT                             0x00000000UL

 #define MSC_IEN_CHOF_DEFAULT                              (_MSC_IEN_CHOF_DEFAULT << 2)

 #define MSC_IEN_CMOF                                      (0x1UL << 3)

 #define _MSC_IEN_CMOF_SHIFT                               3

 #define _MSC_IEN_CMOF_MASK                                0x8UL

 #define _MSC_IEN_CMOF_DEFAULT                             0x00000000UL

 #define MSC_IEN_CMOF_DEFAULT                              (_MSC_IEN_CMOF_DEFAULT << 3)

 #define MSC_IEN_PWRUPF                                    (0x1UL << 4)

 #define _MSC_IEN_PWRUPF_SHIFT                             4

 #define _MSC_IEN_PWRUPF_MASK                              0x10UL

 #define _MSC_IEN_PWRUPF_DEFAULT                           0x00000000UL

 #define MSC_IEN_PWRUPF_DEFAULT                            (_MSC_IEN_PWRUPF_DEFAULT << 4)

 #define MSC_IEN_ICACHERR                                  (0x1UL << 5)

 #define _MSC_IEN_ICACHERR_SHIFT                           5

 #define _MSC_IEN_ICACHERR_MASK                            0x20UL

 #define _MSC_IEN_ICACHERR_DEFAULT                         0x00000000UL

 #define MSC_IEN_ICACHERR_DEFAULT                          (_MSC_IEN_ICACHERR_DEFAULT << 5)

 #define MSC_IEN_WDATAOV                                   (0x1UL << 6)

 #define _MSC_IEN_WDATAOV_SHIFT                            6

 #define _MSC_IEN_WDATAOV_MASK                             0x40UL

 #define _MSC_IEN_WDATAOV_DEFAULT                          0x00000000UL

 #define MSC_IEN_WDATAOV_DEFAULT                           (_MSC_IEN_WDATAOV_DEFAULT << 6)

 #define MSC_IEN_LVEWRITE                                  (0x1UL << 8)

 #define _MSC_IEN_LVEWRITE_SHIFT                           8

 #define _MSC_IEN_LVEWRITE_MASK                            0x100UL

 #define _MSC_IEN_LVEWRITE_DEFAULT                         0x00000000UL

 #define MSC_IEN_LVEWRITE_DEFAULT                          (_MSC_IEN_LVEWRITE_DEFAULT << 8)

 /* Bit fields for MSC LOCK */

 #define _MSC_LOCK_RESETVALUE                              0x00000000UL

 #define _MSC_LOCK_MASK                                    0x0000FFFFUL

 #define _MSC_LOCK_LOCKKEY_SHIFT                           0

 #define _MSC_LOCK_LOCKKEY_MASK                            0xFFFFUL

 #define _MSC_LOCK_LOCKKEY_DEFAULT                         0x00000000UL

 #define _MSC_LOCK_LOCKKEY_LOCK                            0x00000000UL

 #define _MSC_LOCK_LOCKKEY_UNLOCKED                        0x00000000UL

 #define _MSC_LOCK_LOCKKEY_LOCKED                          0x00000001UL

 #define _MSC_LOCK_LOCKKEY_UNLOCK                          0x00001B71UL

 #define MSC_LOCK_LOCKKEY_DEFAULT                          (_MSC_LOCK_LOCKKEY_DEFAULT << 0)

 #define MSC_LOCK_LOCKKEY_LOCK                             (_MSC_LOCK_LOCKKEY_LOCK << 0)

 #define MSC_LOCK_LOCKKEY_UNLOCKED                         (_MSC_LOCK_LOCKKEY_UNLOCKED << 0)

 #define MSC_LOCK_LOCKKEY_LOCKED                           (_MSC_LOCK_LOCKKEY_LOCKED << 0)

 #define MSC_LOCK_LOCKKEY_UNLOCK                           (_MSC_LOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for MSC CACHECMD */

 #define _MSC_CACHECMD_RESETVALUE                          0x00000000UL

 #define _MSC_CACHECMD_MASK                                0x00000007UL

 #define MSC_CACHECMD_INVCACHE                             (0x1UL << 0)

 #define _MSC_CACHECMD_INVCACHE_SHIFT                      0

 #define _MSC_CACHECMD_INVCACHE_MASK                       0x1UL

 #define _MSC_CACHECMD_INVCACHE_DEFAULT                    0x00000000UL

 #define MSC_CACHECMD_INVCACHE_DEFAULT                     (_MSC_CACHECMD_INVCACHE_DEFAULT << 0)

 #define MSC_CACHECMD_STARTPC                              (0x1UL << 1)

 #define _MSC_CACHECMD_STARTPC_SHIFT                       1

 #define _MSC_CACHECMD_STARTPC_MASK                        0x2UL

 #define _MSC_CACHECMD_STARTPC_DEFAULT                     0x00000000UL

 #define MSC_CACHECMD_STARTPC_DEFAULT                      (_MSC_CACHECMD_STARTPC_DEFAULT << 1)

 #define MSC_CACHECMD_STOPPC                               (0x1UL << 2)

 #define _MSC_CACHECMD_STOPPC_SHIFT                        2

 #define _MSC_CACHECMD_STOPPC_MASK                         0x4UL

 #define _MSC_CACHECMD_STOPPC_DEFAULT                      0x00000000UL

 #define MSC_CACHECMD_STOPPC_DEFAULT                       (_MSC_CACHECMD_STOPPC_DEFAULT << 2)

 /* Bit fields for MSC CACHEHITS */

 #define _MSC_CACHEHITS_RESETVALUE                         0x00000000UL

 #define _MSC_CACHEHITS_MASK                               0x000FFFFFUL

 #define _MSC_CACHEHITS_CACHEHITS_SHIFT                    0

 #define _MSC_CACHEHITS_CACHEHITS_MASK                     0xFFFFFUL

 #define _MSC_CACHEHITS_CACHEHITS_DEFAULT                  0x00000000UL

 #define MSC_CACHEHITS_CACHEHITS_DEFAULT                   (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0)

 /* Bit fields for MSC CACHEMISSES */

 #define _MSC_CACHEMISSES_RESETVALUE                       0x00000000UL

 #define _MSC_CACHEMISSES_MASK                             0x000FFFFFUL

 #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT                0

 #define _MSC_CACHEMISSES_CACHEMISSES_MASK                 0xFFFFFUL

 #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT              0x00000000UL

 #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT               (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0)

 /* Bit fields for MSC MASSLOCK */

 #define _MSC_MASSLOCK_RESETVALUE                          0x00000001UL

 #define _MSC_MASSLOCK_MASK                                0x0000FFFFUL

 #define _MSC_MASSLOCK_LOCKKEY_SHIFT                       0

 #define _MSC_MASSLOCK_LOCKKEY_MASK                        0xFFFFUL

 #define _MSC_MASSLOCK_LOCKKEY_LOCK                        0x00000000UL

 #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED                    0x00000000UL

 #define _MSC_MASSLOCK_LOCKKEY_DEFAULT                     0x00000001UL

 #define _MSC_MASSLOCK_LOCKKEY_LOCKED                      0x00000001UL

 #define _MSC_MASSLOCK_LOCKKEY_UNLOCK                      0x0000631AUL

 #define MSC_MASSLOCK_LOCKKEY_LOCK                         (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)

 #define MSC_MASSLOCK_LOCKKEY_UNLOCKED                     (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0)

 #define MSC_MASSLOCK_LOCKKEY_DEFAULT                      (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)

 #define MSC_MASSLOCK_LOCKKEY_LOCKED                       (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)

 #define MSC_MASSLOCK_LOCKKEY_UNLOCK                       (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for MSC STARTUP */

 #define _MSC_STARTUP_RESETVALUE                           0x1300104DUL

 #define _MSC_STARTUP_MASK                                 0x773FF3FFUL

 #define _MSC_STARTUP_STDLY0_SHIFT                         0

 #define _MSC_STARTUP_STDLY0_MASK                          0x3FFUL

 #define _MSC_STARTUP_STDLY0_DEFAULT                       0x0000004DUL

 #define MSC_STARTUP_STDLY0_DEFAULT                        (_MSC_STARTUP_STDLY0_DEFAULT << 0)

 #define _MSC_STARTUP_STDLY1_SHIFT                         12

 #define _MSC_STARTUP_STDLY1_MASK                          0x3FF000UL

 #define _MSC_STARTUP_STDLY1_DEFAULT                       0x00000001UL

 #define MSC_STARTUP_STDLY1_DEFAULT                        (_MSC_STARTUP_STDLY1_DEFAULT << 12)

 #define MSC_STARTUP_ASTWAIT                               (0x1UL << 24)

 #define _MSC_STARTUP_ASTWAIT_SHIFT                        24

 #define _MSC_STARTUP_ASTWAIT_MASK                         0x1000000UL

 #define _MSC_STARTUP_ASTWAIT_DEFAULT                      0x00000001UL

 #define MSC_STARTUP_ASTWAIT_DEFAULT                       (_MSC_STARTUP_ASTWAIT_DEFAULT << 24)

 #define MSC_STARTUP_STWSEN                                (0x1UL << 25)

 #define _MSC_STARTUP_STWSEN_SHIFT                         25

 #define _MSC_STARTUP_STWSEN_MASK                          0x2000000UL

 #define _MSC_STARTUP_STWSEN_DEFAULT                       0x00000001UL

 #define MSC_STARTUP_STWSEN_DEFAULT                        (_MSC_STARTUP_STWSEN_DEFAULT << 25)

 #define MSC_STARTUP_STWSAEN                               (0x1UL << 26)

 #define _MSC_STARTUP_STWSAEN_SHIFT                        26

 #define _MSC_STARTUP_STWSAEN_MASK                         0x4000000UL

 #define _MSC_STARTUP_STWSAEN_DEFAULT                      0x00000000UL

 #define MSC_STARTUP_STWSAEN_DEFAULT                       (_MSC_STARTUP_STWSAEN_DEFAULT << 26)

 #define _MSC_STARTUP_STWS_SHIFT                           28

 #define _MSC_STARTUP_STWS_MASK                            0x70000000UL

 #define _MSC_STARTUP_STWS_DEFAULT                         0x00000001UL

 #define MSC_STARTUP_STWS_DEFAULT                          (_MSC_STARTUP_STWS_DEFAULT << 28)

 /* Bit fields for MSC BANKSWITCHLOCK */

 #define _MSC_BANKSWITCHLOCK_RESETVALUE                    0x00000001UL

 #define _MSC_BANKSWITCHLOCK_MASK                          0x0000FFFFUL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_SHIFT       0

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_MASK        0xFFFFUL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK        0x00000000UL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED    0x00000000UL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT     0x00000001UL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED      0x00000001UL

 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK      0x00007C2BUL

 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK         (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK << 0)

 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED     (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED << 0)

 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT      (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT << 0)

 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED       (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED << 0)

 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK       (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK << 0)

 /* Bit fields for MSC CMD */

 #define _MSC_CMD_RESETVALUE                               0x00000000UL

 #define _MSC_CMD_MASK                                     0x00000003UL

 #define MSC_CMD_PWRUP                                     (0x1UL << 0)

 #define _MSC_CMD_PWRUP_SHIFT                              0

 #define _MSC_CMD_PWRUP_MASK                               0x1UL

 #define _MSC_CMD_PWRUP_DEFAULT                            0x00000000UL

 #define MSC_CMD_PWRUP_DEFAULT                             (_MSC_CMD_PWRUP_DEFAULT << 0)

 #define MSC_CMD_SWITCHINGBANK                             (0x1UL << 1)

 #define _MSC_CMD_SWITCHINGBANK_SHIFT                      1

 #define _MSC_CMD_SWITCHINGBANK_MASK                       0x2UL

 #define _MSC_CMD_SWITCHINGBANK_DEFAULT                    0x00000000UL

 #define MSC_CMD_SWITCHINGBANK_DEFAULT                     (_MSC_CMD_SWITCHINGBANK_DEFAULT << 1)

 /* Bit fields for MSC BOOTLOADERCTRL */

 #define _MSC_BOOTLOADERCTRL_RESETVALUE                    0x00000000UL

 #define _MSC_BOOTLOADERCTRL_MASK                          0x00000003UL

 #define MSC_BOOTLOADERCTRL_BLRDIS                         (0x1UL << 0)

 #define _MSC_BOOTLOADERCTRL_BLRDIS_SHIFT                  0

 #define _MSC_BOOTLOADERCTRL_BLRDIS_MASK                   0x1UL

 #define _MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT                0x00000000UL

 #define MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT                 (_MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT << 0)

 #define MSC_BOOTLOADERCTRL_BLWDIS                         (0x1UL << 1)

 #define _MSC_BOOTLOADERCTRL_BLWDIS_SHIFT                  1

 #define _MSC_BOOTLOADERCTRL_BLWDIS_MASK                   0x2UL

 #define _MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT                0x00000000UL

 #define MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT                 (_MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT << 1)

 /* Bit fields for MSC AAPUNLOCKCMD */

 #define _MSC_AAPUNLOCKCMD_RESETVALUE                      0x00000000UL

 #define _MSC_AAPUNLOCKCMD_MASK                            0x00000001UL

 #define MSC_AAPUNLOCKCMD_UNLOCKAAP                        (0x1UL << 0)

 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_SHIFT                 0

 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_MASK                  0x1UL

 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT               0x00000000UL

 #define MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT                (_MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT << 0)

 /* Bit fields for MSC CACHECONFIG0 */

 #define _MSC_CACHECONFIG0_RESETVALUE                      0x00000003UL

 #define _MSC_CACHECONFIG0_MASK                            0x00000003UL

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_SHIFT              0

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_MASK               0x3UL

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_BASE               0x00000000UL

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED           0x00000001UL

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT            0x00000003UL

 #define _MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY        0x00000003UL

 #define MSC_CACHECONFIG0_CACHELPLEVEL_BASE                (_MSC_CACHECONFIG0_CACHELPLEVEL_BASE << 0)

 #define MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED            (_MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED << 0)

 #define MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT             (_MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT << 0)

 #define MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY         (_MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY << 0)

 /* Bit fields for MSC RAMCTRL */

 #define _MSC_RAMCTRL_RESETVALUE                           0x00000000UL

 #define _MSC_RAMCTRL_MASK                                 0x00090101UL

 #define MSC_RAMCTRL_RAMCACHEEN                            (0x1UL << 0)

 #define _MSC_RAMCTRL_RAMCACHEEN_SHIFT                     0

 #define _MSC_RAMCTRL_RAMCACHEEN_MASK                      0x1UL

 #define _MSC_RAMCTRL_RAMCACHEEN_DEFAULT                   0x00000000UL

 #define MSC_RAMCTRL_RAMCACHEEN_DEFAULT                    (_MSC_RAMCTRL_RAMCACHEEN_DEFAULT << 0)

 #define MSC_RAMCTRL_RAM1CACHEEN                           (0x1UL << 8)

 #define _MSC_RAMCTRL_RAM1CACHEEN_SHIFT                    8

 #define _MSC_RAMCTRL_RAM1CACHEEN_MASK                     0x100UL

 #define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT                  0x00000000UL

 #define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT                   (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8)

 #define MSC_RAMCTRL_RAM2CACHEEN                           (0x1UL << 16)

 #define _MSC_RAMCTRL_RAM2CACHEEN_SHIFT                    16

 #define _MSC_RAMCTRL_RAM2CACHEEN_MASK                     0x10000UL

 #define _MSC_RAMCTRL_RAM2CACHEEN_DEFAULT                  0x00000000UL

 #define MSC_RAMCTRL_RAM2CACHEEN_DEFAULT                   (_MSC_RAMCTRL_RAM2CACHEEN_DEFAULT << 16)

 #define MSC_RAMCTRL_RAMSEQCACHEEN                         (0x1UL << 19)

 #define _MSC_RAMCTRL_RAMSEQCACHEEN_SHIFT                  19

 #define _MSC_RAMCTRL_RAMSEQCACHEEN_MASK                   0x80000UL

 #define _MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT                0x00000000UL

 #define MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT                 (_MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT << 19)

MSC_TypeDef::MASSLOCK
__IOM uint32_t MASSLOCK
Definition: efm32pg12b_msc.h:63

MSC_TypeDef::AAPUNLOCKCMD
__IOM uint32_t AAPUNLOCKCMD
Definition: efm32pg12b_msc.h:74

MSC_TypeDef::CACHEHITS
__IM uint32_t CACHEHITS
Definition: efm32pg12b_msc.h:59

MSC_TypeDef::BOOTLOADERCTRL
__IOM uint32_t BOOTLOADERCTRL
Definition: efm32pg12b_msc.h:73

MSC_TypeDef::LOCK
__IOM uint32_t LOCK
Definition: efm32pg12b_msc.h:57

MSC_TypeDef::BANKSWITCHLOCK
__IOM uint32_t BANKSWITCHLOCK
Definition: efm32pg12b_msc.h:69

MSC_TypeDef::CACHECONFIG0
__IOM uint32_t CACHECONFIG0
Definition: efm32pg12b_msc.h:75

MSC_TypeDef::IEN
__IOM uint32_t IEN
Definition: efm32pg12b_msc.h:56

MSC_TypeDef::RAMCTRL
__IOM uint32_t RAMCTRL
Definition: efm32pg12b_msc.h:78

MSC_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efm32pg12b_msc.h:50

MSC_TypeDef::WDATA
__IOM uint32_t WDATA
Definition: efm32pg12b_msc.h:49

MSC_TypeDef::READCTRL
__IOM uint32_t READCTRL
Definition: efm32pg12b_msc.h:44

MSC_TypeDef::IFC
__IOM uint32_t IFC
Definition: efm32pg12b_msc.h:55

MSC_TypeDef::STARTUP
__IOM uint32_t STARTUP
Definition: efm32pg12b_msc.h:66

MSC_TypeDef::ADDRB
__IOM uint32_t ADDRB
Definition: efm32pg12b_msc.h:47

MSC_TypeDef::CACHEMISSES
__IM uint32_t CACHEMISSES
Definition: efm32pg12b_msc.h:60

MSC_TypeDef::IFS
__IOM uint32_t IFS
Definition: efm32pg12b_msc.h:54

MSC_TypeDef::WRITECTRL
__IOM uint32_t WRITECTRL
Definition: efm32pg12b_msc.h:45

MSC_TypeDef
Definition: efm32pg12b_msc.h:41

MSC_TypeDef::CACHECMD
__IOM uint32_t CACHECMD
Definition: efm32pg12b_msc.h:58

MSC_TypeDef::CMD
__IOM uint32_t CMD
Definition: efm32pg12b_msc.h:70

MSC_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32pg12b_msc.h:43

MSC_TypeDef::IF
__IM uint32_t IF
Definition: efm32pg12b_msc.h:53

MSC_TypeDef::WRITECMD
__IOM uint32_t WRITECMD
Definition: efm32pg12b_msc.h:46