|
EFM32 Jade Gecko 12 Software Documentation
efm32jg12-doc-5.1.2
|
|
EFM32 Jade Gecko 12 Software Documentation
efm32jg12-doc-5.1.2
|
Macros | |
| #define | DMAREQ_ADC0_SCAN ((8 << 16) + 1) |
| #define | DMAREQ_ADC0_SINGLE ((8 << 16) + 0) |
| #define | DMAREQ_CRYPTO0_DATA0RD ((49 << 16) + 2) |
| #define | DMAREQ_CRYPTO0_DATA0WR ((49 << 16) + 0) |
| #define | DMAREQ_CRYPTO0_DATA0XWR ((49 << 16) + 1) |
| #define | DMAREQ_CRYPTO0_DATA1RD ((49 << 16) + 4) |
| #define | DMAREQ_CRYPTO0_DATA1WR ((49 << 16) + 3) |
| #define | DMAREQ_CRYPTO1_DATA0RD ((52 << 16) + 2) |
| #define | DMAREQ_CRYPTO1_DATA0WR ((52 << 16) + 0) |
| #define | DMAREQ_CRYPTO1_DATA0XWR ((52 << 16) + 1) |
| #define | DMAREQ_CRYPTO1_DATA1RD ((52 << 16) + 4) |
| #define | DMAREQ_CRYPTO1_DATA1WR ((52 << 16) + 3) |
| #define | DMAREQ_CRYPTO_DATA0RD DMAREQ_CRYPTO0_DATA0RD |
| #define | DMAREQ_CRYPTO_DATA0WR DMAREQ_CRYPTO0_DATA0WR |
| #define | DMAREQ_CRYPTO_DATA0XWR DMAREQ_CRYPTO0_DATA0XWR |
| #define | DMAREQ_CRYPTO_DATA1RD DMAREQ_CRYPTO0_DATA1RD |
| #define | DMAREQ_CRYPTO_DATA1WR DMAREQ_CRYPTO0_DATA1WR |
| #define | DMAREQ_CSEN_BSLN ((50 << 16) + 1) |
| #define | DMAREQ_CSEN_DATA ((50 << 16) + 0) |
| #define | DMAREQ_I2C0_RXDATAV ((20 << 16) + 0) |
| #define | DMAREQ_I2C0_TXBL ((20 << 16) + 1) |
| #define | DMAREQ_I2C1_RXDATAV ((21 << 16) + 0) |
| #define | DMAREQ_I2C1_TXBL ((21 << 16) + 1) |
| #define | DMAREQ_LESENSE_BUFDATAV ((51 << 16) + 0) |
| #define | DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0) |
| #define | DMAREQ_LEUART0_TXBL ((16 << 16) + 1) |
| #define | DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2) |
| #define | DMAREQ_MSC_WDATA ((48 << 16) + 0) |
| #define | DMAREQ_PRS_REQ0 ((1 << 16) + 0) |
| #define | DMAREQ_PRS_REQ1 ((1 << 16) + 1) |
| #define | DMAREQ_TIMER0_CC0 ((24 << 16) + 1) |
| #define | DMAREQ_TIMER0_CC1 ((24 << 16) + 2) |
| #define | DMAREQ_TIMER0_CC2 ((24 << 16) + 3) |
| #define | DMAREQ_TIMER0_UFOF ((24 << 16) + 0) |
| #define | DMAREQ_TIMER1_CC0 ((25 << 16) + 1) |
| #define | DMAREQ_TIMER1_CC1 ((25 << 16) + 2) |
| #define | DMAREQ_TIMER1_CC2 ((25 << 16) + 3) |
| #define | DMAREQ_TIMER1_CC3 ((25 << 16) + 4) |
| #define | DMAREQ_TIMER1_UFOF ((25 << 16) + 0) |
| #define | DMAREQ_USART0_RXDATAV ((12 << 16) + 0) |
| #define | DMAREQ_USART0_TXBL ((12 << 16) + 1) |
| #define | DMAREQ_USART0_TXEMPTY ((12 << 16) + 2) |
| #define | DMAREQ_USART1_RXDATAV ((13 << 16) + 0) |
| #define | DMAREQ_USART1_RXDATAVRIGHT ((13 << 16) + 3) |
| #define | DMAREQ_USART1_TXBL ((13 << 16) + 1) |
| #define | DMAREQ_USART1_TXBLRIGHT ((13 << 16) + 4) |
| #define | DMAREQ_USART1_TXEMPTY ((13 << 16) + 2) |
| #define | DMAREQ_USART2_RXDATAV ((14 << 16) + 0) |
| #define | DMAREQ_USART2_TXBL ((14 << 16) + 1) |
| #define | DMAREQ_USART2_TXEMPTY ((14 << 16) + 2) |
| #define | DMAREQ_USART3_RXDATAV ((15 << 16) + 0) |
| #define | DMAREQ_USART3_RXDATAVRIGHT ((15 << 16) + 3) |
| #define | DMAREQ_USART3_TXBL ((15 << 16) + 1) |
| #define | DMAREQ_USART3_TXBLRIGHT ((15 << 16) + 4) |
| #define | DMAREQ_USART3_TXEMPTY ((15 << 16) + 2) |
| #define | DMAREQ_VDAC0_CH0 ((10 << 16) + 0) |
| #define | DMAREQ_VDAC0_CH1 ((10 << 16) + 1) |
| #define | DMAREQ_WTIMER0_CC0 ((26 << 16) + 1) |
| #define | DMAREQ_WTIMER0_CC1 ((26 << 16) + 2) |
| #define | DMAREQ_WTIMER0_CC2 ((26 << 16) + 3) |
| #define | DMAREQ_WTIMER0_UFOF ((26 << 16) + 0) |
| #define | DMAREQ_WTIMER1_CC0 ((27 << 16) + 1) |
| #define | DMAREQ_WTIMER1_CC1 ((27 << 16) + 2) |
| #define | DMAREQ_WTIMER1_CC2 ((27 << 16) + 3) |
| #define | DMAREQ_WTIMER1_CC3 ((27 << 16) + 4) |
| #define | DMAREQ_WTIMER1_UFOF ((27 << 16) + 0) |
| #define DMAREQ_ADC0_SCAN ((8 << 16) + 1) |
DMA channel select for ADC0_SCAN
Definition at line 44 of file efm32jg12b_dmareq.h.
| #define DMAREQ_ADC0_SINGLE ((8 << 16) + 0) |
DMA channel select for ADC0_SINGLE
Definition at line 43 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO0_DATA0RD ((49 << 16) + 2) |
DMA channel select for CRYPTO0_DATA0RD
Definition at line 93 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO0_DATA0WR ((49 << 16) + 0) |
DMA channel select for CRYPTO0_DATA0WR
Definition at line 89 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO0_DATA0XWR ((49 << 16) + 1) |
DMA channel select for CRYPTO0_DATA0XWR
Definition at line 91 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO0_DATA1RD ((49 << 16) + 4) |
DMA channel select for CRYPTO0_DATA1RD
Definition at line 97 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO0_DATA1WR ((49 << 16) + 3) |
DMA channel select for CRYPTO0_DATA1WR
Definition at line 95 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO1_DATA0RD ((52 << 16) + 2) |
DMA channel select for CRYPTO1_DATA0RD
Definition at line 104 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO1_DATA0WR ((52 << 16) + 0) |
DMA channel select for CRYPTO1_DATA0WR
Definition at line 102 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO1_DATA0XWR ((52 << 16) + 1) |
DMA channel select for CRYPTO1_DATA0XWR
Definition at line 103 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO1_DATA1RD ((52 << 16) + 4) |
DMA channel select for CRYPTO1_DATA1RD
Definition at line 106 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO1_DATA1WR ((52 << 16) + 3) |
DMA channel select for CRYPTO1_DATA1WR
Definition at line 105 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO_DATA0RD DMAREQ_CRYPTO0_DATA0RD |
Alias for DMAREQ_CRYPTO0_DATA0RD
Definition at line 94 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO_DATA0WR DMAREQ_CRYPTO0_DATA0WR |
Alias for DMAREQ_CRYPTO0_DATA0WR
Definition at line 90 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO_DATA0XWR DMAREQ_CRYPTO0_DATA0XWR |
Alias for DMAREQ_CRYPTO0_DATA0XWR
Definition at line 92 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO_DATA1RD DMAREQ_CRYPTO0_DATA1RD |
Alias for DMAREQ_CRYPTO0_DATA1RD
Definition at line 98 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CRYPTO_DATA1WR DMAREQ_CRYPTO0_DATA1WR |
Alias for DMAREQ_CRYPTO0_DATA1WR
Definition at line 96 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CSEN_BSLN ((50 << 16) + 1) |
DMA channel select for CSEN_BSLN
Definition at line 100 of file efm32jg12b_dmareq.h.
| #define DMAREQ_CSEN_DATA ((50 << 16) + 0) |
DMA channel select for CSEN_DATA
Definition at line 99 of file efm32jg12b_dmareq.h.
| #define DMAREQ_I2C0_RXDATAV ((20 << 16) + 0) |
DMA channel select for I2C0_RXDATAV
Definition at line 66 of file efm32jg12b_dmareq.h.
| #define DMAREQ_I2C0_TXBL ((20 << 16) + 1) |
DMA channel select for I2C0_TXBL
Definition at line 67 of file efm32jg12b_dmareq.h.
| #define DMAREQ_I2C1_RXDATAV ((21 << 16) + 0) |
DMA channel select for I2C1_RXDATAV
Definition at line 68 of file efm32jg12b_dmareq.h.
| #define DMAREQ_I2C1_TXBL ((21 << 16) + 1) |
DMA channel select for I2C1_TXBL
Definition at line 69 of file efm32jg12b_dmareq.h.
| #define DMAREQ_LESENSE_BUFDATAV ((51 << 16) + 0) |
DMA channel select for LESENSE_BUFDATAV
Definition at line 101 of file efm32jg12b_dmareq.h.
| #define DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0) |
DMA channel select for LEUART0_RXDATAV
Definition at line 63 of file efm32jg12b_dmareq.h.
| #define DMAREQ_LEUART0_TXBL ((16 << 16) + 1) |
DMA channel select for LEUART0_TXBL
Definition at line 64 of file efm32jg12b_dmareq.h.
| #define DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2) |
DMA channel select for LEUART0_TXEMPTY
Definition at line 65 of file efm32jg12b_dmareq.h.
| #define DMAREQ_MSC_WDATA ((48 << 16) + 0) |
DMA channel select for MSC_WDATA
Definition at line 88 of file efm32jg12b_dmareq.h.
| #define DMAREQ_PRS_REQ0 ((1 << 16) + 0) |
DMA channel select for PRS_REQ0
Definition at line 41 of file efm32jg12b_dmareq.h.
| #define DMAREQ_PRS_REQ1 ((1 << 16) + 1) |
DMA channel select for PRS_REQ1
Definition at line 42 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER0_CC0 ((24 << 16) + 1) |
DMA channel select for TIMER0_CC0
Definition at line 71 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER0_CC1 ((24 << 16) + 2) |
DMA channel select for TIMER0_CC1
Definition at line 72 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER0_CC2 ((24 << 16) + 3) |
DMA channel select for TIMER0_CC2
Definition at line 73 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER0_UFOF ((24 << 16) + 0) |
DMA channel select for TIMER0_UFOF
Definition at line 70 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER1_CC0 ((25 << 16) + 1) |
DMA channel select for TIMER1_CC0
Definition at line 75 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER1_CC1 ((25 << 16) + 2) |
DMA channel select for TIMER1_CC1
Definition at line 76 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER1_CC2 ((25 << 16) + 3) |
DMA channel select for TIMER1_CC2
Definition at line 77 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER1_CC3 ((25 << 16) + 4) |
DMA channel select for TIMER1_CC3
Definition at line 78 of file efm32jg12b_dmareq.h.
| #define DMAREQ_TIMER1_UFOF ((25 << 16) + 0) |
DMA channel select for TIMER1_UFOF
Definition at line 74 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART0_RXDATAV ((12 << 16) + 0) |
DMA channel select for USART0_RXDATAV
Definition at line 47 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART0_TXBL ((12 << 16) + 1) |
DMA channel select for USART0_TXBL
Definition at line 48 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART0_TXEMPTY ((12 << 16) + 2) |
DMA channel select for USART0_TXEMPTY
Definition at line 49 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART1_RXDATAV ((13 << 16) + 0) |
DMA channel select for USART1_RXDATAV
Definition at line 50 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART1_RXDATAVRIGHT ((13 << 16) + 3) |
DMA channel select for USART1_RXDATAVRIGHT
Definition at line 53 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART1_TXBL ((13 << 16) + 1) |
DMA channel select for USART1_TXBL
Definition at line 51 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART1_TXBLRIGHT ((13 << 16) + 4) |
DMA channel select for USART1_TXBLRIGHT
Definition at line 54 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART1_TXEMPTY ((13 << 16) + 2) |
DMA channel select for USART1_TXEMPTY
Definition at line 52 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART2_RXDATAV ((14 << 16) + 0) |
DMA channel select for USART2_RXDATAV
Definition at line 55 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART2_TXBL ((14 << 16) + 1) |
DMA channel select for USART2_TXBL
Definition at line 56 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART2_TXEMPTY ((14 << 16) + 2) |
DMA channel select for USART2_TXEMPTY
Definition at line 57 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART3_RXDATAV ((15 << 16) + 0) |
DMA channel select for USART3_RXDATAV
Definition at line 58 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART3_RXDATAVRIGHT ((15 << 16) + 3) |
DMA channel select for USART3_RXDATAVRIGHT
Definition at line 61 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART3_TXBL ((15 << 16) + 1) |
DMA channel select for USART3_TXBL
Definition at line 59 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART3_TXBLRIGHT ((15 << 16) + 4) |
DMA channel select for USART3_TXBLRIGHT
Definition at line 62 of file efm32jg12b_dmareq.h.
| #define DMAREQ_USART3_TXEMPTY ((15 << 16) + 2) |
DMA channel select for USART3_TXEMPTY
Definition at line 60 of file efm32jg12b_dmareq.h.
| #define DMAREQ_VDAC0_CH0 ((10 << 16) + 0) |
DMA channel select for VDAC0_CH0
Definition at line 45 of file efm32jg12b_dmareq.h.
| #define DMAREQ_VDAC0_CH1 ((10 << 16) + 1) |
DMA channel select for VDAC0_CH1
Definition at line 46 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER0_CC0 ((26 << 16) + 1) |
DMA channel select for WTIMER0_CC0
Definition at line 80 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER0_CC1 ((26 << 16) + 2) |
DMA channel select for WTIMER0_CC1
Definition at line 81 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER0_CC2 ((26 << 16) + 3) |
DMA channel select for WTIMER0_CC2
Definition at line 82 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER0_UFOF ((26 << 16) + 0) |
DMA channel select for WTIMER0_UFOF
Definition at line 79 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER1_CC0 ((27 << 16) + 1) |
DMA channel select for WTIMER1_CC0
Definition at line 84 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER1_CC1 ((27 << 16) + 2) |
DMA channel select for WTIMER1_CC1
Definition at line 85 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER1_CC2 ((27 << 16) + 3) |
DMA channel select for WTIMER1_CC2
Definition at line 86 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER1_CC3 ((27 << 16) + 4) |
DMA channel select for WTIMER1_CC3
Definition at line 87 of file efm32jg12b_dmareq.h.
| #define DMAREQ_WTIMER1_UFOF ((27 << 16) + 0) |
DMA channel select for WTIMER1_UFOF
Definition at line 83 of file efm32jg12b_dmareq.h.
1.8.10 
