EFM32 Jade Gecko 12 Software Documentation  efm32jg12-doc-5.1.2
em_ldma.h
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1 /***************************************************************************/
33 #ifndef EM_LDMA_H
34 #define EM_LDMA_H
35 
36 #include "em_device.h"
37 
38 #if defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
39 
40 #include <stdbool.h>
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 
47 /***************************************************************************/
52 /***************************************************************************/
127 /*******************************************************************************
128  ******************************** ENUMS ************************************
129  ******************************************************************************/
130 
135 typedef enum
136 {
137  ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1,
138  ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2,
139  ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3,
140  ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4,
141  ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6,
142  ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8,
143  ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16,
144  ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32,
145  ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64,
146  ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128,
147  ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256,
148  ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512,
149  ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024,
150  ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL
151 } LDMA_CtrlBlockSize_t;
152 
154 typedef enum
155 {
156  ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER,
157  ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE,
158  ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE
159 } LDMA_CtrlStructType_t;
160 
162 typedef enum
163 {
164  ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK,
165  ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL
166 } LDMA_CtrlReqMode_t;
167 
169 typedef enum
170 {
171  ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE,
172  ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO,
173  ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR,
174  ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE
175 } LDMA_CtrlSrcInc_t;
176 
178 typedef enum
179 {
180  ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE,
181  ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD,
182  ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD
183 } LDMA_CtrlSize_t;
184 
186 typedef enum
187 {
188  ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE,
189  ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO,
190  ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR,
191  ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE
192 } LDMA_CtrlDstInc_t;
193 
195 typedef enum
196 {
197  ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE,
198  ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE
199 } LDMA_CtrlSrcAddrMode_t;
200 
202 typedef enum
203 {
204  ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE,
205  ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE
206 } LDMA_CtrlDstAddrMode_t;
207 
209 typedef enum
210 {
211  ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE,
212  ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE
213 } LDMA_LinkMode_t;
214 
216 typedef enum
217 {
218  ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE,
219  ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO,
220  ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR,
221  ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT
222 } LDMA_CfgArbSlots_t;
223 
225 typedef enum
226 {
227  ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE,
228  ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
229 } LDMA_CfgSrcIncSign_t;
230 
232 typedef enum
233 {
234  ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE,
235  ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
236 } LDMA_CfgDstIncSign_t;
237 
239 typedef enum
240 {
241  ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE,
242  #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SCAN)
243  ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0,
244  #endif
245  #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE)
246  ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0,
247  #endif
248  #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD )
249  ldmaPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
250  #endif
251  #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR )
252  ldmaPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
253  #endif
254  #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR )
255  ldmaPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
256  #endif
257  #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD )
258  ldmaPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
259  #endif
260  #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR )
261  ldmaPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
262  #endif
263  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD)
264  ldmaPeripheralSignal_CRYPTO0_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0,
265  #endif
266  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR)
267  ldmaPeripheralSignal_CRYPTO0_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0,
268  #endif
269  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR)
270  ldmaPeripheralSignal_CRYPTO0_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0,
271  #endif
272  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD)
273  ldmaPeripheralSignal_CRYPTO0_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0,
274  #endif
275  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR)
276  ldmaPeripheralSignal_CRYPTO0_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0,
277  #endif
278  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD)
279  ldmaPeripheralSignal_CRYPTO1_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1,
280  #endif
281  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR)
282  ldmaPeripheralSignal_CRYPTO1_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1,
283  #endif
284  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR)
285  ldmaPeripheralSignal_CRYPTO1_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1,
286  #endif
287  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD)
288  ldmaPeripheralSignal_CRYPTO1_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1,
289  #endif
290  #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR)
291  ldmaPeripheralSignal_CRYPTO1_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1,
292  #endif
293  #if defined(LDMA_CH_REQSEL_SIGSEL_CSENBSLN)
294  ldmaPeripheralSignal_CSEN_BSLN = LDMA_CH_REQSEL_SIGSEL_CSENBSLN | LDMA_CH_REQSEL_SOURCESEL_CSEN,
295  #endif
296  #if defined(LDMA_CH_REQSEL_SIGSEL_CSENDATA)
297  ldmaPeripheralSignal_CSEN_DATA = LDMA_CH_REQSEL_SIGSEL_CSENDATA | LDMA_CH_REQSEL_SOURCESEL_CSEN,
298  #endif
299  #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV)
300  ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0,
301  #endif
302  #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0TXBL)
303  ldmaPeripheralSignal_I2C0_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C0TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C0,
304  #endif
305  #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV)
306  ldmaPeripheralSignal_I2C1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C1,
307  #endif
308  #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1TXBL)
309  ldmaPeripheralSignal_I2C1_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C1TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C1,
310  #endif
311  #if defined(LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV)
312  ldmaPeripheralSignal_LESENSE_BUFDATAV = LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV | LDMA_CH_REQSEL_SOURCESEL_LESENSE,
313  #endif
314  #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV)
315  ldmaPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
316  #endif
317  #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL)
318  ldmaPeripheralSignal_LEUART0_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
319  #endif
320  #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY)
321  ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
322  #endif
323  #if defined(LDMA_CH_REQSEL_SIGSEL_MSCWDATA)
324  ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC,
325  #endif
326  #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ0)
327  ldmaPeripheralSignal_PRS_REQ0 = LDMA_CH_REQSEL_SIGSEL_PRSREQ0 | LDMA_CH_REQSEL_SOURCESEL_PRS,
328  #endif
329  #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ1)
330  ldmaPeripheralSignal_PRS_REQ1 = LDMA_CH_REQSEL_SIGSEL_PRSREQ1 | LDMA_CH_REQSEL_SOURCESEL_PRS,
331  #endif
332  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC0)
333  ldmaPeripheralSignal_TIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
334  #endif
335  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC1)
336  ldmaPeripheralSignal_TIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
337  #endif
338  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC2)
339  ldmaPeripheralSignal_TIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
340  #endif
341  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF)
342  ldmaPeripheralSignal_TIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
343  #endif
344  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC0)
345  ldmaPeripheralSignal_TIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
346  #endif
347  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC1)
348  ldmaPeripheralSignal_TIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
349  #endif
350  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC2)
351  ldmaPeripheralSignal_TIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
352  #endif
353  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC3)
354  ldmaPeripheralSignal_TIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
355  #endif
356  #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF)
357  ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
358  #endif
359  #if defined(LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV)
360  ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0,
361  #endif
362  #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXBL)
363  ldmaPeripheralSignal_USART0_TXBL = LDMA_CH_REQSEL_SIGSEL_USART0TXBL | LDMA_CH_REQSEL_SOURCESEL_USART0,
364  #endif
365  #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY)
366  ldmaPeripheralSignal_USART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART0,
367  #endif
368  #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV)
369  ldmaPeripheralSignal_USART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART1,
370  #endif
371  #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT)
372  ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1,
373  #endif
374  #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBL)
375  ldmaPeripheralSignal_USART1_TXBL = LDMA_CH_REQSEL_SIGSEL_USART1TXBL | LDMA_CH_REQSEL_SOURCESEL_USART1,
376  #endif
377  #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT)
378  ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1,
379  #endif
380  #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY)
381  ldmaPeripheralSignal_USART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART1,
382  #endif
383  #if defined(LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV)
384  ldmaPeripheralSignal_USART2_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART2,
385  #endif
386  #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXBL)
387  ldmaPeripheralSignal_USART2_TXBL = LDMA_CH_REQSEL_SIGSEL_USART2TXBL | LDMA_CH_REQSEL_SOURCESEL_USART2,
388  #endif
389  #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY)
390  ldmaPeripheralSignal_USART2_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART2,
391  #endif
392  #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV)
393  ldmaPeripheralSignal_USART3_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART3,
394  #endif
395  #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT)
396  ldmaPeripheralSignal_USART3_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3,
397  #endif
398  #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBL)
399  ldmaPeripheralSignal_USART3_TXBL = LDMA_CH_REQSEL_SIGSEL_USART3TXBL | LDMA_CH_REQSEL_SOURCESEL_USART3,
400  #endif
401  #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT)
402  ldmaPeripheralSignal_USART3_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3,
403  #endif
404  #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY)
405  ldmaPeripheralSignal_USART3_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART3,
406  #endif
407  #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH0)
408  ldmaPeripheralSignal_VDAC0_CH0 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 | LDMA_CH_REQSEL_SOURCESEL_VDAC0,
409  #endif
410  #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH1)
411  ldmaPeripheralSignal_VDAC0_CH1 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 | LDMA_CH_REQSEL_SOURCESEL_VDAC0,
412  #endif
413  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0)
414  ldmaPeripheralSignal_WTIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0,
415  #endif
416  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1)
417  ldmaPeripheralSignal_WTIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0,
418  #endif
419  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2)
420  ldmaPeripheralSignal_WTIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0,
421  #endif
422  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF)
423  ldmaPeripheralSignal_WTIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER0,
424  #endif
425  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0)
426  ldmaPeripheralSignal_WTIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1,
427  #endif
428  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1)
429  ldmaPeripheralSignal_WTIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1,
430  #endif
431  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2)
432  ldmaPeripheralSignal_WTIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1,
433  #endif
434  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3)
435  ldmaPeripheralSignal_WTIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1,
436  #endif
437  #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF)
438  ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1
439  #endif
440 } LDMA_PeripheralSignal_t;
441 
442 
443 /*******************************************************************************
444  ******************************* STRUCTS ***********************************
445  ******************************************************************************/
446 
456 typedef union
457 {
462  struct
463  {
464  uint32_t structType : 2;
465  uint32_t reserved0 : 1;
466  uint32_t structReq : 1;
467  uint32_t xferCnt : 11;
468  uint32_t byteSwap : 1;
469  uint32_t blockSize : 4;
470  uint32_t doneIfs : 1;
471  uint32_t reqMode : 1;
472  uint32_t decLoopCnt : 1;
473  uint32_t ignoreSrec : 1;
474  uint32_t srcInc : 2;
475  uint32_t size : 2;
476  uint32_t dstInc : 2;
477  uint32_t srcAddrMode: 1;
478  uint32_t dstAddrMode: 1;
480  uint32_t srcAddr;
481  uint32_t dstAddr;
483  uint32_t linkMode : 1;
484  uint32_t link : 1;
485  int32_t linkAddr : 30;
486  } xfer;
487 
491  struct
492  {
493  uint32_t structType : 2;
494  uint32_t reserved0 : 1;
495  uint32_t structReq : 1;
496  uint32_t xferCnt : 11;
497  uint32_t byteSwap : 1;
498  uint32_t blockSize : 4;
499  uint32_t doneIfs : 1;
500  uint32_t reqMode : 1;
501  uint32_t decLoopCnt : 1;
502  uint32_t ignoreSrec : 1;
503  uint32_t srcInc : 2;
504  uint32_t size : 2;
505  uint32_t dstInc : 2;
506  uint32_t srcAddrMode: 1;
507  uint32_t dstAddrMode: 1;
509  uint32_t syncSet : 8;
510  uint32_t syncClr : 8;
511  uint32_t reserved3 : 16;
512  uint32_t matchVal : 8;
513  uint32_t matchEn : 8;
514  uint32_t reserved4 : 16;
515 
516  uint32_t linkMode : 1;
517  uint32_t link : 1;
518  int32_t linkAddr : 30;
519  } sync;
520 
522  struct
523  {
524  uint32_t structType : 2;
525  uint32_t reserved0 : 1;
526  uint32_t structReq : 1;
527  uint32_t xferCnt : 11;
528  uint32_t byteSwap : 1;
529  uint32_t blockSize : 4;
530  uint32_t doneIfs : 1;
531  uint32_t reqMode : 1;
532  uint32_t decLoopCnt : 1;
533  uint32_t ignoreSrec : 1;
534  uint32_t srcInc : 2;
535  uint32_t size : 2;
536  uint32_t dstInc : 2;
537  uint32_t srcAddrMode: 1;
538  uint32_t dstAddrMode: 1;
540  uint32_t immVal;
541  uint32_t dstAddr;
543  uint32_t linkMode : 1;
544  uint32_t link : 1;
545  int32_t linkAddr : 30;
546  } wri;
547 } LDMA_Descriptor_t;
548 
550 typedef struct
551 {
552  uint8_t ldmaInitCtrlNumFixed;
553  uint8_t ldmaInitCtrlSyncPrsClrEn;
554  uint8_t ldmaInitCtrlSyncPrsSetEn;
555  uint8_t ldmaInitIrqPriority;
556 } LDMA_Init_t;
557 
564 typedef struct
565 {
566  uint32_t ldmaReqSel;
567  uint8_t ldmaCtrlSyncPrsClrOff;
568  uint8_t ldmaCtrlSyncPrsClrOn;
569  uint8_t ldmaCtrlSyncPrsSetOff;
570  uint8_t ldmaCtrlSyncPrsSetOn;
571  bool ldmaReqDis;
572  bool ldmaDbgHalt;
573  uint8_t ldmaCfgArbSlots;
574  uint8_t ldmaCfgSrcIncSign;
575  uint8_t ldmaCfgDstIncSign;
576  uint8_t ldmaLoopCnt;
577 } LDMA_TransferCfg_t;
578 
579 
580 /*******************************************************************************
581  ************************** STRUCT INITIALIZERS ****************************
582  ******************************************************************************/
583 
584 
586 #define LDMA_INIT_DEFAULT \
587 { \
588  .ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT, /* Fixed priority arbitration. */ \
589  .ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
590  .ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
591  .ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
592 }
593 
598 #define LDMA_TRANSFER_CFG_MEMORY() \
599 { \
600  0, 0, 0, 0, 0, \
601  false, false, ldmaCfgArbSlotsAs1, \
602  ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
603 }
604 
609 #define LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt) \
610 { \
611  0, 0, 0, 0, 0, \
612  false, false, ldmaCfgArbSlotsAs1, \
613  ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
614  loopCnt \
615 }
616 
621 #define LDMA_TRANSFER_CFG_PERIPHERAL(signal) \
622 { \
623  signal, 0, 0, 0, 0, \
624  false, false, ldmaCfgArbSlotsAs1, \
625  ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
626 }
627 
632 #define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) \
633 { \
634  signal, 0, 0, 0, 0, \
635  false, false, ldmaCfgArbSlotsAs1, \
636  ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
637 }
638 
646 #define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) \
647 { \
648  .xfer = \
649  { \
650  .structType = ldmaCtrlStructTypeXfer, \
651  .structReq = 1, \
652  .xferCnt = ( count ) - 1, \
653  .byteSwap = 0, \
654  .blockSize = ldmaCtrlBlockSizeUnit1, \
655  .doneIfs = 1, \
656  .reqMode = ldmaCtrlReqModeAll, \
657  .decLoopCnt = 0, \
658  .ignoreSrec = 0, \
659  .srcInc = ldmaCtrlSrcIncOne, \
660  .size = ldmaCtrlSizeWord, \
661  .dstInc = ldmaCtrlDstIncOne, \
662  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
663  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
664  .srcAddr = (uint32_t)(src), \
665  .dstAddr = (uint32_t)(dest), \
666  .linkMode = 0, \
667  .link = 0, \
668  .linkAddr = 0 \
669  } \
670 }
671 
679 #define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) \
680 { \
681  .xfer = \
682  { \
683  .structType = ldmaCtrlStructTypeXfer, \
684  .structReq = 1, \
685  .xferCnt = ( count ) - 1, \
686  .byteSwap = 0, \
687  .blockSize = ldmaCtrlBlockSizeUnit1, \
688  .doneIfs = 1, \
689  .reqMode = ldmaCtrlReqModeAll, \
690  .decLoopCnt = 0, \
691  .ignoreSrec = 0, \
692  .srcInc = ldmaCtrlSrcIncOne, \
693  .size = ldmaCtrlSizeHalf, \
694  .dstInc = ldmaCtrlDstIncOne, \
695  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
696  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
697  .srcAddr = (uint32_t)(src), \
698  .dstAddr = (uint32_t)(dest), \
699  .linkMode = 0, \
700  .link = 0, \
701  .linkAddr = 0 \
702  } \
703 }
704 
712 #define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) \
713 { \
714  .xfer = \
715  { \
716  .structType = ldmaCtrlStructTypeXfer, \
717  .structReq = 1, \
718  .xferCnt = (count) - 1, \
719  .byteSwap = 0, \
720  .blockSize = ldmaCtrlBlockSizeUnit1, \
721  .doneIfs = 1, \
722  .reqMode = ldmaCtrlReqModeAll, \
723  .decLoopCnt = 0, \
724  .ignoreSrec = 0, \
725  .srcInc = ldmaCtrlSrcIncOne, \
726  .size = ldmaCtrlSizeByte, \
727  .dstInc = ldmaCtrlDstIncOne, \
728  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
729  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
730  .srcAddr = (uint32_t)(src), \
731  .dstAddr = (uint32_t)(dest), \
732  .linkMode = 0, \
733  .link = 0, \
734  .linkAddr = 0 \
735  } \
736 }
737 
750 #define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) \
751 { \
752  .xfer = \
753  { \
754  .structType = ldmaCtrlStructTypeXfer, \
755  .structReq = 1, \
756  .xferCnt = (count) - 1, \
757  .byteSwap = 0, \
758  .blockSize = ldmaCtrlBlockSizeUnit1, \
759  .doneIfs = 0, \
760  .reqMode = ldmaCtrlReqModeAll, \
761  .decLoopCnt = 0, \
762  .ignoreSrec = 0, \
763  .srcInc = ldmaCtrlSrcIncOne, \
764  .size = ldmaCtrlSizeWord, \
765  .dstInc = ldmaCtrlDstIncOne, \
766  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
767  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
768  .srcAddr = (uint32_t)(src), \
769  .dstAddr = (uint32_t)(dest), \
770  .linkMode = ldmaLinkModeAbs, \
771  .link = 1, \
772  .linkAddr = 0 /* Must be set runtime ! */ \
773  } \
774 }
775 
788 #define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) \
789 { \
790  .xfer = \
791  { \
792  .structType = ldmaCtrlStructTypeXfer, \
793  .structReq = 1, \
794  .xferCnt = (count) - 1, \
795  .byteSwap = 0, \
796  .blockSize = ldmaCtrlBlockSizeUnit1, \
797  .doneIfs = 0, \
798  .reqMode = ldmaCtrlReqModeAll, \
799  .decLoopCnt = 0, \
800  .ignoreSrec = 0, \
801  .srcInc = ldmaCtrlSrcIncOne, \
802  .size = ldmaCtrlSizeHalf, \
803  .dstInc = ldmaCtrlDstIncOne, \
804  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
805  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
806  .srcAddr = (uint32_t)(src), \
807  .dstAddr = (uint32_t)(dest), \
808  .linkMode = ldmaLinkModeAbs, \
809  .link = 1, \
810  .linkAddr = 0 /* Must be set runtime ! */ \
811  } \
812 }
813 
826 #define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) \
827 { \
828  .xfer = \
829  { \
830  .structType = ldmaCtrlStructTypeXfer, \
831  .structReq = 1, \
832  .xferCnt = (count) - 1, \
833  .byteSwap = 0, \
834  .blockSize = ldmaCtrlBlockSizeUnit1, \
835  .doneIfs = 0, \
836  .reqMode = ldmaCtrlReqModeAll, \
837  .decLoopCnt = 0, \
838  .ignoreSrec = 0, \
839  .srcInc = ldmaCtrlSrcIncOne, \
840  .size = ldmaCtrlSizeByte, \
841  .dstInc = ldmaCtrlDstIncOne, \
842  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
843  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
844  .srcAddr = (uint32_t)(src), \
845  .dstAddr = (uint32_t)(dest), \
846  .linkMode = ldmaLinkModeAbs, \
847  .link = 1, \
848  .linkAddr = 0 /* Must be set runtime ! */ \
849  } \
850 }
851 
870 #define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) \
871 { \
872  .xfer = \
873  { \
874  .structType = ldmaCtrlStructTypeXfer, \
875  .structReq = 1, \
876  .xferCnt = (count) - 1, \
877  .byteSwap = 0, \
878  .blockSize = ldmaCtrlBlockSizeUnit1, \
879  .doneIfs = 0, \
880  .reqMode = ldmaCtrlReqModeAll, \
881  .decLoopCnt = 0, \
882  .ignoreSrec = 0, \
883  .srcInc = ldmaCtrlSrcIncOne, \
884  .size = ldmaCtrlSizeWord, \
885  .dstInc = ldmaCtrlDstIncOne, \
886  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
887  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
888  .srcAddr = (uint32_t)(src), \
889  .dstAddr = (uint32_t)(dest), \
890  .linkMode = ldmaLinkModeRel, \
891  .link = 1, \
892  .linkAddr = (linkjmp) * 4 \
893  } \
894 }
895 
914 #define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) \
915 { \
916  .xfer = \
917  { \
918  .structType = ldmaCtrlStructTypeXfer, \
919  .structReq = 1, \
920  .xferCnt = (count) - 1, \
921  .byteSwap = 0, \
922  .blockSize = ldmaCtrlBlockSizeUnit1, \
923  .doneIfs = 0, \
924  .reqMode = ldmaCtrlReqModeAll, \
925  .decLoopCnt = 0, \
926  .ignoreSrec = 0, \
927  .srcInc = ldmaCtrlSrcIncOne, \
928  .size = ldmaCtrlSizeHalf, \
929  .dstInc = ldmaCtrlDstIncOne, \
930  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
931  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
932  .srcAddr = (uint32_t)(src), \
933  .dstAddr = (uint32_t)(dest), \
934  .linkMode = ldmaLinkModeRel, \
935  .link = 1, \
936  .linkAddr = (linkjmp) * 4 \
937  } \
938 }
939 
958 #define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) \
959 { \
960  .xfer = \
961  { \
962  .structType = ldmaCtrlStructTypeXfer, \
963  .structReq = 1, \
964  .xferCnt = (count) - 1, \
965  .byteSwap = 0, \
966  .blockSize = ldmaCtrlBlockSizeUnit1, \
967  .doneIfs = 0, \
968  .reqMode = ldmaCtrlReqModeAll, \
969  .decLoopCnt = 0, \
970  .ignoreSrec = 0, \
971  .srcInc = ldmaCtrlSrcIncOne, \
972  .size = ldmaCtrlSizeByte, \
973  .dstInc = ldmaCtrlDstIncOne, \
974  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
975  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
976  .srcAddr = (uint32_t)(src), \
977  .dstAddr = (uint32_t)(dest), \
978  .linkMode = ldmaLinkModeRel, \
979  .link = 1, \
980  .linkAddr = (linkjmp) * 4 \
981  } \
982 }
983 
991 #define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) \
992 { \
993  .xfer = \
994  { \
995  .structType = ldmaCtrlStructTypeXfer, \
996  .structReq = 0, \
997  .xferCnt = (count) - 1, \
998  .byteSwap = 0, \
999  .blockSize = ldmaCtrlBlockSizeUnit1, \
1000  .doneIfs = 1, \
1001  .reqMode = ldmaCtrlReqModeBlock, \
1002  .decLoopCnt = 0, \
1003  .ignoreSrec = 0, \
1004  .srcInc = ldmaCtrlSrcIncNone, \
1005  .size = ldmaCtrlSizeByte, \
1006  .dstInc = ldmaCtrlDstIncOne, \
1007  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
1008  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
1009  .srcAddr = (uint32_t)(src), \
1010  .dstAddr = (uint32_t)(dest), \
1011  .linkMode = 0, \
1012  .link = 0, \
1013  .linkAddr = 0 \
1014  } \
1015 }
1016 
1024 #define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) \
1025 { \
1026  .xfer = \
1027  { \
1028  .structType = ldmaCtrlStructTypeXfer, \
1029  .structReq = 0, \
1030  .xferCnt = (count) - 1, \
1031  .byteSwap = 0, \
1032  .blockSize = ldmaCtrlBlockSizeUnit1, \
1033  .doneIfs = 1, \
1034  .reqMode = ldmaCtrlReqModeBlock, \
1035  .decLoopCnt = 0, \
1036  .ignoreSrec = 0, \
1037  .srcInc = ldmaCtrlSrcIncNone, \
1038  .size = ldmaCtrlSizeByte, \
1039  .dstInc = ldmaCtrlDstIncNone, \
1040  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
1041  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
1042  .srcAddr = (uint32_t)(src), \
1043  .dstAddr = (uint32_t)(dest), \
1044  .linkMode = 0, \
1045  .link = 0, \
1046  .linkAddr = 0 \
1047  } \
1048 }
1049 
1057 #define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) \
1058 { \
1059  .xfer = \
1060  { \
1061  .structType = ldmaCtrlStructTypeXfer, \
1062  .structReq = 0, \
1063  .xferCnt = (count) - 1, \
1064  .byteSwap = 0, \
1065  .blockSize = ldmaCtrlBlockSizeUnit1, \
1066  .doneIfs = 1, \
1067  .reqMode = ldmaCtrlReqModeBlock, \
1068  .decLoopCnt = 0, \
1069  .ignoreSrec = 0, \
1070  .srcInc = ldmaCtrlSrcIncOne, \
1071  .size = ldmaCtrlSizeByte, \
1072  .dstInc = ldmaCtrlDstIncNone, \
1073  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
1074  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
1075  .srcAddr = (uint32_t)(src), \
1076  .dstAddr = (uint32_t)(dest), \
1077  .linkMode = 0, \
1078  .link = 0, \
1079  .linkAddr = 0 \
1080  } \
1081 }
1082 
1095 #define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) \
1096 { \
1097  .xfer = \
1098  { \
1099  .structType = ldmaCtrlStructTypeXfer, \
1100  .structReq = 0, \
1101  .xferCnt = (count) - 1, \
1102  .byteSwap = 0, \
1103  .blockSize = ldmaCtrlBlockSizeUnit1, \
1104  .doneIfs = 1, \
1105  .reqMode = ldmaCtrlReqModeBlock, \
1106  .decLoopCnt = 0, \
1107  .ignoreSrec = 0, \
1108  .srcInc = ldmaCtrlSrcIncNone, \
1109  .size = ldmaCtrlSizeByte, \
1110  .dstInc = ldmaCtrlDstIncOne, \
1111  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
1112  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
1113  .srcAddr = (uint32_t)(src), \
1114  .dstAddr = (uint32_t)(dest), \
1115  .linkMode = ldmaLinkModeRel, \
1116  .link = 1, \
1117  .linkAddr = (linkjmp) * 4 \
1118  } \
1119 }
1120 
1133 #define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) \
1134 { \
1135  .xfer = \
1136  { \
1137  .structType = ldmaCtrlStructTypeXfer, \
1138  .structReq = 0, \
1139  .xferCnt = (count) - 1, \
1140  .byteSwap = 0, \
1141  .blockSize = ldmaCtrlBlockSizeUnit1, \
1142  .doneIfs = 1, \
1143  .reqMode = ldmaCtrlReqModeBlock, \
1144  .decLoopCnt = 0, \
1145  .ignoreSrec = 0, \
1146  .srcInc = ldmaCtrlSrcIncOne, \
1147  .size = ldmaCtrlSizeByte, \
1148  .dstInc = ldmaCtrlDstIncNone, \
1149  .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
1150  .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
1151  .srcAddr = (uint32_t)(src), \
1152  .dstAddr = (uint32_t)(dest), \
1153  .linkMode = ldmaLinkModeRel, \
1154  .link = 1, \
1155  .linkAddr = (linkjmp) * 4 \
1156  } \
1157 }
1158 
1165 #define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) \
1166 { \
1167  .wri = \
1168  { \
1169  .structType = ldmaCtrlStructTypeWrite, \
1170  .structReq = 1, \
1171  .xferCnt = 0, \
1172  .byteSwap = 0, \
1173  .blockSize = 0, \
1174  .doneIfs = 1, \
1175  .reqMode = 0, \
1176  .decLoopCnt = 0, \
1177  .ignoreSrec = 0, \
1178  .srcInc = 0, \
1179  .size = 0, \
1180  .dstInc = 0, \
1181  .srcAddrMode = 0, \
1182  .dstAddrMode = 0, \
1183  .immVal = (value), \
1184  .dstAddr = (uint32_t)(address), \
1185  .linkMode = 0, \
1186  .link = 0, \
1187  .linkAddr = 0 \
1188  } \
1189 }
1190 
1202 #define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) \
1203 { \
1204  .wri = \
1205  { \
1206  .structType = ldmaCtrlStructTypeWrite, \
1207  .structReq = 1, \
1208  .xferCnt = 0, \
1209  .byteSwap = 0, \
1210  .blockSize = 0, \
1211  .doneIfs = 0, \
1212  .reqMode = 0, \
1213  .decLoopCnt = 0, \
1214  .ignoreSrec = 0, \
1215  .srcInc = 0, \
1216  .size = 0, \
1217  .dstInc = 0, \
1218  .srcAddrMode = 0, \
1219  .dstAddrMode = 0, \
1220  .immVal = (value), \
1221  .dstAddr = (uint32_t)(address), \
1222  .linkMode = ldmaLinkModeAbs, \
1223  .link = 1, \
1224  .linkAddr = 0 /* Must be set runtime ! */ \
1225  } \
1226 }
1227 
1239 #define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) \
1240 { \
1241  .wri = \
1242  { \
1243  .structType = ldmaCtrlStructTypeWrite, \
1244  .structReq = 1, \
1245  .xferCnt = 0, \
1246  .byteSwap = 0, \
1247  .blockSize = 0, \
1248  .doneIfs = 0, \
1249  .reqMode = 0, \
1250  .decLoopCnt = 0, \
1251  .ignoreSrec = 0, \
1252  .srcInc = 0, \
1253  .size = 0, \
1254  .dstInc = 0, \
1255  .srcAddrMode = 0, \
1256  .dstAddrMode = 0, \
1257  .immVal = (value), \
1258  .dstAddr = (uint32_t)(address), \
1259  .linkMode = ldmaLinkModeRel, \
1260  .link = 1, \
1261  .linkAddr = (linkjmp) * 4 \
1262  } \
1263 }
1264 
1273 #define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) \
1274 { \
1275  .sync = \
1276  { \
1277  .structType = ldmaCtrlStructTypeSync, \
1278  .structReq = 1, \
1279  .xferCnt = 0, \
1280  .byteSwap = 0, \
1281  .blockSize = 0, \
1282  .doneIfs = 1, \
1283  .reqMode = 0, \
1284  .decLoopCnt = 0, \
1285  .ignoreSrec = 0, \
1286  .srcInc = 0, \
1287  .size = 0, \
1288  .dstInc = 0, \
1289  .srcAddrMode = 0, \
1290  .dstAddrMode = 0, \
1291  .syncSet = (set), \
1292  .syncClr = (clr), \
1293  .matchVal = (matchValue), \
1294  .matchEn = (matchEnable), \
1295  .linkMode = 0, \
1296  .link = 0, \
1297  .linkAddr = 0 \
1298  } \
1299 }
1300 
1314 #define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) \
1315 { \
1316  .sync = \
1317  { \
1318  .structType = ldmaCtrlStructTypeSync, \
1319  .structReq = 1, \
1320  .xferCnt = 0, \
1321  .byteSwap = 0, \
1322  .blockSize = 0, \
1323  .doneIfs = 0, \
1324  .reqMode = 0, \
1325  .decLoopCnt = 0, \
1326  .ignoreSrec = 0, \
1327  .srcInc = 0, \
1328  .size = 0, \
1329  .dstInc = 0, \
1330  .srcAddrMode = 0, \
1331  .dstAddrMode = 0, \
1332  .syncSet = (set), \
1333  .syncClr = (clr), \
1334  .matchVal = (matchValue), \
1335  .matchEn = (matchEnable), \
1336  .linkMode = ldmaLinkModeAbs, \
1337  .link = 1, \
1338  .linkAddr = 0 /* Must be set runtime ! */ \
1339  } \
1340 }
1341 
1355 #define LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp) \
1356 { \
1357  .sync = \
1358  { \
1359  .structType = ldmaCtrlStructTypeSync, \
1360  .structReq = 1, \
1361  .xferCnt = 0, \
1362  .byteSwap = 0, \
1363  .blockSize = 0, \
1364  .doneIfs = 0, \
1365  .reqMode = 0, \
1366  .decLoopCnt = 0, \
1367  .ignoreSrec = 0, \
1368  .srcInc = 0, \
1369  .size = 0, \
1370  .dstInc = 0, \
1371  .srcAddrMode = 0, \
1372  .dstAddrMode = 0, \
1373  .syncSet = (set), \
1374  .syncClr = (clr), \
1375  .matchVal = (matchValue), \
1376  .matchEn = (matchEnable), \
1377  .linkMode = ldmaLinkModeRel, \
1378  .link = 1, \
1379  .linkAddr = (linkjmp) * 4 \
1380  } \
1381 }
1382 
1383 /*******************************************************************************
1384  ***************************** PROTOTYPES **********************************
1385  ******************************************************************************/
1386 
1387 void LDMA_DeInit(void);
1388 void LDMA_EnableChannelRequest(int ch, bool enable);
1389 void LDMA_Init(const LDMA_Init_t *init);
1390 void LDMA_StartTransfer(int ch,
1391  const LDMA_TransferCfg_t *transfer,
1392  const LDMA_Descriptor_t *descriptor);
1393 void LDMA_StopTransfer(int ch);
1394 bool LDMA_TransferDone(int ch);
1395 uint32_t LDMA_TransferRemainingCount(int ch);
1396 
1397 
1398 /***************************************************************************/
1407 __STATIC_INLINE void LDMA_IntClear(uint32_t flags)
1408 {
1409  LDMA->IFC = flags;
1410 }
1411 
1412 
1413 /***************************************************************************/
1422 __STATIC_INLINE void LDMA_IntDisable(uint32_t flags)
1423 {
1424  LDMA->IEN &= ~flags;
1425 }
1426 
1427 
1428 /***************************************************************************/
1442 __STATIC_INLINE void LDMA_IntEnable(uint32_t flags)
1443 {
1444  LDMA->IEN |= flags;
1445 }
1446 
1447 
1448 /***************************************************************************/
1460 __STATIC_INLINE uint32_t LDMA_IntGet(void)
1461 {
1462  return LDMA->IF;
1463 }
1464 
1465 
1466 /***************************************************************************/
1480 __STATIC_INLINE uint32_t LDMA_IntGetEnabled(void)
1481 {
1482  uint32_t ien;
1483 
1484  ien = LDMA->IEN;
1485  return LDMA->IF & ien;
1486 }
1487 
1488 
1489 /***************************************************************************/
1498 __STATIC_INLINE void LDMA_IntSet(uint32_t flags)
1499 {
1500  LDMA->IFS = flags;
1501 }
1502 
1506 #ifdef __cplusplus
1507 }
1508 #endif
1509 
1510 #endif /* defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 ) */
1511 #endif /* EM_LDMA_H */
LDMA_TransferCfg_t::ldmaCfgArbSlots
uint8_t ldmaCfgArbSlots
Definition: em_ldma.h:573
ldmaPeripheralSignal_TIMER1_CC2
Trig on TIMER1_CC2.
Definition: em_ldma.h:351
LDMA_TransferCfg_t
DMA transfer configuration structure.
Definition: em_ldma.h:564
LDMA_CH_REQSEL_SOURCESEL_WTIMER0
#define LDMA_CH_REQSEL_SOURCESEL_WTIMER0
Definition: efm32jg12b_ldma.h:417
LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT
#define LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT
Definition: efm32jg12b_ldma.h:376
ldmaCtrlSrcAddrModeRel
Definition: em_ldma.h:198
LDMA_CH_REQSEL_SOURCESEL_TIMER1
#define LDMA_CH_REQSEL_SOURCESEL_TIMER1
Definition: efm32jg12b_ldma.h:416
LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOn
uint8_t ldmaCtrlSyncPrsSetOn
Definition: em_ldma.h:570
ldmaPeripheralSignal_ADC0_SINGLE
Trig on ADC0_SINGLE.
Definition: em_ldma.h:246
LDMA_Init_t::ldmaInitCtrlSyncPrsSetEn
uint8_t ldmaInitCtrlSyncPrsSetEn
Definition: em_ldma.h:554
LDMA_CfgDstIncSign_t
LDMA_CfgDstIncSign_t
Definition: em_ldma.h:232
ldmaPeripheralSignal_WTIMER0_CC2
Trig on WTIMER0_CC2.
Definition: em_ldma.h:420
ldmaPeripheralSignal_WTIMER1_CC0
Trig on WTIMER1_CC0.
Definition: em_ldma.h:426
LDMA_CH_REQSEL_SOURCESEL_CRYPTO0
#define LDMA_CH_REQSEL_SOURCESEL_CRYPTO0
Definition: efm32jg12b_ldma.h:420
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaPeripheralSignal_WTIMER1_UFOF
Trig on WTIMER1_UFOF.
Definition: em_ldma.h:438
ldmaPeripheralSignal_USART0_TXBL
Trig on USART0_TXBL.
Definition: em_ldma.h:363
LDMA_TransferRemainingCount
uint32_t LDMA_TransferRemainingCount(int ch)
Get number of items remaining in a transfer.
Definition: em_ldma.c:338
LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV
#define LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV
Definition: efm32jg12b_ldma.h:337
LDMA_CH_REQSEL_SOURCESEL_LEUART0
#define LDMA_CH_REQSEL_SOURCESEL_LEUART0
Definition: efm32jg12b_ldma.h:412
LDMA_TransferCfg_t::ldmaReqSel
uint32_t ldmaReqSel
Definition: em_ldma.h:566
LDMA_IntGetEnabled
__STATIC_INLINE uint32_t LDMA_IntGetEnabled(void)
Get enabled and pending LDMA interrupt flags. Useful for handling more interrupt sources in the same ...
Definition: em_ldma.h:1480
_LDMA_CH_CTRL_DSTINC_FOUR
#define _LDMA_CH_CTRL_DSTINC_FOUR
Definition: efm32jg12b_ldma.h:577
LDMA_CH_REQSEL_SOURCESEL_WTIMER1
#define LDMA_CH_REQSEL_SOURCESEL_WTIMER1
Definition: efm32jg12b_ldma.h:418
_LDMA_CH_CTRL_REQMODE_BLOCK
#define _LDMA_CH_CTRL_REQMODE_BLOCK
Definition: efm32jg12b_ldma.h:535
LDMA_Init
void LDMA_Init(const LDMA_Init_t *init)
Initialize the LDMA controller.
Definition: em_ldma.c:137
LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF
#define LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF
Definition: efm32jg12b_ldma.h:333
ldmaPeripheralSignal_USART3_TXBLRIGHT
Trig on USART3_TXBLRIGHT.
Definition: em_ldma.h:402
ldmaPeripheralSignal_WTIMER0_CC0
Trig on WTIMER0_CC0.
Definition: em_ldma.h:414
ldmaPeripheralSignal_USART0_RXDATAV
Trig on USART0_RXDATAV.
Definition: em_ldma.h:360
LDMA_CH_REQSEL_SIGSEL_USART1TXBL
#define LDMA_CH_REQSEL_SIGSEL_USART1TXBL
Definition: efm32jg12b_ldma.h:343
LDMA_CH_REQSEL_SIGSEL_CSENBSLN
#define LDMA_CH_REQSEL_SIGSEL_CSENBSLN
Definition: efm32jg12b_ldma.h:354
LDMA_CH_REQSEL_SIGSEL_I2C0TXBL
#define LDMA_CH_REQSEL_SIGSEL_I2C0TXBL
Definition: efm32jg12b_ldma.h:347
_LDMA_CH_CFG_DSTINCSIGN_POSITIVE
#define _LDMA_CH_CFG_DSTINCSIGN_POSITIVE
Definition: efm32jg12b_ldma.h:453
LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR
Definition: efm32jg12b_ldma.h:335
LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT
#define LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT
Definition: efm32jg12b_ldma.h:368
LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2
#define LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2
Definition: efm32jg12b_ldma.h:372
LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY
#define LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY
Definition: efm32jg12b_ldma.h:357
LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF
#define LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF
Definition: efm32jg12b_ldma.h:331
LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY
#define LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY
Definition: efm32jg12b_ldma.h:360
ldmaPeripheralSignal_TIMER0_CC1
Trig on TIMER0_CC1.
Definition: em_ldma.h:336
_LDMA_CH_CTRL_DSTINC_NONE
#define _LDMA_CH_CTRL_DSTINC_NONE
Definition: efm32jg12b_ldma.h:578
ldmaCtrlBlockSizeAll
Definition: em_ldma.h:150
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
_LDMA_CH_CTRL_BLOCKSIZE_UNIT64
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT64
Definition: efm32jg12b_ldma.h:505
LDMA_CH_REQSEL_SIGSEL_TIMER1CC1
#define LDMA_CH_REQSEL_SIGSEL_TIMER1CC1
Definition: efm32jg12b_ldma.h:362
LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE
#define LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE
Definition: efm32jg12b_ldma.h:321
LDMA_CH_REQSEL_SIGSEL_TIMER1CC2
#define LDMA_CH_REQSEL_SIGSEL_TIMER1CC2
Definition: efm32jg12b_ldma.h:370
LDMA_CH_REQSEL_SIGSEL_PRSREQ1
#define LDMA_CH_REQSEL_SIGSEL_PRSREQ1
Definition: efm32jg12b_ldma.h:339
_LDMA_CH_CTRL_BLOCKSIZE_UNIT6
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT6
Definition: efm32jg12b_ldma.h:501
ldmaPeripheralSignal_TIMER0_UFOF
Trig on TIMER0_UFOF.
Definition: em_ldma.h:342
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaPeripheralSignal_CSEN_DATA
Trig on CSEN_DATA.
Definition: em_ldma.h:297
_LDMA_CH_CTRL_BLOCKSIZE_UNIT16
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT16
Definition: efm32jg12b_ldma.h:503
_LDMA_CH_CTRL_DSTMODE_ABSOLUTE
#define _LDMA_CH_CTRL_DSTMODE_ABSOLUTE
Definition: efm32jg12b_ldma.h:597
ldmaCfgArbSlotsAs2
Definition: em_ldma.h:219
LDMA_CH_REQSEL_SOURCESEL_USART1
#define LDMA_CH_REQSEL_SOURCESEL_USART1
Definition: efm32jg12b_ldma.h:409
ldmaCtrlStructTypeSync
Definition: em_ldma.h:157
LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOn
uint8_t ldmaCtrlSyncPrsClrOn
Definition: em_ldma.h:568
LDMA_CH_REQSEL_SIGSEL_VDAC0CH0
#define LDMA_CH_REQSEL_SIGSEL_VDAC0CH0
Definition: efm32jg12b_ldma.h:322
LDMA_PeripheralSignal_t
LDMA_PeripheralSignal_t
Definition: em_ldma.h:239
em_device.h
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
LDMA_CH_REQSEL_SOURCESEL_USART2
#define LDMA_CH_REQSEL_SOURCESEL_USART2
Definition: efm32jg12b_ldma.h:410
_LDMA_CH_CTRL_BLOCKSIZE_UNIT3
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT3
Definition: efm32jg12b_ldma.h:499
ldmaCtrlBlockSizeUnit512
Definition: em_ldma.h:148
ldmaCtrlBlockSizeUnit16
Definition: em_ldma.h:143
LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD
Definition: efm32jg12b_ldma.h:365
LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR
Definition: efm32jg12b_ldma.h:355
ldmaPeripheralSignal_LEUART0_TXEMPTY
Trig on LEUART0_TXEMPTY.
Definition: em_ldma.h:321
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
_LDMA_CH_CTRL_BLOCKSIZE_UNIT2
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT2
Definition: efm32jg12b_ldma.h:498
_LDMA_CH_CTRL_STRUCTTYPE_TRANSFER
#define _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER
Definition: efm32jg12b_ldma.h:473
ldmaPeripheralSignal_USART0_TXEMPTY
Trig on USART0_TXEMPTY.
Definition: em_ldma.h:366
LDMA_CH_REQSEL_SOURCESEL_USART0
#define LDMA_CH_REQSEL_SOURCESEL_USART0
Definition: efm32jg12b_ldma.h:408
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
LDMA_CH_REQSEL_SIGSEL_PRSREQ0
#define LDMA_CH_REQSEL_SIGSEL_PRSREQ0
Definition: efm32jg12b_ldma.h:320
LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV
Definition: efm32jg12b_ldma.h:329
ldmaPeripheralSignal_CRYPTO0_DATA1RD
Trig on CRYPTO0_DATA1RD.
Definition: em_ldma.h:273
_LDMA_CH_CTRL_BLOCKSIZE_UNIT128
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT128
Definition: efm32jg12b_ldma.h:506
LDMA_StartTransfer
void LDMA_StartTransfer(int ch, const LDMA_TransferCfg_t *transfer, const LDMA_Descriptor_t *descriptor)
Start a DMA transfer.
Definition: em_ldma.c:183
LDMA_CH_REQSEL_SOURCESEL_CSEN
#define LDMA_CH_REQSEL_SOURCESEL_CSEN
Definition: efm32jg12b_ldma.h:421
ldmaPeripheralSignal_MSC_WDATA
Trig on MSC_WDATA.
Definition: em_ldma.h:324
ldmaPeripheralSignal_I2C1_TXBL
Trig on I2C1_TXBL.
Definition: em_ldma.h:309
LDMA_CH_REQSEL_SIGSEL_TIMER1CC3
#define LDMA_CH_REQSEL_SIGSEL_TIMER1CC3
Definition: efm32jg12b_ldma.h:377
ldmaCtrlDstAddrModeRel
Definition: em_ldma.h:205
ldmaCtrlDstIncFour
Definition: em_ldma.h:190
ldmaPeripheralSignal_LESENSE_BUFDATAV
Trig on LESENSE_BUFDATAV.
Definition: em_ldma.h:312
LDMA_TransferCfg_t::ldmaCfgDstIncSign
uint8_t ldmaCfgDstIncSign
Definition: em_ldma.h:575
ldmaPeripheralSignal_WTIMER0_UFOF
Trig on WTIMER0_UFOF.
Definition: em_ldma.h:423
_LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
#define _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
Definition: efm32jg12b_ldma.h:445
LDMA_CH_REQSEL_SOURCESEL_VDAC0
#define LDMA_CH_REQSEL_SOURCESEL_VDAC0
Definition: efm32jg12b_ldma.h:407
ldmaPeripheralSignal_NONE
No peripheral selected for DMA triggering.
Definition: em_ldma.h:241
LDMA_CH_REQSEL_SIGSEL_TIMER0CC0
#define LDMA_CH_REQSEL_SIGSEL_TIMER0CC0
Definition: efm32jg12b_ldma.h:349
_LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
#define _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
Definition: efm32jg12b_ldma.h:454
LDMA_CtrlSrcAddrMode_t
LDMA_CtrlSrcAddrMode_t
Definition: em_ldma.h:195
ldmaCtrlBlockSizeUnit32
Definition: em_ldma.h:144
LDMA_Descriptor_t::immVal
uint32_t immVal
Definition: em_ldma.h:540
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
LDMA_StopTransfer
void LDMA_StopTransfer(int ch)
Stop a DMA transfer.
Definition: em_ldma.c:284
LDMA_LinkMode_t
LDMA_LinkMode_t
Definition: em_ldma.h:209
LDMA_TransferCfg_t::ldmaDbgHalt
bool ldmaDbgHalt
Definition: em_ldma.h:572
_LDMA_CH_CTRL_BLOCKSIZE_UNIT8
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT8
Definition: efm32jg12b_ldma.h:502
_LDMA_CH_CTRL_SRCINC_TWO
#define _LDMA_CH_CTRL_SRCINC_TWO
Definition: efm32jg12b_ldma.h:554
ldmaPeripheralSignal_TIMER0_CC0
Trig on TIMER0_CC0.
Definition: em_ldma.h:333
ldmaPeripheralSignal_USART3_TXBL
Trig on USART3_TXBL.
Definition: em_ldma.h:399
ldmaPeripheralSignal_CRYPTO1_DATA1RD
Trig on CRYPTO1_DATA1RD.
Definition: em_ldma.h:288
_LDMA_CH_CTRL_SRCINC_FOUR
#define _LDMA_CH_CTRL_SRCINC_FOUR
Definition: efm32jg12b_ldma.h:555
_LDMA_CH_CFG_SRCINCSIGN_POSITIVE
#define _LDMA_CH_CFG_SRCINCSIGN_POSITIVE
Definition: efm32jg12b_ldma.h:444
LDMA_CH_REQSEL_SIGSEL_VDAC0CH1
#define LDMA_CH_REQSEL_SIGSEL_VDAC0CH1
Definition: efm32jg12b_ldma.h:341
ldmaCtrlBlockSizeUnit256
Definition: em_ldma.h:147
LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV
Definition: efm32jg12b_ldma.h:326
_LDMA_CH_CTRL_DSTINC_TWO
#define _LDMA_CH_CTRL_DSTINC_TWO
Definition: efm32jg12b_ldma.h:576
_LDMA_CH_CFG_ARBSLOTS_FOUR
#define _LDMA_CH_CFG_ARBSLOTS_FOUR
Definition: efm32jg12b_ldma.h:433
ldmaCfgArbSlotsAs1
Definition: em_ldma.h:218
LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF
#define LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF
Definition: efm32jg12b_ldma.h:332
ldmaCtrlBlockSizeUnit64
Definition: em_ldma.h:145
ldmaPeripheralSignal_CSEN_BSLN
Trig on CSEN_BSLN.
Definition: em_ldma.h:294
LDMA_CfgSrcIncSign_t
LDMA_CfgSrcIncSign_t
Definition: em_ldma.h:225
ldmaCfgDstIncSignNeg
Definition: em_ldma.h:235
ldmaCfgDstIncSignPos
Definition: em_ldma.h:234
LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0
#define LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0
Definition: efm32jg12b_ldma.h:352
ldmaPeripheralSignal_USART3_TXEMPTY
Trig on USART3_TXEMPTY.
Definition: em_ldma.h:405
LDMA_Descriptor_t::dstAddr
uint32_t dstAddr
Definition: em_ldma.h:481
LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY
#define LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY
Definition: efm32jg12b_ldma.h:356
LDMA_DeInit
void LDMA_DeInit(void)
De-initialize the LDMA controller.
Definition: em_ldma.c:90
LDMA_CtrlDstInc_t
LDMA_CtrlDstInc_t
Definition: em_ldma.h:186
_LDMA_CH_CTRL_STRUCTTYPE_WRITE
#define _LDMA_CH_CTRL_STRUCTTYPE_WRITE
Definition: efm32jg12b_ldma.h:475
LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV
Definition: efm32jg12b_ldma.h:325
_LDMA_CH_CTRL_SRCMODE_RELATIVE
#define _LDMA_CH_CTRL_SRCMODE_RELATIVE
Definition: efm32jg12b_ldma.h:589
_LDMA_CH_CTRL_SIZE_BYTE
#define _LDMA_CH_CTRL_SIZE_BYTE
Definition: efm32jg12b_ldma.h:565
LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV
Definition: efm32jg12b_ldma.h:323
LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0
#define LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0
Definition: efm32jg12b_ldma.h:351
LDMA_CtrlBlockSize_t
LDMA_CtrlBlockSize_t
Definition: em_ldma.h:135
LDMA_TransferCfg_t::ldmaReqDis
bool ldmaReqDis
Definition: em_ldma.h:571
ldmaCtrlSrcIncFour
Definition: em_ldma.h:173
ldmaCfgSrcIncSignPos
Definition: em_ldma.h:227
LDMA_CH_REQSEL_SIGSEL_USART2TXBL
#define LDMA_CH_REQSEL_SIGSEL_USART2TXBL
Definition: efm32jg12b_ldma.h:344
LDMA
#define LDMA
Definition: efm32jg12b500f1024gl125.h:432
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaPeripheralSignal_PRS_REQ0
Trig on PRS_REQ0.
Definition: em_ldma.h:327
LDMA_Init_t::ldmaInitCtrlSyncPrsClrEn
uint8_t ldmaInitCtrlSyncPrsClrEn
Definition: em_ldma.h:553
ldmaPeripheralSignal_CRYPTO1_DATA1WR
Trig on CRYPTO1_DATA1WR.
Definition: em_ldma.h:291
ldmaPeripheralSignal_ADC0_SCAN
Trig on ADC0_SCAN.
Definition: em_ldma.h:243
LDMA_IntClear
__STATIC_INLINE void LDMA_IntClear(uint32_t flags)
Clear one or more pending LDMA interrupts.
Definition: em_ldma.h:1407
ldmaCtrlBlockSizeUnit3
Definition: em_ldma.h:139
LDMA_CtrlStructType_t
LDMA_CtrlStructType_t
Definition: em_ldma.h:154
ldmaPeripheralSignal_TIMER1_UFOF
Trig on TIMER1_UFOF.
Definition: em_ldma.h:357
ldmaPeripheralSignal_TIMER1_CC1
Trig on TIMER1_CC1.
Definition: em_ldma.h:348
LDMA_IntEnable
__STATIC_INLINE void LDMA_IntEnable(uint32_t flags)
Enable one or more LDMA interrupts.
Definition: em_ldma.h:1442
ldmaPeripheralSignal_WTIMER1_CC2
Trig on WTIMER1_CC2.
Definition: em_ldma.h:432
ldmaPeripheralSignal_CRYPTO1_DATA0XWR
Trig on CRYPTO1_DATA0XWR.
Definition: em_ldma.h:285
_LDMA_CH_CTRL_BLOCKSIZE_ALL
#define _LDMA_CH_CTRL_BLOCKSIZE_ALL
Definition: efm32jg12b_ldma.h:510
LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF
#define LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF
Definition: efm32jg12b_ldma.h:330
_LDMA_CH_CTRL_BLOCKSIZE_UNIT256
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT256
Definition: efm32jg12b_ldma.h:507
LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOff
uint8_t ldmaCtrlSyncPrsClrOff
Definition: em_ldma.h:567
LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL
#define LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL
Definition: efm32jg12b_ldma.h:346
ldmaPeripheralSignal_LEUART0_RXDATAV
Trig on LEUART0_RXDATAV.
Definition: em_ldma.h:315
_LDMA_CH_CFG_ARBSLOTS_ONE
#define _LDMA_CH_CFG_ARBSLOTS_ONE
Definition: efm32jg12b_ldma.h:431
LDMA_CtrlReqMode_t
LDMA_CtrlReqMode_t
Definition: em_ldma.h:162
LDMA_CH_REQSEL_SOURCESEL_TIMER0
#define LDMA_CH_REQSEL_SOURCESEL_TIMER0
Definition: efm32jg12b_ldma.h:415
LDMA_IntDisable
__STATIC_INLINE void LDMA_IntDisable(uint32_t flags)
Disable one or more LDMA interrupts.
Definition: em_ldma.h:1422
LDMA_CH_REQSEL_SOURCESEL_CRYPTO1
#define LDMA_CH_REQSEL_SOURCESEL_CRYPTO1
Definition: efm32jg12b_ldma.h:423
LDMA_IntSet
__STATIC_INLINE void LDMA_IntSet(uint32_t flags)
Set one or more pending LDMA interrupts.
Definition: em_ldma.h:1498
LDMA_CH_REQSEL_SOURCESEL_I2C0
#define LDMA_CH_REQSEL_SOURCESEL_I2C0
Definition: efm32jg12b_ldma.h:413
LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV
Definition: efm32jg12b_ldma.h:328
LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY
#define LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY
Definition: efm32jg12b_ldma.h:359
LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD
Definition: efm32jg12b_ldma.h:380
ldmaCtrlSizeWord
Definition: em_ldma.h:182
_LDMA_CH_CTRL_BLOCKSIZE_UNIT4
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT4
Definition: efm32jg12b_ldma.h:500
_LDMA_CH_CTRL_BLOCKSIZE_UNIT512
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT512
Definition: efm32jg12b_ldma.h:508
LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR
Definition: efm32jg12b_ldma.h:373
_LDMA_CH_CTRL_BLOCKSIZE_UNIT32
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT32
Definition: efm32jg12b_ldma.h:504
ldmaPeripheralSignal_USART1_RXDATAV
Trig on USART1_RXDATAV.
Definition: em_ldma.h:369
LDMA_TransferDone
bool LDMA_TransferDone(int ch)
Check if a DMA transfer has completed.
Definition: em_ldma.c:306
LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOff
uint8_t ldmaCtrlSyncPrsSetOff
Definition: em_ldma.h:569
ldmaPeripheralSignal_LEUART0_TXBL
Trig on LEUART0_TXBL.
Definition: em_ldma.h:318
_LDMA_CH_CTRL_SIZE_HALFWORD
#define _LDMA_CH_CTRL_SIZE_HALFWORD
Definition: efm32jg12b_ldma.h:566
_LDMA_CH_CTRL_REQMODE_ALL
#define _LDMA_CH_CTRL_REQMODE_ALL
Definition: efm32jg12b_ldma.h:536
ldmaPeripheralSignal_CRYPTO0_DATA0XWR
Trig on CRYPTO0_DATA0XWR.
Definition: em_ldma.h:270
ldmaPeripheralSignal_PRS_REQ1
Trig on PRS_REQ1.
Definition: em_ldma.h:330
LDMA_CH_REQSEL_SIGSEL_TIMER1CC0
#define LDMA_CH_REQSEL_SIGSEL_TIMER1CC0
Definition: efm32jg12b_ldma.h:350
LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3
#define LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3
Definition: efm32jg12b_ldma.h:378
LDMA_Descriptor_t
DMA descriptor.
Definition: em_ldma.h:456
ldmaCfgArbSlotsAs8
Definition: em_ldma.h:221
ldmaCtrlSizeHalf
Definition: em_ldma.h:181
_LDMA_CH_CTRL_BLOCKSIZE_UNIT1
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT1
Definition: efm32jg12b_ldma.h:497
ldmaPeripheralSignal_USART3_RXDATAV
Trig on USART3_RXDATAV.
Definition: em_ldma.h:393
LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT
#define LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT
Definition: efm32jg12b_ldma.h:375
_LDMA_CH_LINK_LINKMODE_ABSOLUTE
#define _LDMA_CH_LINK_LINKMODE_ABSOLUTE
Definition: efm32jg12b_ldma.h:626
_LDMA_CH_CFG_ARBSLOTS_TWO
#define _LDMA_CH_CFG_ARBSLOTS_TWO
Definition: efm32jg12b_ldma.h:432
LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV
Definition: efm32jg12b_ldma.h:327
_LDMA_CH_CTRL_DSTINC_ONE
#define _LDMA_CH_CTRL_DSTINC_ONE
Definition: efm32jg12b_ldma.h:575
ldmaPeripheralSignal_USART2_TXBL
Trig on USART2_TXBL.
Definition: em_ldma.h:387
LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1
#define LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1
Definition: efm32jg12b_ldma.h:364
_LDMA_CH_CTRL_SRCINC_NONE
#define _LDMA_CH_CTRL_SRCINC_NONE
Definition: efm32jg12b_ldma.h:556
LDMA_Init_t
LDMA initialization configuration structure.
Definition: em_ldma.h:550
LDMA_CH_REQSEL_SIGSEL_I2C1TXBL
#define LDMA_CH_REQSEL_SIGSEL_I2C1TXBL
Definition: efm32jg12b_ldma.h:348
ldmaPeripheralSignal_USART1_TXBL
Trig on USART1_TXBL.
Definition: em_ldma.h:375
_LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE
#define _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE
Definition: efm32jg12b_ldma.h:474
ldmaPeripheralSignal_WTIMER1_CC1
Trig on WTIMER1_CC1.
Definition: em_ldma.h:429
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
LDMA_CH_REQSEL_SOURCESEL_ADC0
#define LDMA_CH_REQSEL_SOURCESEL_ADC0
Definition: efm32jg12b_ldma.h:406
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
LDMA_Init_t::ldmaInitCtrlNumFixed
uint8_t ldmaInitCtrlNumFixed
Definition: em_ldma.h:552
ldmaPeripheralSignal_VDAC0_CH1
Trig on VDAC0_CH1.
Definition: em_ldma.h:411
LDMA_CH_REQSEL_SIGSEL_MSCWDATA
#define LDMA_CH_REQSEL_SIGSEL_MSCWDATA
Definition: efm32jg12b_ldma.h:334
ldmaPeripheralSignal_I2C0_RXDATAV
Trig on I2C0_RXDATAV.
Definition: em_ldma.h:300
_LDMA_CH_CTRL_SRCMODE_ABSOLUTE
#define _LDMA_CH_CTRL_SRCMODE_ABSOLUTE
Definition: efm32jg12b_ldma.h:588
LDMA_IntGet
__STATIC_INLINE uint32_t LDMA_IntGet(void)
Get pending LDMA interrupt flags.
Definition: em_ldma.h:1460
LDMA_Init_t::ldmaInitIrqPriority
uint8_t ldmaInitIrqPriority
Definition: em_ldma.h:555
ldmaPeripheralSignal_CRYPTO0_DATA0RD
Trig on CRYPTO0_DATA0RD.
Definition: em_ldma.h:264
ldmaPeripheralSignal_USART1_TXEMPTY
Trig on USART1_TXEMPTY.
Definition: em_ldma.h:381
ldmaPeripheralSignal_TIMER1_CC0
Trig on TIMER1_CC0.
Definition: em_ldma.h:345
_LDMA_CH_CTRL_SIZE_WORD
#define _LDMA_CH_CTRL_SIZE_WORD
Definition: efm32jg12b_ldma.h:567
LDMA_CH_REQSEL_SIGSEL_USART3TXBL
#define LDMA_CH_REQSEL_SIGSEL_USART3TXBL
Definition: efm32jg12b_ldma.h:345
ldmaPeripheralSignal_I2C1_RXDATAV
Trig on I2C1_RXDATAV.
Definition: em_ldma.h:306
ldmaCtrlStructTypeWrite
Definition: em_ldma.h:158
ldmaPeripheralSignal_CRYPTO1_DATA0WR
Trig on CRYPTO1_DATA0WR.
Definition: em_ldma.h:282
ldmaCfgSrcIncSignNeg
Definition: em_ldma.h:228
ldmaPeripheralSignal_WTIMER1_CC3
Trig on WTIMER1_CC3.
Definition: em_ldma.h:435
ldmaCtrlSrcIncNone
Definition: em_ldma.h:174
ldmaCtrlDstIncNone
Definition: em_ldma.h:191
ldmaCtrlSrcIncTwo
Definition: em_ldma.h:172
ldmaPeripheralSignal_USART2_TXEMPTY
Trig on USART2_TXEMPTY.
Definition: em_ldma.h:390
LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY
#define LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY
Definition: efm32jg12b_ldma.h:358
ldmaPeripheralSignal_USART1_RXDATAVRIGHT
Trig on USART1_RXDATAVRIGHT.
Definition: em_ldma.h:372
ldmaCtrlBlockSizeUnit4
Definition: em_ldma.h:140
LDMA_Descriptor_t::srcAddr
uint32_t srcAddr
Definition: em_ldma.h:480
ldmaLinkModeRel
Definition: em_ldma.h:212
LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD
Definition: efm32jg12b_ldma.h:379
LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV
#define LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV
Definition: efm32jg12b_ldma.h:324
ldmaPeripheralSignal_USART2_RXDATAV
Trig on USART2_RXDATAV.
Definition: em_ldma.h:384
_LDMA_CH_CTRL_DSTMODE_RELATIVE
#define _LDMA_CH_CTRL_DSTMODE_RELATIVE
Definition: efm32jg12b_ldma.h:598
LDMA_CH_REQSEL_SOURCESEL_LESENSE
#define LDMA_CH_REQSEL_SOURCESEL_LESENSE
Definition: efm32jg12b_ldma.h:422
LDMA_CH_REQSEL_SOURCESEL_PRS
#define LDMA_CH_REQSEL_SOURCESEL_PRS
Definition: efm32jg12b_ldma.h:405
LDMA_CtrlSize_t
LDMA_CtrlSize_t
Definition: em_ldma.h:178
ldmaPeripheralSignal_TIMER1_CC3
Trig on TIMER1_CC3.
Definition: em_ldma.h:354
ldmaPeripheralSignal_USART1_TXBLRIGHT
Trig on USART1_TXBLRIGHT.
Definition: em_ldma.h:378
LDMA_CH_REQSEL_SOURCESEL_USART3
#define LDMA_CH_REQSEL_SOURCESEL_USART3
Definition: efm32jg12b_ldma.h:411
LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1
#define LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1
Definition: efm32jg12b_ldma.h:363
LDMA_CH_REQSEL_SOURCESEL_MSC
#define LDMA_CH_REQSEL_SOURCESEL_MSC
Definition: efm32jg12b_ldma.h:419
LDMA_TransferCfg_t::ldmaCfgSrcIncSign
uint8_t ldmaCfgSrcIncSign
Definition: em_ldma.h:574
ldmaCtrlBlockSizeUnit8
Definition: em_ldma.h:142
LDMA_CtrlDstAddrMode_t
LDMA_CtrlDstAddrMode_t
Definition: em_ldma.h:202
_LDMA_CH_CFG_ARBSLOTS_EIGHT
#define _LDMA_CH_CFG_ARBSLOTS_EIGHT
Definition: efm32jg12b_ldma.h:434
ldmaPeripheralSignal_CRYPTO0_DATA1WR
Trig on CRYPTO0_DATA1WR.
Definition: em_ldma.h:276
LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR
Definition: efm32jg12b_ldma.h:338
ldmaPeripheralSignal_TIMER0_CC2
Trig on TIMER0_CC2.
Definition: em_ldma.h:339
_LDMA_CH_CTRL_BLOCKSIZE_UNIT1024
#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024
Definition: efm32jg12b_ldma.h:509
LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD
Definition: efm32jg12b_ldma.h:366
LDMA_CH_REQSEL_SIGSEL_CSENDATA
#define LDMA_CH_REQSEL_SIGSEL_CSENDATA
Definition: efm32jg12b_ldma.h:336
LDMA_TransferCfg_t::ldmaLoopCnt
uint8_t ldmaLoopCnt
Definition: em_ldma.h:576
LDMA_CH_REQSEL_SIGSEL_TIMER0CC2
#define LDMA_CH_REQSEL_SIGSEL_TIMER0CC2
Definition: efm32jg12b_ldma.h:369
LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2
#define LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2
Definition: efm32jg12b_ldma.h:371
LDMA_CH_REQSEL_SIGSEL_TIMER0CC1
#define LDMA_CH_REQSEL_SIGSEL_TIMER0CC1
Definition: efm32jg12b_ldma.h:361
LDMA_CfgArbSlots_t
LDMA_CfgArbSlots_t
Definition: em_ldma.h:216
ldmaPeripheralSignal_I2C0_TXBL
Trig on I2C0_TXBL.
Definition: em_ldma.h:303
ldmaCtrlDstIncTwo
Definition: em_ldma.h:189
ldmaCtrlDstIncOne
Definition: em_ldma.h:188
ldmaCtrlBlockSizeUnit2
Definition: em_ldma.h:138
LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT
#define LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT
Definition: efm32jg12b_ldma.h:367
ldmaCfgArbSlotsAs4
Definition: em_ldma.h:220
ldmaCtrlBlockSizeUnit1024
Definition: em_ldma.h:149
_LDMA_CH_LINK_LINKMODE_RELATIVE
#define _LDMA_CH_LINK_LINKMODE_RELATIVE
Definition: efm32jg12b_ldma.h:627
LDMA_CH_REQSEL_SOURCESEL_NONE
#define LDMA_CH_REQSEL_SOURCESEL_NONE
Definition: efm32jg12b_ldma.h:404
ldmaPeripheralSignal_CRYPTO0_DATA0WR
Trig on CRYPTO0_DATA0WR.
Definition: em_ldma.h:267
ldmaPeripheralSignal_USART3_RXDATAVRIGHT
Trig on USART3_RXDATAVRIGHT.
Definition: em_ldma.h:396
ldmaCtrlBlockSizeUnit128
Definition: em_ldma.h:146
ldmaPeripheralSignal_CRYPTO1_DATA0RD
Trig on CRYPTO1_DATA0RD.
Definition: em_ldma.h:279
ldmaPeripheralSignal_VDAC0_CH0
Trig on VDAC0_CH0.
Definition: em_ldma.h:408
ldmaPeripheralSignal_WTIMER0_CC1
Trig on WTIMER0_CC1.
Definition: em_ldma.h:417
LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR
Definition: efm32jg12b_ldma.h:353
LDMA_CH_REQSEL_SIGSEL_USART0TXBL
#define LDMA_CH_REQSEL_SIGSEL_USART0TXBL
Definition: efm32jg12b_ldma.h:342
LDMA_CH_REQSEL_SIGSEL_ADC0SCAN
#define LDMA_CH_REQSEL_SIGSEL_ADC0SCAN
Definition: efm32jg12b_ldma.h:340
ldmaCtrlBlockSizeUnit6
Definition: em_ldma.h:141
LDMA_EnableChannelRequest
void LDMA_EnableChannelRequest(int ch, bool enable)
Enable or disable a LDMA channel request.
Definition: em_ldma.c:112
_LDMA_CH_CTRL_SRCINC_ONE
#define _LDMA_CH_CTRL_SRCINC_ONE
Definition: efm32jg12b_ldma.h:553
LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR
#define LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR
Definition: efm32jg12b_ldma.h:374
LDMA_CtrlSrcInc_t
LDMA_CtrlSrcInc_t
Definition: em_ldma.h:169
LDMA_CH_REQSEL_SOURCESEL_I2C1
#define LDMA_CH_REQSEL_SOURCESEL_I2C1
Definition: efm32jg12b_ldma.h:414