37 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
62 #define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3)
63 #define GPIO_STRENGHT_VALID(strenght) (!((strenght) & \
64 ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \
65 | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK)))
85 #if defined ( _GPIO_ROUTE_SWLOCATION_MASK )
86 EFM_ASSERT(location < AFCHANLOC_MAX);
88 GPIO->ROUTE = (
GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) |
89 (location << _GPIO_ROUTE_SWLOCATION_SHIFT);
95 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
108 EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode));
110 GPIO->P[port].CTRL = (
GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK))
111 | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT);
115 #if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK)
129 EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength));
189 #if !defined(_GPIO_EXTIPINSELL_MASK)
193 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
194 #if defined(_GPIO_EXTIPINSELL_MASK)
195 EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin));
217 #if defined(_GPIO_EXTIPINSELL_MASK)
246 GPIO->IFC = 1 << intNo;
274 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
294 GPIO->P[port].MODEL = (
GPIO->P[port].MODEL & ~(0xFu << (pin * 4)))
295 | (mode << (pin * 4));
299 GPIO->P[port].MODEH = (
GPIO->P[port].MODEH & ~(0xFu << ((pin - 8) * 4)))
300 | (mode << ((pin - 8) * 4));
332 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
344 #if defined( _GPIO_EM4WUEN_MASK )
365 #if defined( _GPIO_EM4WUPOL_MASK )
366 EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0);
367 GPIO->EM4WUPOL &= ~pinmask;
368 GPIO->EM4WUPOL |= pinmask & polaritymask;
369 #elif defined( _GPIO_EXTILEVEL_MASK )
371 GPIO->EXTILEVEL &= ~pinmask;
372 GPIO->EXTILEVEL |= pinmask & polaritymask;
374 GPIO->EM4WUEN |= pinmask;
378 #if defined( _GPIO_CMD_EM4WUCLR_MASK )
379 GPIO->CMD = GPIO_CMD_EM4WUCLR;
380 #elif defined( _GPIO_IFC_EM4WU_MASK )
#define _GPIO_P_CTRL_DRIVESTRENGTH_MASK
#define _GPIO_EXTIPSELH_EXTIPSEL8_MASK
#define _GPIO_EXTILEVEL_MASK
#define _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK
__STATIC_INLINE void GPIO_IntClear(uint32_t flags)
Clear one or more pending GPIO interrupts.
GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port, unsigned int pin)
Get the mode for a GPIO pin.
void GPIO_DbgLocationSet(unsigned int location)
Sets the pin location of the debug pins (Serial Wire interface).
#define _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK
#define _GPIO_EXTIPSELH_EXTIPSEL9_SHIFT
void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
Enable GPIO pin wake-up from EM4. When the function exits, EM4 mode can be safely entered...
GPIO_DriveStrength_TypeDef
#define _GPIO_EM4WUEN_MASK
void GPIO_ExtIntConfig(GPIO_Port_TypeDef port, unsigned int pin, unsigned int intNo, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO external pin interrupt.
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
General Purpose IO (GPIO) peripheral API.
__STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out register to 1.
#define _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK
#define _GPIO_EXTIPSELL_EXTIPSEL1_SHIFT
void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, GPIO_DriveStrength_TypeDef strength)
Sets the drive strength for a GPIO port.
#define _GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
#define _GPIO_EXTIPSELL_EXTIPSEL0_MASK
__STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out port register to 0.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
#define _GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT
__STATIC_INLINE void GPIO_EM4SetPinRetention(bool enable)
Enable GPIO pin retention of output enable, output value, pull enable and pull direction in EM4...