EFM32 Jade Gecko 1 Software Documentation  efm32jg1-doc-5.1.2
efm32jg1b_msc.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t READCTRL;
45  __IOM uint32_t WRITECTRL;
46  __IOM uint32_t WRITECMD;
47  __IOM uint32_t ADDRB;
48  uint32_t RESERVED0[1];
49  __IOM uint32_t WDATA;
50  __IM uint32_t STATUS;
52  uint32_t RESERVED1[4];
53  __IM uint32_t IF;
54  __IOM uint32_t IFS;
55  __IOM uint32_t IFC;
56  __IOM uint32_t IEN;
57  __IOM uint32_t LOCK;
58  __IOM uint32_t CACHECMD;
59  __IM uint32_t CACHEHITS;
60  __IM uint32_t CACHEMISSES;
62  uint32_t RESERVED2[1];
63  __IOM uint32_t MASSLOCK;
65  uint32_t RESERVED3[1];
66  __IOM uint32_t STARTUP;
68  uint32_t RESERVED4[5];
69  __IOM uint32_t CMD;
70 } MSC_TypeDef;
72 /**************************************************************************/
77 /* Bit fields for MSC CTRL */
78 #define _MSC_CTRL_RESETVALUE 0x00000001UL
79 #define _MSC_CTRL_MASK 0x0000000FUL
80 #define MSC_CTRL_ADDRFAULTEN (0x1UL << 0)
81 #define _MSC_CTRL_ADDRFAULTEN_SHIFT 0
82 #define _MSC_CTRL_ADDRFAULTEN_MASK 0x1UL
83 #define _MSC_CTRL_ADDRFAULTEN_DEFAULT 0x00000001UL
84 #define MSC_CTRL_ADDRFAULTEN_DEFAULT (_MSC_CTRL_ADDRFAULTEN_DEFAULT << 0)
85 #define MSC_CTRL_CLKDISFAULTEN (0x1UL << 1)
86 #define _MSC_CTRL_CLKDISFAULTEN_SHIFT 1
87 #define _MSC_CTRL_CLKDISFAULTEN_MASK 0x2UL
88 #define _MSC_CTRL_CLKDISFAULTEN_DEFAULT 0x00000000UL
89 #define MSC_CTRL_CLKDISFAULTEN_DEFAULT (_MSC_CTRL_CLKDISFAULTEN_DEFAULT << 1)
90 #define MSC_CTRL_PWRUPONDEMAND (0x1UL << 2)
91 #define _MSC_CTRL_PWRUPONDEMAND_SHIFT 2
92 #define _MSC_CTRL_PWRUPONDEMAND_MASK 0x4UL
93 #define _MSC_CTRL_PWRUPONDEMAND_DEFAULT 0x00000000UL
94 #define MSC_CTRL_PWRUPONDEMAND_DEFAULT (_MSC_CTRL_PWRUPONDEMAND_DEFAULT << 2)
95 #define MSC_CTRL_IFCREADCLEAR (0x1UL << 3)
96 #define _MSC_CTRL_IFCREADCLEAR_SHIFT 3
97 #define _MSC_CTRL_IFCREADCLEAR_MASK 0x8UL
98 #define _MSC_CTRL_IFCREADCLEAR_DEFAULT 0x00000000UL
99 #define MSC_CTRL_IFCREADCLEAR_DEFAULT (_MSC_CTRL_IFCREADCLEAR_DEFAULT << 3)
101 /* Bit fields for MSC READCTRL */
102 #define _MSC_READCTRL_RESETVALUE 0x01000100UL
103 #define _MSC_READCTRL_MASK 0x13000338UL
104 #define MSC_READCTRL_IFCDIS (0x1UL << 3)
105 #define _MSC_READCTRL_IFCDIS_SHIFT 3
106 #define _MSC_READCTRL_IFCDIS_MASK 0x8UL
107 #define _MSC_READCTRL_IFCDIS_DEFAULT 0x00000000UL
108 #define MSC_READCTRL_IFCDIS_DEFAULT (_MSC_READCTRL_IFCDIS_DEFAULT << 3)
109 #define MSC_READCTRL_AIDIS (0x1UL << 4)
110 #define _MSC_READCTRL_AIDIS_SHIFT 4
111 #define _MSC_READCTRL_AIDIS_MASK 0x10UL
112 #define _MSC_READCTRL_AIDIS_DEFAULT 0x00000000UL
113 #define MSC_READCTRL_AIDIS_DEFAULT (_MSC_READCTRL_AIDIS_DEFAULT << 4)
114 #define MSC_READCTRL_ICCDIS (0x1UL << 5)
115 #define _MSC_READCTRL_ICCDIS_SHIFT 5
116 #define _MSC_READCTRL_ICCDIS_MASK 0x20UL
117 #define _MSC_READCTRL_ICCDIS_DEFAULT 0x00000000UL
118 #define MSC_READCTRL_ICCDIS_DEFAULT (_MSC_READCTRL_ICCDIS_DEFAULT << 5)
119 #define MSC_READCTRL_PREFETCH (0x1UL << 8)
120 #define _MSC_READCTRL_PREFETCH_SHIFT 8
121 #define _MSC_READCTRL_PREFETCH_MASK 0x100UL
122 #define _MSC_READCTRL_PREFETCH_DEFAULT 0x00000001UL
123 #define MSC_READCTRL_PREFETCH_DEFAULT (_MSC_READCTRL_PREFETCH_DEFAULT << 8)
124 #define MSC_READCTRL_USEHPROT (0x1UL << 9)
125 #define _MSC_READCTRL_USEHPROT_SHIFT 9
126 #define _MSC_READCTRL_USEHPROT_MASK 0x200UL
127 #define _MSC_READCTRL_USEHPROT_DEFAULT 0x00000000UL
128 #define MSC_READCTRL_USEHPROT_DEFAULT (_MSC_READCTRL_USEHPROT_DEFAULT << 9)
129 #define _MSC_READCTRL_MODE_SHIFT 24
130 #define _MSC_READCTRL_MODE_MASK 0x3000000UL
131 #define _MSC_READCTRL_MODE_WS0 0x00000000UL
132 #define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL
133 #define _MSC_READCTRL_MODE_WS1 0x00000001UL
134 #define MSC_READCTRL_MODE_WS0 (_MSC_READCTRL_MODE_WS0 << 24)
135 #define MSC_READCTRL_MODE_DEFAULT (_MSC_READCTRL_MODE_DEFAULT << 24)
136 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24)
137 #define MSC_READCTRL_SCBTP (0x1UL << 28)
138 #define _MSC_READCTRL_SCBTP_SHIFT 28
139 #define _MSC_READCTRL_SCBTP_MASK 0x10000000UL
140 #define _MSC_READCTRL_SCBTP_DEFAULT 0x00000000UL
141 #define MSC_READCTRL_SCBTP_DEFAULT (_MSC_READCTRL_SCBTP_DEFAULT << 28)
143 /* Bit fields for MSC WRITECTRL */
144 #define _MSC_WRITECTRL_RESETVALUE 0x00000000UL
145 #define _MSC_WRITECTRL_MASK 0x00000003UL
146 #define MSC_WRITECTRL_WREN (0x1UL << 0)
147 #define _MSC_WRITECTRL_WREN_SHIFT 0
148 #define _MSC_WRITECTRL_WREN_MASK 0x1UL
149 #define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL
150 #define MSC_WRITECTRL_WREN_DEFAULT (_MSC_WRITECTRL_WREN_DEFAULT << 0)
151 #define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1)
152 #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1
153 #define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL
154 #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL
155 #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)
157 /* Bit fields for MSC WRITECMD */
158 #define _MSC_WRITECMD_RESETVALUE 0x00000000UL
159 #define _MSC_WRITECMD_MASK 0x0000113FUL
160 #define MSC_WRITECMD_LADDRIM (0x1UL << 0)
161 #define _MSC_WRITECMD_LADDRIM_SHIFT 0
162 #define _MSC_WRITECMD_LADDRIM_MASK 0x1UL
163 #define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL
164 #define MSC_WRITECMD_LADDRIM_DEFAULT (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)
165 #define MSC_WRITECMD_ERASEPAGE (0x1UL << 1)
166 #define _MSC_WRITECMD_ERASEPAGE_SHIFT 1
167 #define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL
168 #define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL
169 #define MSC_WRITECMD_ERASEPAGE_DEFAULT (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)
170 #define MSC_WRITECMD_WRITEEND (0x1UL << 2)
171 #define _MSC_WRITECMD_WRITEEND_SHIFT 2
172 #define _MSC_WRITECMD_WRITEEND_MASK 0x4UL
173 #define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL
174 #define MSC_WRITECMD_WRITEEND_DEFAULT (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)
175 #define MSC_WRITECMD_WRITEONCE (0x1UL << 3)
176 #define _MSC_WRITECMD_WRITEONCE_SHIFT 3
177 #define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL
178 #define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL
179 #define MSC_WRITECMD_WRITEONCE_DEFAULT (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)
180 #define MSC_WRITECMD_WRITETRIG (0x1UL << 4)
181 #define _MSC_WRITECMD_WRITETRIG_SHIFT 4
182 #define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL
183 #define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL
184 #define MSC_WRITECMD_WRITETRIG_DEFAULT (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)
185 #define MSC_WRITECMD_ERASEABORT (0x1UL << 5)
186 #define _MSC_WRITECMD_ERASEABORT_SHIFT 5
187 #define _MSC_WRITECMD_ERASEABORT_MASK 0x20UL
188 #define _MSC_WRITECMD_ERASEABORT_DEFAULT 0x00000000UL
189 #define MSC_WRITECMD_ERASEABORT_DEFAULT (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)
190 #define MSC_WRITECMD_ERASEMAIN0 (0x1UL << 8)
191 #define _MSC_WRITECMD_ERASEMAIN0_SHIFT 8
192 #define _MSC_WRITECMD_ERASEMAIN0_MASK 0x100UL
193 #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT 0x00000000UL
194 #define MSC_WRITECMD_ERASEMAIN0_DEFAULT (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)
195 #define MSC_WRITECMD_CLEARWDATA (0x1UL << 12)
196 #define _MSC_WRITECMD_CLEARWDATA_SHIFT 12
197 #define _MSC_WRITECMD_CLEARWDATA_MASK 0x1000UL
198 #define _MSC_WRITECMD_CLEARWDATA_DEFAULT 0x00000000UL
199 #define MSC_WRITECMD_CLEARWDATA_DEFAULT (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)
201 /* Bit fields for MSC ADDRB */
202 #define _MSC_ADDRB_RESETVALUE 0x00000000UL
203 #define _MSC_ADDRB_MASK 0xFFFFFFFFUL
204 #define _MSC_ADDRB_ADDRB_SHIFT 0
205 #define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL
206 #define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL
207 #define MSC_ADDRB_ADDRB_DEFAULT (_MSC_ADDRB_ADDRB_DEFAULT << 0)
209 /* Bit fields for MSC WDATA */
210 #define _MSC_WDATA_RESETVALUE 0x00000000UL
211 #define _MSC_WDATA_MASK 0xFFFFFFFFUL
212 #define _MSC_WDATA_WDATA_SHIFT 0
213 #define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL
214 #define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL
215 #define MSC_WDATA_WDATA_DEFAULT (_MSC_WDATA_WDATA_DEFAULT << 0)
217 /* Bit fields for MSC STATUS */
218 #define _MSC_STATUS_RESETVALUE 0x00000008UL
219 #define _MSC_STATUS_MASK 0x0000007FUL
220 #define MSC_STATUS_BUSY (0x1UL << 0)
221 #define _MSC_STATUS_BUSY_SHIFT 0
222 #define _MSC_STATUS_BUSY_MASK 0x1UL
223 #define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL
224 #define MSC_STATUS_BUSY_DEFAULT (_MSC_STATUS_BUSY_DEFAULT << 0)
225 #define MSC_STATUS_LOCKED (0x1UL << 1)
226 #define _MSC_STATUS_LOCKED_SHIFT 1
227 #define _MSC_STATUS_LOCKED_MASK 0x2UL
228 #define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL
229 #define MSC_STATUS_LOCKED_DEFAULT (_MSC_STATUS_LOCKED_DEFAULT << 1)
230 #define MSC_STATUS_INVADDR (0x1UL << 2)
231 #define _MSC_STATUS_INVADDR_SHIFT 2
232 #define _MSC_STATUS_INVADDR_MASK 0x4UL
233 #define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL
234 #define MSC_STATUS_INVADDR_DEFAULT (_MSC_STATUS_INVADDR_DEFAULT << 2)
235 #define MSC_STATUS_WDATAREADY (0x1UL << 3)
236 #define _MSC_STATUS_WDATAREADY_SHIFT 3
237 #define _MSC_STATUS_WDATAREADY_MASK 0x8UL
238 #define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL
239 #define MSC_STATUS_WDATAREADY_DEFAULT (_MSC_STATUS_WDATAREADY_DEFAULT << 3)
240 #define MSC_STATUS_WORDTIMEOUT (0x1UL << 4)
241 #define _MSC_STATUS_WORDTIMEOUT_SHIFT 4
242 #define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL
243 #define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL
244 #define MSC_STATUS_WORDTIMEOUT_DEFAULT (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)
245 #define MSC_STATUS_ERASEABORTED (0x1UL << 5)
246 #define _MSC_STATUS_ERASEABORTED_SHIFT 5
247 #define _MSC_STATUS_ERASEABORTED_MASK 0x20UL
248 #define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL
249 #define MSC_STATUS_ERASEABORTED_DEFAULT (_MSC_STATUS_ERASEABORTED_DEFAULT << 5)
250 #define MSC_STATUS_PCRUNNING (0x1UL << 6)
251 #define _MSC_STATUS_PCRUNNING_SHIFT 6
252 #define _MSC_STATUS_PCRUNNING_MASK 0x40UL
253 #define _MSC_STATUS_PCRUNNING_DEFAULT 0x00000000UL
254 #define MSC_STATUS_PCRUNNING_DEFAULT (_MSC_STATUS_PCRUNNING_DEFAULT << 6)
256 /* Bit fields for MSC IF */
257 #define _MSC_IF_RESETVALUE 0x00000000UL
258 #define _MSC_IF_MASK 0x0000003FUL
259 #define MSC_IF_ERASE (0x1UL << 0)
260 #define _MSC_IF_ERASE_SHIFT 0
261 #define _MSC_IF_ERASE_MASK 0x1UL
262 #define _MSC_IF_ERASE_DEFAULT 0x00000000UL
263 #define MSC_IF_ERASE_DEFAULT (_MSC_IF_ERASE_DEFAULT << 0)
264 #define MSC_IF_WRITE (0x1UL << 1)
265 #define _MSC_IF_WRITE_SHIFT 1
266 #define _MSC_IF_WRITE_MASK 0x2UL
267 #define _MSC_IF_WRITE_DEFAULT 0x00000000UL
268 #define MSC_IF_WRITE_DEFAULT (_MSC_IF_WRITE_DEFAULT << 1)
269 #define MSC_IF_CHOF (0x1UL << 2)
270 #define _MSC_IF_CHOF_SHIFT 2
271 #define _MSC_IF_CHOF_MASK 0x4UL
272 #define _MSC_IF_CHOF_DEFAULT 0x00000000UL
273 #define MSC_IF_CHOF_DEFAULT (_MSC_IF_CHOF_DEFAULT << 2)
274 #define MSC_IF_CMOF (0x1UL << 3)
275 #define _MSC_IF_CMOF_SHIFT 3
276 #define _MSC_IF_CMOF_MASK 0x8UL
277 #define _MSC_IF_CMOF_DEFAULT 0x00000000UL
278 #define MSC_IF_CMOF_DEFAULT (_MSC_IF_CMOF_DEFAULT << 3)
279 #define MSC_IF_PWRUPF (0x1UL << 4)
280 #define _MSC_IF_PWRUPF_SHIFT 4
281 #define _MSC_IF_PWRUPF_MASK 0x10UL
282 #define _MSC_IF_PWRUPF_DEFAULT 0x00000000UL
283 #define MSC_IF_PWRUPF_DEFAULT (_MSC_IF_PWRUPF_DEFAULT << 4)
284 #define MSC_IF_ICACHERR (0x1UL << 5)
285 #define _MSC_IF_ICACHERR_SHIFT 5
286 #define _MSC_IF_ICACHERR_MASK 0x20UL
287 #define _MSC_IF_ICACHERR_DEFAULT 0x00000000UL
288 #define MSC_IF_ICACHERR_DEFAULT (_MSC_IF_ICACHERR_DEFAULT << 5)
290 /* Bit fields for MSC IFS */
291 #define _MSC_IFS_RESETVALUE 0x00000000UL
292 #define _MSC_IFS_MASK 0x0000003FUL
293 #define MSC_IFS_ERASE (0x1UL << 0)
294 #define _MSC_IFS_ERASE_SHIFT 0
295 #define _MSC_IFS_ERASE_MASK 0x1UL
296 #define _MSC_IFS_ERASE_DEFAULT 0x00000000UL
297 #define MSC_IFS_ERASE_DEFAULT (_MSC_IFS_ERASE_DEFAULT << 0)
298 #define MSC_IFS_WRITE (0x1UL << 1)
299 #define _MSC_IFS_WRITE_SHIFT 1
300 #define _MSC_IFS_WRITE_MASK 0x2UL
301 #define _MSC_IFS_WRITE_DEFAULT 0x00000000UL
302 #define MSC_IFS_WRITE_DEFAULT (_MSC_IFS_WRITE_DEFAULT << 1)
303 #define MSC_IFS_CHOF (0x1UL << 2)
304 #define _MSC_IFS_CHOF_SHIFT 2
305 #define _MSC_IFS_CHOF_MASK 0x4UL
306 #define _MSC_IFS_CHOF_DEFAULT 0x00000000UL
307 #define MSC_IFS_CHOF_DEFAULT (_MSC_IFS_CHOF_DEFAULT << 2)
308 #define MSC_IFS_CMOF (0x1UL << 3)
309 #define _MSC_IFS_CMOF_SHIFT 3
310 #define _MSC_IFS_CMOF_MASK 0x8UL
311 #define _MSC_IFS_CMOF_DEFAULT 0x00000000UL
312 #define MSC_IFS_CMOF_DEFAULT (_MSC_IFS_CMOF_DEFAULT << 3)
313 #define MSC_IFS_PWRUPF (0x1UL << 4)
314 #define _MSC_IFS_PWRUPF_SHIFT 4
315 #define _MSC_IFS_PWRUPF_MASK 0x10UL
316 #define _MSC_IFS_PWRUPF_DEFAULT 0x00000000UL
317 #define MSC_IFS_PWRUPF_DEFAULT (_MSC_IFS_PWRUPF_DEFAULT << 4)
318 #define MSC_IFS_ICACHERR (0x1UL << 5)
319 #define _MSC_IFS_ICACHERR_SHIFT 5
320 #define _MSC_IFS_ICACHERR_MASK 0x20UL
321 #define _MSC_IFS_ICACHERR_DEFAULT 0x00000000UL
322 #define MSC_IFS_ICACHERR_DEFAULT (_MSC_IFS_ICACHERR_DEFAULT << 5)
324 /* Bit fields for MSC IFC */
325 #define _MSC_IFC_RESETVALUE 0x00000000UL
326 #define _MSC_IFC_MASK 0x0000003FUL
327 #define MSC_IFC_ERASE (0x1UL << 0)
328 #define _MSC_IFC_ERASE_SHIFT 0
329 #define _MSC_IFC_ERASE_MASK 0x1UL
330 #define _MSC_IFC_ERASE_DEFAULT 0x00000000UL
331 #define MSC_IFC_ERASE_DEFAULT (_MSC_IFC_ERASE_DEFAULT << 0)
332 #define MSC_IFC_WRITE (0x1UL << 1)
333 #define _MSC_IFC_WRITE_SHIFT 1
334 #define _MSC_IFC_WRITE_MASK 0x2UL
335 #define _MSC_IFC_WRITE_DEFAULT 0x00000000UL
336 #define MSC_IFC_WRITE_DEFAULT (_MSC_IFC_WRITE_DEFAULT << 1)
337 #define MSC_IFC_CHOF (0x1UL << 2)
338 #define _MSC_IFC_CHOF_SHIFT 2
339 #define _MSC_IFC_CHOF_MASK 0x4UL
340 #define _MSC_IFC_CHOF_DEFAULT 0x00000000UL
341 #define MSC_IFC_CHOF_DEFAULT (_MSC_IFC_CHOF_DEFAULT << 2)
342 #define MSC_IFC_CMOF (0x1UL << 3)
343 #define _MSC_IFC_CMOF_SHIFT 3
344 #define _MSC_IFC_CMOF_MASK 0x8UL
345 #define _MSC_IFC_CMOF_DEFAULT 0x00000000UL
346 #define MSC_IFC_CMOF_DEFAULT (_MSC_IFC_CMOF_DEFAULT << 3)
347 #define MSC_IFC_PWRUPF (0x1UL << 4)
348 #define _MSC_IFC_PWRUPF_SHIFT 4
349 #define _MSC_IFC_PWRUPF_MASK 0x10UL
350 #define _MSC_IFC_PWRUPF_DEFAULT 0x00000000UL
351 #define MSC_IFC_PWRUPF_DEFAULT (_MSC_IFC_PWRUPF_DEFAULT << 4)
352 #define MSC_IFC_ICACHERR (0x1UL << 5)
353 #define _MSC_IFC_ICACHERR_SHIFT 5
354 #define _MSC_IFC_ICACHERR_MASK 0x20UL
355 #define _MSC_IFC_ICACHERR_DEFAULT 0x00000000UL
356 #define MSC_IFC_ICACHERR_DEFAULT (_MSC_IFC_ICACHERR_DEFAULT << 5)
358 /* Bit fields for MSC IEN */
359 #define _MSC_IEN_RESETVALUE 0x00000000UL
360 #define _MSC_IEN_MASK 0x0000003FUL
361 #define MSC_IEN_ERASE (0x1UL << 0)
362 #define _MSC_IEN_ERASE_SHIFT 0
363 #define _MSC_IEN_ERASE_MASK 0x1UL
364 #define _MSC_IEN_ERASE_DEFAULT 0x00000000UL
365 #define MSC_IEN_ERASE_DEFAULT (_MSC_IEN_ERASE_DEFAULT << 0)
366 #define MSC_IEN_WRITE (0x1UL << 1)
367 #define _MSC_IEN_WRITE_SHIFT 1
368 #define _MSC_IEN_WRITE_MASK 0x2UL
369 #define _MSC_IEN_WRITE_DEFAULT 0x00000000UL
370 #define MSC_IEN_WRITE_DEFAULT (_MSC_IEN_WRITE_DEFAULT << 1)
371 #define MSC_IEN_CHOF (0x1UL << 2)
372 #define _MSC_IEN_CHOF_SHIFT 2
373 #define _MSC_IEN_CHOF_MASK 0x4UL
374 #define _MSC_IEN_CHOF_DEFAULT 0x00000000UL
375 #define MSC_IEN_CHOF_DEFAULT (_MSC_IEN_CHOF_DEFAULT << 2)
376 #define MSC_IEN_CMOF (0x1UL << 3)
377 #define _MSC_IEN_CMOF_SHIFT 3
378 #define _MSC_IEN_CMOF_MASK 0x8UL
379 #define _MSC_IEN_CMOF_DEFAULT 0x00000000UL
380 #define MSC_IEN_CMOF_DEFAULT (_MSC_IEN_CMOF_DEFAULT << 3)
381 #define MSC_IEN_PWRUPF (0x1UL << 4)
382 #define _MSC_IEN_PWRUPF_SHIFT 4
383 #define _MSC_IEN_PWRUPF_MASK 0x10UL
384 #define _MSC_IEN_PWRUPF_DEFAULT 0x00000000UL
385 #define MSC_IEN_PWRUPF_DEFAULT (_MSC_IEN_PWRUPF_DEFAULT << 4)
386 #define MSC_IEN_ICACHERR (0x1UL << 5)
387 #define _MSC_IEN_ICACHERR_SHIFT 5
388 #define _MSC_IEN_ICACHERR_MASK 0x20UL
389 #define _MSC_IEN_ICACHERR_DEFAULT 0x00000000UL
390 #define MSC_IEN_ICACHERR_DEFAULT (_MSC_IEN_ICACHERR_DEFAULT << 5)
392 /* Bit fields for MSC LOCK */
393 #define _MSC_LOCK_RESETVALUE 0x00000000UL
394 #define _MSC_LOCK_MASK 0x0000FFFFUL
395 #define _MSC_LOCK_LOCKKEY_SHIFT 0
396 #define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL
397 #define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL
398 #define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL
399 #define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
400 #define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL
401 #define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL
402 #define MSC_LOCK_LOCKKEY_DEFAULT (_MSC_LOCK_LOCKKEY_DEFAULT << 0)
403 #define MSC_LOCK_LOCKKEY_LOCK (_MSC_LOCK_LOCKKEY_LOCK << 0)
404 #define MSC_LOCK_LOCKKEY_UNLOCKED (_MSC_LOCK_LOCKKEY_UNLOCKED << 0)
405 #define MSC_LOCK_LOCKKEY_LOCKED (_MSC_LOCK_LOCKKEY_LOCKED << 0)
406 #define MSC_LOCK_LOCKKEY_UNLOCK (_MSC_LOCK_LOCKKEY_UNLOCK << 0)
408 /* Bit fields for MSC CACHECMD */
409 #define _MSC_CACHECMD_RESETVALUE 0x00000000UL
410 #define _MSC_CACHECMD_MASK 0x00000007UL
411 #define MSC_CACHECMD_INVCACHE (0x1UL << 0)
412 #define _MSC_CACHECMD_INVCACHE_SHIFT 0
413 #define _MSC_CACHECMD_INVCACHE_MASK 0x1UL
414 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL
415 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0)
416 #define MSC_CACHECMD_STARTPC (0x1UL << 1)
417 #define _MSC_CACHECMD_STARTPC_SHIFT 1
418 #define _MSC_CACHECMD_STARTPC_MASK 0x2UL
419 #define _MSC_CACHECMD_STARTPC_DEFAULT 0x00000000UL
420 #define MSC_CACHECMD_STARTPC_DEFAULT (_MSC_CACHECMD_STARTPC_DEFAULT << 1)
421 #define MSC_CACHECMD_STOPPC (0x1UL << 2)
422 #define _MSC_CACHECMD_STOPPC_SHIFT 2
423 #define _MSC_CACHECMD_STOPPC_MASK 0x4UL
424 #define _MSC_CACHECMD_STOPPC_DEFAULT 0x00000000UL
425 #define MSC_CACHECMD_STOPPC_DEFAULT (_MSC_CACHECMD_STOPPC_DEFAULT << 2)
427 /* Bit fields for MSC CACHEHITS */
428 #define _MSC_CACHEHITS_RESETVALUE 0x00000000UL
429 #define _MSC_CACHEHITS_MASK 0x000FFFFFUL
430 #define _MSC_CACHEHITS_CACHEHITS_SHIFT 0
431 #define _MSC_CACHEHITS_CACHEHITS_MASK 0xFFFFFUL
432 #define _MSC_CACHEHITS_CACHEHITS_DEFAULT 0x00000000UL
433 #define MSC_CACHEHITS_CACHEHITS_DEFAULT (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0)
435 /* Bit fields for MSC CACHEMISSES */
436 #define _MSC_CACHEMISSES_RESETVALUE 0x00000000UL
437 #define _MSC_CACHEMISSES_MASK 0x000FFFFFUL
438 #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT 0
439 #define _MSC_CACHEMISSES_CACHEMISSES_MASK 0xFFFFFUL
440 #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT 0x00000000UL
441 #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0)
443 /* Bit fields for MSC MASSLOCK */
444 #define _MSC_MASSLOCK_RESETVALUE 0x00000001UL
445 #define _MSC_MASSLOCK_MASK 0x0000FFFFUL
446 #define _MSC_MASSLOCK_LOCKKEY_SHIFT 0
447 #define _MSC_MASSLOCK_LOCKKEY_MASK 0xFFFFUL
448 #define _MSC_MASSLOCK_LOCKKEY_LOCK 0x00000000UL
449 #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED 0x00000000UL
450 #define _MSC_MASSLOCK_LOCKKEY_DEFAULT 0x00000001UL
451 #define _MSC_MASSLOCK_LOCKKEY_LOCKED 0x00000001UL
452 #define _MSC_MASSLOCK_LOCKKEY_UNLOCK 0x0000631AUL
453 #define MSC_MASSLOCK_LOCKKEY_LOCK (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)
454 #define MSC_MASSLOCK_LOCKKEY_UNLOCKED (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0)
455 #define MSC_MASSLOCK_LOCKKEY_DEFAULT (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)
456 #define MSC_MASSLOCK_LOCKKEY_LOCKED (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)
457 #define MSC_MASSLOCK_LOCKKEY_UNLOCK (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)
459 /* Bit fields for MSC STARTUP */
460 #define _MSC_STARTUP_RESETVALUE 0x1300104DUL
461 #define _MSC_STARTUP_MASK 0x773FF3FFUL
462 #define _MSC_STARTUP_STDLY0_SHIFT 0
463 #define _MSC_STARTUP_STDLY0_MASK 0x3FFUL
464 #define _MSC_STARTUP_STDLY0_DEFAULT 0x0000004DUL
465 #define MSC_STARTUP_STDLY0_DEFAULT (_MSC_STARTUP_STDLY0_DEFAULT << 0)
466 #define _MSC_STARTUP_STDLY1_SHIFT 12
467 #define _MSC_STARTUP_STDLY1_MASK 0x3FF000UL
468 #define _MSC_STARTUP_STDLY1_DEFAULT 0x00000001UL
469 #define MSC_STARTUP_STDLY1_DEFAULT (_MSC_STARTUP_STDLY1_DEFAULT << 12)
470 #define MSC_STARTUP_ASTWAIT (0x1UL << 24)
471 #define _MSC_STARTUP_ASTWAIT_SHIFT 24
472 #define _MSC_STARTUP_ASTWAIT_MASK 0x1000000UL
473 #define _MSC_STARTUP_ASTWAIT_DEFAULT 0x00000001UL
474 #define MSC_STARTUP_ASTWAIT_DEFAULT (_MSC_STARTUP_ASTWAIT_DEFAULT << 24)
475 #define MSC_STARTUP_STWSEN (0x1UL << 25)
476 #define _MSC_STARTUP_STWSEN_SHIFT 25
477 #define _MSC_STARTUP_STWSEN_MASK 0x2000000UL
478 #define _MSC_STARTUP_STWSEN_DEFAULT 0x00000001UL
479 #define MSC_STARTUP_STWSEN_DEFAULT (_MSC_STARTUP_STWSEN_DEFAULT << 25)
480 #define MSC_STARTUP_STWSAEN (0x1UL << 26)
481 #define _MSC_STARTUP_STWSAEN_SHIFT 26
482 #define _MSC_STARTUP_STWSAEN_MASK 0x4000000UL
483 #define _MSC_STARTUP_STWSAEN_DEFAULT 0x00000000UL
484 #define MSC_STARTUP_STWSAEN_DEFAULT (_MSC_STARTUP_STWSAEN_DEFAULT << 26)
485 #define _MSC_STARTUP_STWS_SHIFT 28
486 #define _MSC_STARTUP_STWS_MASK 0x70000000UL
487 #define _MSC_STARTUP_STWS_DEFAULT 0x00000001UL
488 #define MSC_STARTUP_STWS_DEFAULT (_MSC_STARTUP_STWS_DEFAULT << 28)
490 /* Bit fields for MSC CMD */
491 #define _MSC_CMD_RESETVALUE 0x00000000UL
492 #define _MSC_CMD_MASK 0x00000001UL
493 #define MSC_CMD_PWRUP (0x1UL << 0)
494 #define _MSC_CMD_PWRUP_SHIFT 0
495 #define _MSC_CMD_PWRUP_MASK 0x1UL
496 #define _MSC_CMD_PWRUP_DEFAULT 0x00000000UL
497 #define MSC_CMD_PWRUP_DEFAULT (_MSC_CMD_PWRUP_DEFAULT << 0)
__IOM uint32_t MASSLOCK
Definition: efm32jg1b_msc.h:63
__IM uint32_t CACHEHITS
Definition: efm32jg1b_msc.h:59
__IOM uint32_t LOCK
Definition: efm32jg1b_msc.h:57
__IOM uint32_t IEN
Definition: efm32jg1b_msc.h:56
__IM uint32_t STATUS
Definition: efm32jg1b_msc.h:50
__IOM uint32_t WDATA
Definition: efm32jg1b_msc.h:49
__IOM uint32_t READCTRL
Definition: efm32jg1b_msc.h:44
__IOM uint32_t IFC
Definition: efm32jg1b_msc.h:55
__IOM uint32_t STARTUP
Definition: efm32jg1b_msc.h:66
__IOM uint32_t ADDRB
Definition: efm32jg1b_msc.h:47
__IM uint32_t CACHEMISSES
Definition: efm32jg1b_msc.h:60
__IOM uint32_t IFS
Definition: efm32jg1b_msc.h:54
__IOM uint32_t WRITECTRL
Definition: efm32jg1b_msc.h:45
__IOM uint32_t CACHECMD
Definition: efm32jg1b_msc.h:58
__IOM uint32_t CMD
Definition: efm32jg1b_msc.h:69
__IOM uint32_t CTRL
Definition: efm32jg1b_msc.h:43
__IM uint32_t IF
Definition: efm32jg1b_msc.h:53
__IOM uint32_t WRITECMD
Definition: efm32jg1b_msc.h:46