EFM32 Happy Gecko Software Documentation
efm32hg-doc-5.1.2
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Board Controller Register definiton
Definition at line 56 of file bsp_dk_bcreg_3201.h.
#include <bsp_dk_bcreg_3201.h>
__IO uint16_t BC_TypeDef::ADC_READ |
0x24 - AEM ADC SPI interface
Definition at line 77 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::ADC_STATUS |
0x22 - AEM ADC SPI interface
Definition at line 76 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::ADC_WRITE |
0x20 - AEM ADC SPI interface
Definition at line 75 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::ARB_CTRL |
0x16 - Arbiter control, board control or EFM32GG access to display
Definition at line 70 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::BC_MBOX_TXCTRL |
0x80 - BC <-> EFM32 communication channel
Definition at line 107 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::BC_MBOX_TXDATA |
0x82
Definition at line 108 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::BC_MBOX_TXSTATUS0 |
0x84
Definition at line 109 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::BC_MBOX_TXSTATUS1 |
0x86
Definition at line 110 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::BUF_CTRL |
0xc0 - Buffer Controller Control
Definition at line 121 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::CLKRST |
0x26 - Clock and reset control
Definition at line 79 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::DISPLAY_CTRL |
0x12 - SSD2119 TFT display control
Definition at line 68 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::EBI_CTRL |
0x14 - Extended Address Mode control
Definition at line 69 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::EM |
0x02 - Energy Mode indicator
Definition at line 59 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::FW_BUILDNO |
0x2A - Firmware build number
Definition at line 82 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::FW_VERSION |
0x2C - Firmware version
Definition at line 83 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::HW_VERSION |
0x28 - Hardware version
Definition at line 81 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTCLEAR |
0x44 - Interrupt clear
Definition at line 99 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTEN |
0x42 - Interrupt Enable flags
Definition at line 98 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTFLAG |
0x40 - Interrupt Status flags
Definition at line 97 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTPCTRL |
0x48 - Interrupt pulse control
Definition at line 101 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTPHIGH |
0x4C - Interrupt puls high period
Definition at line 103 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTPLOW |
0x4A - Interrupt puls low period
Definition at line 102 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::INTSET |
0x46 - Interrupt set
Definition at line 100 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::MAGIC |
0x04 - Should always read 0xEF32
Definition at line 60 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::MBOX_TXCTRL |
0xa2 - BC <-> EFM32 communication channel
Definition at line 114 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::MBOX_TXDATA |
0xa4
Definition at line 115 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::MBOX_TXSTATUS0 |
0xa6
Definition at line 116 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::MBOX_TXSTATUS1 |
0xa8
Definition at line 117 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::PERICON |
0x18 - Peripheral Control, on board switches
Definition at line 71 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::RESERVED4[0x0d] |
0xa0 - Reserved
Definition at line 112 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::RESERVED5[0x0b] |
0xaa - Reserved
Definition at line 119 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::RESERVERD0 |
0x00 - Reserved
Definition at line 58 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::RESERVERD1[0x02] |
0x1C - Reserved
Definition at line 73 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::RESERVERD3[0x19] |
0x50 - Reserved
Definition at line 105 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_BC0 |
0x38 - Board Control registers
Definition at line 92 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_BC1 |
0x3A
Definition at line 93 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_BC2 |
0x3C
Definition at line 94 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_BC3 |
0x3E
Definition at line 95 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_COMMON |
0x2E - Shared register between board controller and EFM32
Definition at line 85 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_EFM0 |
0x30 - EFM32 accessible registers
Definition at line 87 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_EFM1 |
0x32
Definition at line 88 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_EFM2 |
0x34
Definition at line 89 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SCRATCH_EFM3 |
0x36
Definition at line 90 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::SPI_DEMUX |
0x1A - SPI DEMUX
Definition at line 72 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_AEM |
0x0E - AEM button
Definition at line 66 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_CTRL |
0x10 - CPLD control register
Definition at line 67 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_DIP |
0x0A - DIP switch status
Definition at line 64 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_JOYSTICK |
0x0C - Joystick presses
Definition at line 65 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_LEDS |
0x06 - On board LEDs
Definition at line 62 of file bsp_dk_bcreg_3201.h.
__IO uint16_t BC_TypeDef::UIF_PB |
0x08 - Push button PB0-PB4 status
Definition at line 63 of file bsp_dk_bcreg_3201.h.