EFM32 Happy Gecko Software Documentation  efm32hg-doc-5.1.2
em_i2c.h
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1 /***************************************************************************/
33 #ifndef EM_I2C_H
34 #define EM_I2C_H
35 
36 #include "em_device.h"
37 #if defined(I2C_COUNT) && (I2C_COUNT > 0)
38 
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
55 /*******************************************************************************
56  ******************************* DEFINES ***********************************
57  ******************************************************************************/
58 
71 #if defined(_SILICON_LABS_32B_SERIES_0) \
72  && (defined(_EFM32_GECKO_FAMILY) \
73  || defined(_EFM32_TINY_FAMILY) \
74  || defined(_EFM32_ZERO_FAMILY) \
75  || defined(_EFM32_HAPPY_FAMILY))
76 #define I2C_FREQ_STANDARD_MAX 93000
77 #elif defined(_SILICON_LABS_32B_SERIES_0) \
78  && (defined(_EFM32_GIANT_FAMILY) \
79  || defined(_EFM32_WONDER_FAMILY))
80 #define I2C_FREQ_STANDARD_MAX 92000
81 #elif defined(_SILICON_LABS_32B_SERIES_1)
82 // None of the chips on this platform has been characterized on this parameter.
83 // Use same value as on Wonder until further notice.
84 #define I2C_FREQ_STANDARD_MAX 92000
85 #else
86 #error "Unknown device family."
87 #endif
88 
99 #define I2C_FREQ_FAST_MAX 392157
100 
101 
112 #define I2C_FREQ_FASTPLUS_MAX 987167
113 
114 
124 #define I2C_FLAG_WRITE 0x0001
125 
135 #define I2C_FLAG_READ 0x0002
136 
148 #define I2C_FLAG_WRITE_READ 0x0004
149 
159 #define I2C_FLAG_WRITE_WRITE 0x0008
160 
162 #define I2C_FLAG_10BIT_ADDR 0x0010
163 
164 
165 /*******************************************************************************
166  ******************************** ENUMS ************************************
167  ******************************************************************************/
168 
170 typedef enum
171 {
176 
177 
179 typedef enum
180 {
181  /* In progress code (>0) */
184  /* Complete code (=0) */
187  /* Transfer error codes (<0) */
194 
195 
196 /*******************************************************************************
197  ******************************* STRUCTS ***********************************
198  ******************************************************************************/
199 
201 typedef struct
202 {
204  bool enable;
205 
207  bool master;
208 
214  uint32_t refFreq;
215 
220  uint32_t freq;
221 
225 
227 #define I2C_INIT_DEFAULT \
228 { \
229  true, /* Enable when init done */ \
230  true, /* Set to master mode */ \
231  0, /* Use currently configured reference clock */ \
232  I2C_FREQ_STANDARD_MAX, /* Set to standard rate assuring being */ \
233  /* within I2C spec */ \
234  i2cClockHLRStandard /* Set to use 4:4 low/high duty cycle */ \
235 }
236 
237 
252 typedef struct
253 {
262  uint16_t addr;
263 
265  uint16_t flags;
266 
271  struct
272  {
274  uint8_t *data;
275 
283  uint16_t len;
284  } buf[2];
286 
287 
288 /*******************************************************************************
289  ***************************** PROTOTYPES **********************************
290  ******************************************************************************/
291 
292 uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c);
293 void I2C_BusFreqSet(I2C_TypeDef *i2c,
294  uint32_t freqRef,
295  uint32_t freqScl,
296  I2C_ClockHLR_TypeDef i2cMode);
297 void I2C_Enable(I2C_TypeDef *i2c, bool enable);
298 void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init);
299 
300 /***************************************************************************/
311 __STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
312 {
313  i2c->IFC = flags;
314 }
315 
316 
317 /***************************************************************************/
328 __STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
329 {
330  i2c->IEN &= ~(flags);
331 }
332 
333 
334 /***************************************************************************/
350 __STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
351 {
352  i2c->IEN |= flags;
353 }
354 
355 
356 /***************************************************************************/
370 __STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
371 {
372  return i2c->IF;
373 }
374 
375 
376 /***************************************************************************/
393 __STATIC_INLINE uint32_t I2C_IntGetEnabled(I2C_TypeDef *i2c)
394 {
395  uint32_t ien;
396 
397  ien = i2c->IEN;
398  return i2c->IF & ien;
399 }
400 
401 
402 /***************************************************************************/
413 __STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
414 {
415  i2c->IFS = flags;
416 }
417 
418 void I2C_Reset(I2C_TypeDef *i2c);
419 
420 /***************************************************************************/
437 __STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
438 {
439  return ((uint8_t)(i2c->SADDR));
440 }
441 
442 
443 /***************************************************************************/
460 __STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
461 {
462  i2c->SADDR = (uint32_t)addr & 0xfe;
463 }
464 
465 
466 /***************************************************************************/
489 __STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
490 {
491  return ((uint8_t)(i2c->SADDRMASK));
492 }
493 
494 
495 /***************************************************************************/
518 __STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
519 {
520  i2c->SADDRMASK = (uint32_t)mask & 0xfe;
521 }
522 
523 
527 
531 #ifdef __cplusplus
532 }
533 #endif
534 
535 #endif /* defined(I2C_COUNT) && (I2C_COUNT > 0) */
536 #endif /* EM_I2C_H */
__IOM uint32_t SADDR
Definition: efm32hg_i2c.h:48
I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c, I2C_TransferSeq_TypeDef *seq)
Prepare and start an I2C transfer (single master mode only).
Definition: em_i2c.c:807
__STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
Set slave address mask used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:518
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
void I2C_Enable(I2C_TypeDef *i2c, bool enable)
Enable/disable I2C.
Definition: em_i2c.c:335
__IM uint32_t IF
Definition: efm32hg_i2c.h:53
I2C_TransferReturn_TypeDef
Definition: em_i2c.h:179
__STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
Set one or more pending I2C interrupts from SW.
Definition: em_i2c.h:413
void I2C_Reset(I2C_TypeDef *i2c)
Reset I2C to same state as after a HW reset.
Definition: em_i2c.c:380
I2C_ClockHLR_TypeDef clhr
Definition: em_i2c.h:223
void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init)
Initialize I2C.
Definition: em_i2c.c:353
__STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
Get pending I2C interrupt flags.
Definition: em_i2c.h:370
__STATIC_INLINE uint32_t I2C_IntGetEnabled(I2C_TypeDef *i2c)
Get enabled and pending I2C interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_i2c.h:393
__STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
Clear one or more pending I2C interrupts.
Definition: em_i2c.h:311
__STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
Set slave address to use for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:460
__STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
Get slave address used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:437
#define _I2C_CTRL_CLHR_ASYMMETRIC
Definition: efm32hg_i2c.h:107
uint32_t freq
Definition: em_i2c.h:220
void I2C_BusFreqSet(I2C_TypeDef *i2c, uint32_t freqRef, uint32_t freqScl, I2C_ClockHLR_TypeDef i2cMode)
Set I2C bus frequency.
Definition: em_i2c.c:227
__IOM uint32_t IFS
Definition: efm32hg_i2c.h:54
__IOM uint32_t SADDRMASK
Definition: efm32hg_i2c.h:49
Master mode transfer message structure used to define a complete I2C transfer sequence (from start to...
Definition: em_i2c.h:252
uint32_t refFreq
Definition: em_i2c.h:214
__STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
Enable one or more I2C interrupts.
Definition: em_i2c.h:350
__STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
Get slave address mask used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:489
#define _I2C_CTRL_CLHR_FAST
Definition: efm32hg_i2c.h:108
I2C_ClockHLR_TypeDef
Definition: em_i2c.h:170
__STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
Disable one or more I2C interrupts.
Definition: em_i2c.h:328
__IOM uint32_t IFC
Definition: efm32hg_i2c.h:55
uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c)
Get current configured I2C bus frequency.
Definition: em_i2c.c:174
uint16_t addr
Address to use after (repeated) start.
Definition: em_i2c.h:262
#define _I2C_CTRL_CLHR_STANDARD
Definition: efm32hg_i2c.h:106
I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c)
Continue an initiated I2C transfer (single master mode only).
Definition: em_i2c.c:428
__IOM uint32_t IEN
Definition: efm32hg_i2c.h:56