EFM32 Happy Gecko Software Documentation  efm32hg-doc-5.1.2
efm32hg_prs.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t SWPULSE;
44  __IOM uint32_t SWLEVEL;
45  __IOM uint32_t ROUTE;
47  uint32_t RESERVED0[1];
50  uint32_t RESERVED1[6];
51  __IOM uint32_t TRACECTRL;
52 } PRS_TypeDef;
54 /**************************************************************************/
59 /* Bit fields for PRS SWPULSE */
60 #define _PRS_SWPULSE_RESETVALUE 0x00000000UL
61 #define _PRS_SWPULSE_MASK 0x0000003FUL
62 #define PRS_SWPULSE_CH0PULSE (0x1UL << 0)
63 #define _PRS_SWPULSE_CH0PULSE_SHIFT 0
64 #define _PRS_SWPULSE_CH0PULSE_MASK 0x1UL
65 #define _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL
66 #define PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
67 #define PRS_SWPULSE_CH1PULSE (0x1UL << 1)
68 #define _PRS_SWPULSE_CH1PULSE_SHIFT 1
69 #define _PRS_SWPULSE_CH1PULSE_MASK 0x2UL
70 #define _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL
71 #define PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
72 #define PRS_SWPULSE_CH2PULSE (0x1UL << 2)
73 #define _PRS_SWPULSE_CH2PULSE_SHIFT 2
74 #define _PRS_SWPULSE_CH2PULSE_MASK 0x4UL
75 #define _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL
76 #define PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
77 #define PRS_SWPULSE_CH3PULSE (0x1UL << 3)
78 #define _PRS_SWPULSE_CH3PULSE_SHIFT 3
79 #define _PRS_SWPULSE_CH3PULSE_MASK 0x8UL
80 #define _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL
81 #define PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
82 #define PRS_SWPULSE_CH4PULSE (0x1UL << 4)
83 #define _PRS_SWPULSE_CH4PULSE_SHIFT 4
84 #define _PRS_SWPULSE_CH4PULSE_MASK 0x10UL
85 #define _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL
86 #define PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)
87 #define PRS_SWPULSE_CH5PULSE (0x1UL << 5)
88 #define _PRS_SWPULSE_CH5PULSE_SHIFT 5
89 #define _PRS_SWPULSE_CH5PULSE_MASK 0x20UL
90 #define _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL
91 #define PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)
93 /* Bit fields for PRS SWLEVEL */
94 #define _PRS_SWLEVEL_RESETVALUE 0x00000000UL
95 #define _PRS_SWLEVEL_MASK 0x0000003FUL
96 #define PRS_SWLEVEL_CH0LEVEL (0x1UL << 0)
97 #define _PRS_SWLEVEL_CH0LEVEL_SHIFT 0
98 #define _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL
99 #define _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL
100 #define PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
101 #define PRS_SWLEVEL_CH1LEVEL (0x1UL << 1)
102 #define _PRS_SWLEVEL_CH1LEVEL_SHIFT 1
103 #define _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL
104 #define _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL
105 #define PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
106 #define PRS_SWLEVEL_CH2LEVEL (0x1UL << 2)
107 #define _PRS_SWLEVEL_CH2LEVEL_SHIFT 2
108 #define _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL
109 #define _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL
110 #define PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
111 #define PRS_SWLEVEL_CH3LEVEL (0x1UL << 3)
112 #define _PRS_SWLEVEL_CH3LEVEL_SHIFT 3
113 #define _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL
114 #define _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL
115 #define PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
116 #define PRS_SWLEVEL_CH4LEVEL (0x1UL << 4)
117 #define _PRS_SWLEVEL_CH4LEVEL_SHIFT 4
118 #define _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL
119 #define _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL
120 #define PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)
121 #define PRS_SWLEVEL_CH5LEVEL (0x1UL << 5)
122 #define _PRS_SWLEVEL_CH5LEVEL_SHIFT 5
123 #define _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL
124 #define _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL
125 #define PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)
127 /* Bit fields for PRS ROUTE */
128 #define _PRS_ROUTE_RESETVALUE 0x00000000UL
129 #define _PRS_ROUTE_MASK 0x0000070FUL
130 #define PRS_ROUTE_CH0PEN (0x1UL << 0)
131 #define _PRS_ROUTE_CH0PEN_SHIFT 0
132 #define _PRS_ROUTE_CH0PEN_MASK 0x1UL
133 #define _PRS_ROUTE_CH0PEN_DEFAULT 0x00000000UL
134 #define PRS_ROUTE_CH0PEN_DEFAULT (_PRS_ROUTE_CH0PEN_DEFAULT << 0)
135 #define PRS_ROUTE_CH1PEN (0x1UL << 1)
136 #define _PRS_ROUTE_CH1PEN_SHIFT 1
137 #define _PRS_ROUTE_CH1PEN_MASK 0x2UL
138 #define _PRS_ROUTE_CH1PEN_DEFAULT 0x00000000UL
139 #define PRS_ROUTE_CH1PEN_DEFAULT (_PRS_ROUTE_CH1PEN_DEFAULT << 1)
140 #define PRS_ROUTE_CH2PEN (0x1UL << 2)
141 #define _PRS_ROUTE_CH2PEN_SHIFT 2
142 #define _PRS_ROUTE_CH2PEN_MASK 0x4UL
143 #define _PRS_ROUTE_CH2PEN_DEFAULT 0x00000000UL
144 #define PRS_ROUTE_CH2PEN_DEFAULT (_PRS_ROUTE_CH2PEN_DEFAULT << 2)
145 #define PRS_ROUTE_CH3PEN (0x1UL << 3)
146 #define _PRS_ROUTE_CH3PEN_SHIFT 3
147 #define _PRS_ROUTE_CH3PEN_MASK 0x8UL
148 #define _PRS_ROUTE_CH3PEN_DEFAULT 0x00000000UL
149 #define PRS_ROUTE_CH3PEN_DEFAULT (_PRS_ROUTE_CH3PEN_DEFAULT << 3)
150 #define _PRS_ROUTE_LOCATION_SHIFT 8
151 #define _PRS_ROUTE_LOCATION_MASK 0x700UL
152 #define _PRS_ROUTE_LOCATION_LOC0 0x00000000UL
153 #define _PRS_ROUTE_LOCATION_DEFAULT 0x00000000UL
154 #define _PRS_ROUTE_LOCATION_LOC1 0x00000001UL
155 #define _PRS_ROUTE_LOCATION_LOC2 0x00000002UL
156 #define _PRS_ROUTE_LOCATION_LOC3 0x00000003UL
157 #define PRS_ROUTE_LOCATION_LOC0 (_PRS_ROUTE_LOCATION_LOC0 << 8)
158 #define PRS_ROUTE_LOCATION_DEFAULT (_PRS_ROUTE_LOCATION_DEFAULT << 8)
159 #define PRS_ROUTE_LOCATION_LOC1 (_PRS_ROUTE_LOCATION_LOC1 << 8)
160 #define PRS_ROUTE_LOCATION_LOC2 (_PRS_ROUTE_LOCATION_LOC2 << 8)
161 #define PRS_ROUTE_LOCATION_LOC3 (_PRS_ROUTE_LOCATION_LOC3 << 8)
163 /* Bit fields for PRS CH_CTRL */
164 #define _PRS_CH_CTRL_RESETVALUE 0x00000000UL
165 #define _PRS_CH_CTRL_MASK 0x133F0007UL
166 #define _PRS_CH_CTRL_SIGSEL_SHIFT 0
167 #define _PRS_CH_CTRL_SIGSEL_MASK 0x7UL
168 #define _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL
169 #define _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL
170 #define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL
171 #define _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL
172 #define _PRS_CH_CTRL_SIGSEL_USART1IRTX 0x00000000UL
173 #define _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL
174 #define _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL
175 #define _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL
176 #define _PRS_CH_CTRL_SIGSEL_USBSOF 0x00000000UL
177 #define _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL
178 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL
179 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL
180 #define _PRS_CH_CTRL_SIGSEL_PCNT0TCC 0x00000000UL
181 #define _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL
182 #define _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL
183 #define _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL
184 #define _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL
185 #define _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL
186 #define _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL
187 #define _PRS_CH_CTRL_SIGSEL_USBSOFSR 0x00000001UL
188 #define _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL
189 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL
190 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL
191 #define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL
192 #define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL
193 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL
194 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL
195 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL
196 #define _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL
197 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL
198 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL
199 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL
200 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL
201 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL
202 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL
203 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL
204 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL
205 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL
206 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL
207 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL
208 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL
209 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL
210 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL
211 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL
212 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL
213 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL
214 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL
215 #define PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
216 #define PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
217 #define PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
218 #define PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)
219 #define PRS_CH_CTRL_SIGSEL_USART1IRTX (_PRS_CH_CTRL_SIGSEL_USART1IRTX << 0)
220 #define PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
221 #define PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
222 #define PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)
223 #define PRS_CH_CTRL_SIGSEL_USBSOF (_PRS_CH_CTRL_SIGSEL_USBSOF << 0)
224 #define PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
225 #define PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
226 #define PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
227 #define PRS_CH_CTRL_SIGSEL_PCNT0TCC (_PRS_CH_CTRL_SIGSEL_PCNT0TCC << 0)
228 #define PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
229 #define PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)
230 #define PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
231 #define PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
232 #define PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
233 #define PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)
234 #define PRS_CH_CTRL_SIGSEL_USBSOFSR (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0)
235 #define PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
236 #define PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
237 #define PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
238 #define PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)
239 #define PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
240 #define PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
241 #define PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
242 #define PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)
243 #define PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
244 #define PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
245 #define PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
246 #define PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
247 #define PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
248 #define PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)
249 #define PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
250 #define PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
251 #define PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
252 #define PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
253 #define PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)
254 #define PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
255 #define PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
256 #define PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
257 #define PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
258 #define PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
259 #define PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
260 #define PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
261 #define PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
262 #define _PRS_CH_CTRL_SOURCESEL_SHIFT 16
263 #define _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL
264 #define _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL
265 #define _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL
266 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL
267 #define _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL
268 #define _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL
269 #define _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL
270 #define _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL
271 #define _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL
272 #define _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL
273 #define _PRS_CH_CTRL_SOURCESEL_USB 0x00000024UL
274 #define _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL
275 #define _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL
276 #define _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL
277 #define _PRS_CH_CTRL_SOURCESEL_PCNT0 0x00000036UL
278 #define PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
279 #define PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
280 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
281 #define PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
282 #define PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)
283 #define PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
284 #define PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
285 #define PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
286 #define PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)
287 #define PRS_CH_CTRL_SOURCESEL_USB (_PRS_CH_CTRL_SOURCESEL_USB << 16)
288 #define PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
289 #define PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
290 #define PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
291 #define PRS_CH_CTRL_SOURCESEL_PCNT0 (_PRS_CH_CTRL_SOURCESEL_PCNT0 << 16)
292 #define _PRS_CH_CTRL_EDSEL_SHIFT 24
293 #define _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL
294 #define _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL
295 #define _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL
296 #define _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL
297 #define _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL
298 #define _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL
299 #define PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
300 #define PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24)
301 #define PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
302 #define PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
303 #define PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)
304 #define PRS_CH_CTRL_ASYNC (0x1UL << 28)
305 #define _PRS_CH_CTRL_ASYNC_SHIFT 28
306 #define _PRS_CH_CTRL_ASYNC_MASK 0x10000000UL
307 #define _PRS_CH_CTRL_ASYNC_DEFAULT 0x00000000UL
308 #define PRS_CH_CTRL_ASYNC_DEFAULT (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)
310 /* Bit fields for PRS TRACECTRL */
311 #define _PRS_TRACECTRL_RESETVALUE 0x00000000UL
312 #define _PRS_TRACECTRL_MASK 0x00000F0FUL
313 #define PRS_TRACECTRL_TSTARTEN (0x1UL << 0)
314 #define _PRS_TRACECTRL_TSTARTEN_SHIFT 0
315 #define _PRS_TRACECTRL_TSTARTEN_MASK 0x1UL
316 #define _PRS_TRACECTRL_TSTARTEN_DEFAULT 0x00000000UL
317 #define PRS_TRACECTRL_TSTARTEN_DEFAULT (_PRS_TRACECTRL_TSTARTEN_DEFAULT << 0)
318 #define _PRS_TRACECTRL_TSTART_SHIFT 1
319 #define _PRS_TRACECTRL_TSTART_MASK 0xEUL
320 #define _PRS_TRACECTRL_TSTART_DEFAULT 0x00000000UL
321 #define _PRS_TRACECTRL_TSTART_PRSCH0 0x00000000UL
322 #define _PRS_TRACECTRL_TSTART_PRSCH1 0x00000001UL
323 #define _PRS_TRACECTRL_TSTART_PRSCH2 0x00000002UL
324 #define _PRS_TRACECTRL_TSTART_PRSCH3 0x00000003UL
325 #define _PRS_TRACECTRL_TSTART_PRSCH4 0x00000004UL
326 #define _PRS_TRACECTRL_TSTART_PRSCH5 0x00000005UL
327 #define PRS_TRACECTRL_TSTART_DEFAULT (_PRS_TRACECTRL_TSTART_DEFAULT << 1)
328 #define PRS_TRACECTRL_TSTART_PRSCH0 (_PRS_TRACECTRL_TSTART_PRSCH0 << 1)
329 #define PRS_TRACECTRL_TSTART_PRSCH1 (_PRS_TRACECTRL_TSTART_PRSCH1 << 1)
330 #define PRS_TRACECTRL_TSTART_PRSCH2 (_PRS_TRACECTRL_TSTART_PRSCH2 << 1)
331 #define PRS_TRACECTRL_TSTART_PRSCH3 (_PRS_TRACECTRL_TSTART_PRSCH3 << 1)
332 #define PRS_TRACECTRL_TSTART_PRSCH4 (_PRS_TRACECTRL_TSTART_PRSCH4 << 1)
333 #define PRS_TRACECTRL_TSTART_PRSCH5 (_PRS_TRACECTRL_TSTART_PRSCH5 << 1)
334 #define PRS_TRACECTRL_TSTOPEN (0x1UL << 8)
335 #define _PRS_TRACECTRL_TSTOPEN_SHIFT 8
336 #define _PRS_TRACECTRL_TSTOPEN_MASK 0x100UL
337 #define _PRS_TRACECTRL_TSTOPEN_DEFAULT 0x00000000UL
338 #define PRS_TRACECTRL_TSTOPEN_DEFAULT (_PRS_TRACECTRL_TSTOPEN_DEFAULT << 8)
339 #define _PRS_TRACECTRL_TSTOP_SHIFT 9
340 #define _PRS_TRACECTRL_TSTOP_MASK 0xE00UL
341 #define _PRS_TRACECTRL_TSTOP_DEFAULT 0x00000000UL
342 #define _PRS_TRACECTRL_TSTOP_PRSCH0 0x00000000UL
343 #define _PRS_TRACECTRL_TSTOP_PRSCH1 0x00000001UL
344 #define _PRS_TRACECTRL_TSTOP_PRSCH2 0x00000002UL
345 #define _PRS_TRACECTRL_TSTOP_PRSCH3 0x00000003UL
346 #define _PRS_TRACECTRL_TSTOP_PRSCH4 0x00000004UL
347 #define _PRS_TRACECTRL_TSTOP_PRSCH5 0x00000005UL
348 #define PRS_TRACECTRL_TSTOP_DEFAULT (_PRS_TRACECTRL_TSTOP_DEFAULT << 9)
349 #define PRS_TRACECTRL_TSTOP_PRSCH0 (_PRS_TRACECTRL_TSTOP_PRSCH0 << 9)
350 #define PRS_TRACECTRL_TSTOP_PRSCH1 (_PRS_TRACECTRL_TSTOP_PRSCH1 << 9)
351 #define PRS_TRACECTRL_TSTOP_PRSCH2 (_PRS_TRACECTRL_TSTOP_PRSCH2 << 9)
352 #define PRS_TRACECTRL_TSTOP_PRSCH3 (_PRS_TRACECTRL_TSTOP_PRSCH3 << 9)
353 #define PRS_TRACECTRL_TSTOP_PRSCH4 (_PRS_TRACECTRL_TSTOP_PRSCH4 << 9)
354 #define PRS_TRACECTRL_TSTOP_PRSCH5 (_PRS_TRACECTRL_TSTOP_PRSCH5 << 9)
__IOM uint32_t ROUTE
Definition: efm32hg_prs.h:45
PRS_CH EFM32HG PRS CH.
__IOM uint32_t SWLEVEL
Definition: efm32hg_prs.h:44
__IOM uint32_t SWPULSE
Definition: efm32hg_prs.h:43
__IOM uint32_t TRACECTRL
Definition: efm32hg_prs.h:51