EFM32 Happy Gecko Software Documentation  efm32hg-doc-5.1.2
efm32hg_idac.h
Go to the documentation of this file.
1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CURPROG;
45  __IOM uint32_t CAL;
46  __IOM uint32_t DUTYCONFIG;
47 } IDAC_TypeDef;
49 /**************************************************************************/
54 /* Bit fields for IDAC CTRL */
55 #define _IDAC_CTRL_RESETVALUE 0x00000000UL
56 #define _IDAC_CTRL_MASK 0x0074001FUL
57 #define IDAC_CTRL_EN (0x1UL << 0)
58 #define _IDAC_CTRL_EN_SHIFT 0
59 #define _IDAC_CTRL_EN_MASK 0x1UL
60 #define _IDAC_CTRL_EN_DEFAULT 0x00000000UL
61 #define IDAC_CTRL_EN_DEFAULT (_IDAC_CTRL_EN_DEFAULT << 0)
62 #define IDAC_CTRL_CURSINK (0x1UL << 1)
63 #define _IDAC_CTRL_CURSINK_SHIFT 1
64 #define _IDAC_CTRL_CURSINK_MASK 0x2UL
65 #define _IDAC_CTRL_CURSINK_DEFAULT 0x00000000UL
66 #define IDAC_CTRL_CURSINK_DEFAULT (_IDAC_CTRL_CURSINK_DEFAULT << 1)
67 #define IDAC_CTRL_MINOUTTRANS (0x1UL << 2)
68 #define _IDAC_CTRL_MINOUTTRANS_SHIFT 2
69 #define _IDAC_CTRL_MINOUTTRANS_MASK 0x4UL
70 #define _IDAC_CTRL_MINOUTTRANS_DEFAULT 0x00000000UL
71 #define IDAC_CTRL_MINOUTTRANS_DEFAULT (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)
72 #define IDAC_CTRL_OUTEN (0x1UL << 3)
73 #define _IDAC_CTRL_OUTEN_SHIFT 3
74 #define _IDAC_CTRL_OUTEN_MASK 0x8UL
75 #define _IDAC_CTRL_OUTEN_DEFAULT 0x00000000UL
76 #define IDAC_CTRL_OUTEN_DEFAULT (_IDAC_CTRL_OUTEN_DEFAULT << 3)
77 #define IDAC_CTRL_OUTMODE (0x1UL << 4)
78 #define _IDAC_CTRL_OUTMODE_SHIFT 4
79 #define _IDAC_CTRL_OUTMODE_MASK 0x10UL
80 #define _IDAC_CTRL_OUTMODE_DEFAULT 0x00000000UL
81 #define _IDAC_CTRL_OUTMODE_PIN 0x00000000UL
82 #define _IDAC_CTRL_OUTMODE_ADC 0x00000001UL
83 #define IDAC_CTRL_OUTMODE_DEFAULT (_IDAC_CTRL_OUTMODE_DEFAULT << 4)
84 #define IDAC_CTRL_OUTMODE_PIN (_IDAC_CTRL_OUTMODE_PIN << 4)
85 #define IDAC_CTRL_OUTMODE_ADC (_IDAC_CTRL_OUTMODE_ADC << 4)
86 #define IDAC_CTRL_OUTENPRS (0x1UL << 18)
87 #define _IDAC_CTRL_OUTENPRS_SHIFT 18
88 #define _IDAC_CTRL_OUTENPRS_MASK 0x40000UL
89 #define _IDAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL
90 #define IDAC_CTRL_OUTENPRS_DEFAULT (_IDAC_CTRL_OUTENPRS_DEFAULT << 18)
91 #define _IDAC_CTRL_PRSSEL_SHIFT 20
92 #define _IDAC_CTRL_PRSSEL_MASK 0x700000UL
93 #define _IDAC_CTRL_PRSSEL_DEFAULT 0x00000000UL
94 #define _IDAC_CTRL_PRSSEL_PRSCH0 0x00000000UL
95 #define _IDAC_CTRL_PRSSEL_PRSCH1 0x00000001UL
96 #define _IDAC_CTRL_PRSSEL_PRSCH2 0x00000002UL
97 #define _IDAC_CTRL_PRSSEL_PRSCH3 0x00000003UL
98 #define _IDAC_CTRL_PRSSEL_PRSCH4 0x00000004UL
99 #define _IDAC_CTRL_PRSSEL_PRSCH5 0x00000005UL
100 #define IDAC_CTRL_PRSSEL_DEFAULT (_IDAC_CTRL_PRSSEL_DEFAULT << 20)
101 #define IDAC_CTRL_PRSSEL_PRSCH0 (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)
102 #define IDAC_CTRL_PRSSEL_PRSCH1 (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)
103 #define IDAC_CTRL_PRSSEL_PRSCH2 (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)
104 #define IDAC_CTRL_PRSSEL_PRSCH3 (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)
105 #define IDAC_CTRL_PRSSEL_PRSCH4 (_IDAC_CTRL_PRSSEL_PRSCH4 << 20)
106 #define IDAC_CTRL_PRSSEL_PRSCH5 (_IDAC_CTRL_PRSSEL_PRSCH5 << 20)
108 /* Bit fields for IDAC CURPROG */
109 #define _IDAC_CURPROG_RESETVALUE 0x00000000UL
110 #define _IDAC_CURPROG_MASK 0x00001F03UL
111 #define _IDAC_CURPROG_RANGESEL_SHIFT 0
112 #define _IDAC_CURPROG_RANGESEL_MASK 0x3UL
113 #define _IDAC_CURPROG_RANGESEL_DEFAULT 0x00000000UL
114 #define _IDAC_CURPROG_RANGESEL_RANGE0 0x00000000UL
115 #define _IDAC_CURPROG_RANGESEL_RANGE1 0x00000001UL
116 #define _IDAC_CURPROG_RANGESEL_RANGE2 0x00000002UL
117 #define _IDAC_CURPROG_RANGESEL_RANGE3 0x00000003UL
118 #define IDAC_CURPROG_RANGESEL_DEFAULT (_IDAC_CURPROG_RANGESEL_DEFAULT << 0)
119 #define IDAC_CURPROG_RANGESEL_RANGE0 (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)
120 #define IDAC_CURPROG_RANGESEL_RANGE1 (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)
121 #define IDAC_CURPROG_RANGESEL_RANGE2 (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)
122 #define IDAC_CURPROG_RANGESEL_RANGE3 (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)
123 #define _IDAC_CURPROG_STEPSEL_SHIFT 8
124 #define _IDAC_CURPROG_STEPSEL_MASK 0x1F00UL
125 #define _IDAC_CURPROG_STEPSEL_DEFAULT 0x00000000UL
126 #define IDAC_CURPROG_STEPSEL_DEFAULT (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)
128 /* Bit fields for IDAC CAL */
129 #define _IDAC_CAL_RESETVALUE 0x00000000UL
130 #define _IDAC_CAL_MASK 0x0000007FUL
131 #define _IDAC_CAL_TUNING_SHIFT 0
132 #define _IDAC_CAL_TUNING_MASK 0x7FUL
133 #define _IDAC_CAL_TUNING_DEFAULT 0x00000000UL
134 #define IDAC_CAL_TUNING_DEFAULT (_IDAC_CAL_TUNING_DEFAULT << 0)
136 /* Bit fields for IDAC DUTYCONFIG */
137 #define _IDAC_DUTYCONFIG_RESETVALUE 0x00000000UL
138 #define _IDAC_DUTYCONFIG_MASK 0x00000003UL
139 #define IDAC_DUTYCONFIG_DUTYCYCLEEN (0x1UL << 0)
140 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT 0
141 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK 0x1UL
142 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT 0x00000000UL
143 #define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT (_IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)
144 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS (0x1UL << 1)
145 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT 1
146 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK 0x2UL
147 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT 0x00000000UL
148 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)
__IOM uint32_t CAL
Definition: efm32hg_idac.h:45
__IOM uint32_t CTRL
Definition: efm32hg_idac.h:43
__IOM uint32_t CURPROG
Definition: efm32hg_idac.h:44
__IOM uint32_t DUTYCONFIG
Definition: efm32hg_idac.h:46