efm32hg/html/efm32hg__idac_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   __IOM uint32_t CURPROG;

   __IOM uint32_t CAL;

   __IOM uint32_t DUTYCONFIG;

 } IDAC_TypeDef;

 /**************************************************************************/

 /* Bit fields for IDAC CTRL */

 #define _IDAC_CTRL_RESETVALUE                       0x00000000UL

 #define _IDAC_CTRL_MASK                             0x0074001FUL

 #define IDAC_CTRL_EN                                (0x1UL << 0)

 #define _IDAC_CTRL_EN_SHIFT                         0

 #define _IDAC_CTRL_EN_MASK                          0x1UL

 #define _IDAC_CTRL_EN_DEFAULT                       0x00000000UL

 #define IDAC_CTRL_EN_DEFAULT                        (_IDAC_CTRL_EN_DEFAULT << 0)

 #define IDAC_CTRL_CURSINK                           (0x1UL << 1)

 #define _IDAC_CTRL_CURSINK_SHIFT                    1

 #define _IDAC_CTRL_CURSINK_MASK                     0x2UL

 #define _IDAC_CTRL_CURSINK_DEFAULT                  0x00000000UL

 #define IDAC_CTRL_CURSINK_DEFAULT                   (_IDAC_CTRL_CURSINK_DEFAULT << 1)

 #define IDAC_CTRL_MINOUTTRANS                       (0x1UL << 2)

 #define _IDAC_CTRL_MINOUTTRANS_SHIFT                2

 #define _IDAC_CTRL_MINOUTTRANS_MASK                 0x4UL

 #define _IDAC_CTRL_MINOUTTRANS_DEFAULT              0x00000000UL

 #define IDAC_CTRL_MINOUTTRANS_DEFAULT               (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)

 #define IDAC_CTRL_OUTEN                             (0x1UL << 3)

 #define _IDAC_CTRL_OUTEN_SHIFT                      3

 #define _IDAC_CTRL_OUTEN_MASK                       0x8UL

 #define _IDAC_CTRL_OUTEN_DEFAULT                    0x00000000UL

 #define IDAC_CTRL_OUTEN_DEFAULT                     (_IDAC_CTRL_OUTEN_DEFAULT << 3)

 #define IDAC_CTRL_OUTMODE                           (0x1UL << 4)

 #define _IDAC_CTRL_OUTMODE_SHIFT                    4

 #define _IDAC_CTRL_OUTMODE_MASK                     0x10UL

 #define _IDAC_CTRL_OUTMODE_DEFAULT                  0x00000000UL

 #define _IDAC_CTRL_OUTMODE_PIN                      0x00000000UL

 #define _IDAC_CTRL_OUTMODE_ADC                      0x00000001UL

 #define IDAC_CTRL_OUTMODE_DEFAULT                   (_IDAC_CTRL_OUTMODE_DEFAULT << 4)

 #define IDAC_CTRL_OUTMODE_PIN                       (_IDAC_CTRL_OUTMODE_PIN << 4)

 #define IDAC_CTRL_OUTMODE_ADC                       (_IDAC_CTRL_OUTMODE_ADC << 4)

 #define IDAC_CTRL_OUTENPRS                          (0x1UL << 18)

 #define _IDAC_CTRL_OUTENPRS_SHIFT                   18

 #define _IDAC_CTRL_OUTENPRS_MASK                    0x40000UL

 #define _IDAC_CTRL_OUTENPRS_DEFAULT                 0x00000000UL

 #define IDAC_CTRL_OUTENPRS_DEFAULT                  (_IDAC_CTRL_OUTENPRS_DEFAULT << 18)

 #define _IDAC_CTRL_PRSSEL_SHIFT                     20

 #define _IDAC_CTRL_PRSSEL_MASK                      0x700000UL

 #define _IDAC_CTRL_PRSSEL_DEFAULT                   0x00000000UL

 #define _IDAC_CTRL_PRSSEL_PRSCH0                    0x00000000UL

 #define _IDAC_CTRL_PRSSEL_PRSCH1                    0x00000001UL

 #define _IDAC_CTRL_PRSSEL_PRSCH2                    0x00000002UL

 #define _IDAC_CTRL_PRSSEL_PRSCH3                    0x00000003UL

 #define _IDAC_CTRL_PRSSEL_PRSCH4                    0x00000004UL

 #define _IDAC_CTRL_PRSSEL_PRSCH5                    0x00000005UL

 #define IDAC_CTRL_PRSSEL_DEFAULT                    (_IDAC_CTRL_PRSSEL_DEFAULT << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH0                     (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH1                     (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH2                     (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH3                     (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH4                     (_IDAC_CTRL_PRSSEL_PRSCH4 << 20)

 #define IDAC_CTRL_PRSSEL_PRSCH5                     (_IDAC_CTRL_PRSSEL_PRSCH5 << 20)

 /* Bit fields for IDAC CURPROG */

 #define _IDAC_CURPROG_RESETVALUE                    0x00000000UL

 #define _IDAC_CURPROG_MASK                          0x00001F03UL

 #define _IDAC_CURPROG_RANGESEL_SHIFT                0

 #define _IDAC_CURPROG_RANGESEL_MASK                 0x3UL

 #define _IDAC_CURPROG_RANGESEL_DEFAULT              0x00000000UL

 #define _IDAC_CURPROG_RANGESEL_RANGE0               0x00000000UL

 #define _IDAC_CURPROG_RANGESEL_RANGE1               0x00000001UL

 #define _IDAC_CURPROG_RANGESEL_RANGE2               0x00000002UL

 #define _IDAC_CURPROG_RANGESEL_RANGE3               0x00000003UL

 #define IDAC_CURPROG_RANGESEL_DEFAULT               (_IDAC_CURPROG_RANGESEL_DEFAULT << 0)

 #define IDAC_CURPROG_RANGESEL_RANGE0                (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)

 #define IDAC_CURPROG_RANGESEL_RANGE1                (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)

 #define IDAC_CURPROG_RANGESEL_RANGE2                (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)

 #define IDAC_CURPROG_RANGESEL_RANGE3                (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)

 #define _IDAC_CURPROG_STEPSEL_SHIFT                 8

 #define _IDAC_CURPROG_STEPSEL_MASK                  0x1F00UL

 #define _IDAC_CURPROG_STEPSEL_DEFAULT               0x00000000UL

 #define IDAC_CURPROG_STEPSEL_DEFAULT                (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)

 /* Bit fields for IDAC CAL */

 #define _IDAC_CAL_RESETVALUE                        0x00000000UL

 #define _IDAC_CAL_MASK                              0x0000007FUL

 #define _IDAC_CAL_TUNING_SHIFT                      0

 #define _IDAC_CAL_TUNING_MASK                       0x7FUL

 #define _IDAC_CAL_TUNING_DEFAULT                    0x00000000UL

 #define IDAC_CAL_TUNING_DEFAULT                     (_IDAC_CAL_TUNING_DEFAULT << 0)

 /* Bit fields for IDAC DUTYCONFIG */

 #define _IDAC_DUTYCONFIG_RESETVALUE                 0x00000000UL

 #define _IDAC_DUTYCONFIG_MASK                       0x00000003UL

 #define IDAC_DUTYCONFIG_DUTYCYCLEEN                 (0x1UL << 0)

 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT          0

 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK           0x1UL

 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT        0x00000000UL

 #define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT         (_IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)

 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS             (0x1UL << 1)

 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT      1

 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK       0x2UL

 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT    0x00000000UL

 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT     (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)

IDAC_TypeDef
Definition: efm32hg_idac.h:41

IDAC_TypeDef::CAL
__IOM uint32_t CAL
Definition: efm32hg_idac.h:45

IDAC_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32hg_idac.h:43

IDAC_TypeDef::CURPROG
__IOM uint32_t CURPROG
Definition: efm32hg_idac.h:44

IDAC_TypeDef::DUTYCONFIG
__IOM uint32_t DUTYCONFIG
Definition: efm32hg_idac.h:46