em_usart.h

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/***************************************************************************/
#ifndef EM_USART_H
#define EM_USART_H

#include "em_device.h"
#if defined(USART_COUNT) && (USART_COUNT > 0)

#include <stdbool.h>

#ifdef __cplusplus
extern "C" {
#endif

/***************************************************************************/
/***************************************************************************/
/*******************************************************************************
 ********************************   ENUMS   ************************************
 ******************************************************************************/

typedef enum
{
  usartDatabits4  = USART_FRAME_DATABITS_FOUR,     
  usartDatabits5  = USART_FRAME_DATABITS_FIVE,     
  usartDatabits6  = USART_FRAME_DATABITS_SIX,      
  usartDatabits7  = USART_FRAME_DATABITS_SEVEN,    
  usartDatabits8  = USART_FRAME_DATABITS_EIGHT,    
  usartDatabits9  = USART_FRAME_DATABITS_NINE,     
  usartDatabits10 = USART_FRAME_DATABITS_TEN,      
  usartDatabits11 = USART_FRAME_DATABITS_ELEVEN,   
  usartDatabits12 = USART_FRAME_DATABITS_TWELVE,   
  usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, 
  usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, 
  usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN,  
  usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN   
} USART_Databits_TypeDef;


typedef enum
{
  usartDisable  = 0x0,

  usartEnableRx = USART_CMD_RXEN,

  usartEnableTx = USART_CMD_TXEN,

  usartEnable   = (USART_CMD_RXEN | USART_CMD_TXEN)
} USART_Enable_TypeDef;


typedef enum
{
  usartOVS16 = USART_CTRL_OVS_X16,     
  usartOVS8  = USART_CTRL_OVS_X8,      
  usartOVS6  = USART_CTRL_OVS_X6,      
  usartOVS4  = USART_CTRL_OVS_X4       
} USART_OVS_TypeDef;


typedef enum
{
  usartNoParity   = USART_FRAME_PARITY_NONE,    
  usartEvenParity = USART_FRAME_PARITY_EVEN,    
  usartOddParity  = USART_FRAME_PARITY_ODD      
} USART_Parity_TypeDef;


typedef enum
{
  usartStopbits0p5 = USART_FRAME_STOPBITS_HALF,        
  usartStopbits1   = USART_FRAME_STOPBITS_ONE,         
  usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, 
  usartStopbits2   = USART_FRAME_STOPBITS_TWO          
} USART_Stopbits_TypeDef;


typedef enum
{
  usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,

  usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,

  usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,

  usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
} USART_ClockMode_TypeDef;


typedef enum
{
  usartIrDAPwONE   = USART_IRCTRL_IRPW_ONE,

  usartIrDAPwTWO   = USART_IRCTRL_IRPW_TWO,

  usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,

  usartIrDAPwFOUR  = USART_IRCTRL_IRPW_FOUR
} USART_IrDAPw_Typedef;


typedef enum
{
  usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0,       
  usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1,       
  usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2,       
  usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3,       
#if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
  usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4,       
#endif
#if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
  usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5,       
#endif
#if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
  usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6,       
#endif
#if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
  usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7,       
#endif
} USART_IrDAPrsSel_Typedef;

#if defined(_USART_I2SCTRL_MASK)

typedef enum
{
  usartI2sFormatW32D32  = USART_I2SCTRL_FORMAT_W32D32,   
  usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M,  
  usartI2sFormatW32D24  = USART_I2SCTRL_FORMAT_W32D24,   
  usartI2sFormatW32D16  = USART_I2SCTRL_FORMAT_W32D16,   
  usartI2sFormatW32D8   = USART_I2SCTRL_FORMAT_W32D8,    
  usartI2sFormatW16D16  = USART_I2SCTRL_FORMAT_W16D16,   
  usartI2sFormatW16D8   = USART_I2SCTRL_FORMAT_W16D8,    
  usartI2sFormatW8D8    = USART_I2SCTRL_FORMAT_W8D8      
} USART_I2sFormat_TypeDef;

typedef enum
{
  usartI2sJustifyLeft  = USART_I2SCTRL_JUSTIFY_LEFT,  
  usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT  
} USART_I2sJustify_TypeDef;
#endif

#if defined(_USART_INPUT_MASK)

typedef enum
{
  usartPrsRxCh0  = USART_INPUT_RXPRSSEL_PRSCH0,    
  usartPrsRxCh1  = USART_INPUT_RXPRSSEL_PRSCH1,    
  usartPrsRxCh2  = USART_INPUT_RXPRSSEL_PRSCH2,    
  usartPrsRxCh3  = USART_INPUT_RXPRSSEL_PRSCH3,    
#if defined(USART_INPUT_RXPRSSEL_PRSCH7)
  usartPrsRxCh4  = USART_INPUT_RXPRSSEL_PRSCH4,    
  usartPrsRxCh5  = USART_INPUT_RXPRSSEL_PRSCH5,    
  usartPrsRxCh6  = USART_INPUT_RXPRSSEL_PRSCH6,    
  usartPrsRxCh7  = USART_INPUT_RXPRSSEL_PRSCH7,    
#endif

#if defined(USART_INPUT_RXPRSSEL_PRSCH11)
  usartPrsRxCh8  = USART_INPUT_RXPRSSEL_PRSCH8,    
  usartPrsRxCh9  = USART_INPUT_RXPRSSEL_PRSCH9,    
  usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10,   
  usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11    
#endif
} USART_PrsRxCh_TypeDef;
#endif

typedef enum
{
  usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, 
  usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, 
  usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, 
  usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, 
#if defined(USART_TRIGCTRL_TSEL_PRSCH7)
  usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, 
  usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, 
  usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, 
  usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, 
#endif
} USART_PrsTriggerCh_TypeDef;

/*******************************************************************************
 *******************************   STRUCTS   ***********************************
 ******************************************************************************/

typedef struct
{
  USART_Enable_TypeDef   enable;

  uint32_t               refFreq;

  uint32_t               baudrate;

  USART_OVS_TypeDef      oversampling;

  USART_Databits_TypeDef databits;

  USART_Parity_TypeDef   parity;

  USART_Stopbits_TypeDef stopbits;

#if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)

  bool                   mvdis;

  bool                   prsRxEnable;

  USART_PrsRxCh_TypeDef  prsRxCh;
#endif
#if defined(_USART_TIMING_CSHOLD_MASK)

  bool                  autoCsEnable;
  uint8_t               autoCsHold;
  uint8_t               autoCsSetup;
#endif
} USART_InitAsync_TypeDef;

typedef struct
{
#if defined(USART_TRIGCTRL_AUTOTXTEN)

  bool autoTxTriggerEnable;
#endif

  bool rxTriggerEnable;
  bool txTriggerEnable;
  USART_PrsTriggerCh_TypeDef prsTriggerChannel;
} USART_PrsTriggerInit_TypeDef;

#if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
#define USART_INITASYNC_DEFAULT                                                            \
{                                                                                          \
  usartEnable,      /* Enable RX/TX when init completed. */                                \
  0,                /* Use current configured reference clock for configuring baudrate. */ \
  115200,           /* 115200 bits/s. */                                                   \
  usartOVS16,       /* 16x oversampling. */                                                \
  usartDatabits8,   /* 8 databits. */                                                      \
  usartNoParity,    /* No parity. */                                                       \
  usartStopbits1,   /* 1 stopbit. */                                                       \
  false,            /* Do not disable majority vote. */                                    \
  false,            /* Not USART PRS input mode. */                                        \
  usartPrsRxCh0,    /* PRS channel 0. */                                                   \
  false,            /* Auto CS functionality enable/disable switch */                      \
  0,                /* Auto CS Hold cycles */                                              \
  0                 /* Auto CS Setup cycles */                                             \
}
#elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
#define USART_INITASYNC_DEFAULT                                                            \
{                                                                                          \
  usartEnable,      /* Enable RX/TX when init completed. */                                \
  0,                /* Use current configured reference clock for configuring baudrate. */ \
  115200,           /* 115200 bits/s. */                                                   \
  usartOVS16,       /* 16x oversampling. */                                                \
  usartDatabits8,   /* 8 databits. */                                                      \
  usartNoParity,    /* No parity. */                                                       \
  usartStopbits1,   /* 1 stopbit. */                                                       \
  false,            /* Do not disable majority vote. */                                    \
  false,            /* Not USART PRS input mode. */                                        \
  usartPrsRxCh0     /* PRS channel 0. */                                                   \
}
#else
#define USART_INITASYNC_DEFAULT                                                            \
{                                                                                          \
  usartEnable,      /* Enable RX/TX when init completed. */                                \
  0,                /* Use current configured reference clock for configuring baudrate. */ \
  115200,           /* 115200 bits/s. */                                                   \
  usartOVS16,       /* 16x oversampling. */                                                \
  usartDatabits8,   /* 8 databits. */                                                      \
  usartNoParity,    /* No parity. */                                                       \
  usartStopbits1    /* 1 stopbit. */                                                       \
}
#endif

#if defined(USART_TRIGCTRL_AUTOTXTEN)
#define USART_INITPRSTRIGGER_DEFAULT                                                       \
{                                                                                          \
  false,              /* Do not enable autoTX triggering. */                               \
  false,              /* Do not enable receive triggering. */                              \
  false,              /* Do not enable transmit triggering. */                             \
  usartPrsTriggerCh0  /* Set default channel to zero. */                                   \
}
#else
#define USART_INITPRSTRIGGER_DEFAULT                                                       \
{                                                                                          \
  false,              /* Do not enable receive triggering. */                              \
  false,              /* Do not enable transmit triggering. */                             \
  usartPrsTriggerCh0  /* Set default channel to zero. */                                   \
}
#endif

typedef struct
{
  USART_Enable_TypeDef    enable;

  uint32_t                refFreq;

  uint32_t                baudrate;

  USART_Databits_TypeDef  databits;

  bool                    master;

  bool                    msbf;

  USART_ClockMode_TypeDef clockMode;

#if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)

  bool                    prsRxEnable;

  USART_PrsRxCh_TypeDef   prsRxCh;

  bool                    autoTx;
#endif
#if defined(_USART_TIMING_CSHOLD_MASK)

  bool                    autoCsEnable;
  uint8_t                 autoCsHold;
  uint8_t                 autoCsSetup;
#endif
} USART_InitSync_TypeDef;

#if defined(_USART_TIMING_CSHOLD_MASK)
#define USART_INITSYNC_DEFAULT                                                              \
{                                                                                           \
  usartEnable,       /* Enable RX/TX when init completed. */                                \
  0,                 /* Use current configured reference clock for configuring baudrate. */ \
  1000000,           /* 1 Mbits/s. */                                                       \
  usartDatabits8,    /* 8 databits. */                                                      \
  true,              /* Master mode. */                                                     \
  false,             /* Send least significant bit first. */                                \
  usartClockMode0,   /* Clock idle low, sample on rising edge. */                           \
  false,             /* Not USART PRS input mode. */                                        \
  usartPrsRxCh0,     /* PRS channel 0. */                                                   \
  false,             /* No AUTOTX mode. */                                                  \
  false,             /* No AUTOCS mode */                                                   \
  0,                 /* Auto CS Hold cycles */                                              \
  0                  /* Auto CS Setup cycles */                                             \
}
#elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
#define USART_INITSYNC_DEFAULT                                                              \
{                                                                                           \
  usartEnable,       /* Enable RX/TX when init completed. */                                \
  0,                 /* Use current configured reference clock for configuring baudrate. */ \
  1000000,           /* 1 Mbits/s. */                                                       \
  usartDatabits8,    /* 8 databits. */                                                      \
  true,              /* Master mode. */                                                     \
  false,             /* Send least significant bit first. */                                \
  usartClockMode0,   /* Clock idle low, sample on rising edge. */                           \
  false,             /* Not USART PRS input mode. */                                        \
  usartPrsRxCh0,     /* PRS channel 0. */                                                   \
  false              /* No AUTOTX mode. */                                                  \
}
#else
#define USART_INITSYNC_DEFAULT                                                              \
{                                                                                           \
  usartEnable,       /* Enable RX/TX when init completed. */                                \
  0,                 /* Use current configured reference clock for configuring baudrate. */ \
  1000000,           /* 1 Mbits/s. */                                                       \
  usartDatabits8,    /* 8 databits. */                                                      \
  true,              /* Master mode. */                                                     \
  false,             /* Send least significant bit first. */                                \
  usartClockMode0    /* Clock idle low, sample on rising edge. */                           \
}
#endif


typedef struct
{
  USART_InitAsync_TypeDef  async;

  bool                     irRxInv;

  bool                     irFilt;

  USART_IrDAPw_Typedef     irPw;

  bool                     irPrsEn;

  USART_IrDAPrsSel_Typedef irPrsSel;
} USART_InitIrDA_TypeDef;


#if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
#define USART_INITIRDA_DEFAULT                                                              \
{                                                                                           \
  {                                                                                         \
    usartEnable,     /* Enable RX/TX when init completed. */                                \
    0,               /* Use current configured reference clock for configuring baudrate. */ \
    115200,          /* 115200 bits/s. */                                                   \
    usartOVS16,      /* 16x oversampling. */                                                \
    usartDatabits8,  /* 8 databits. */                                                      \
    usartEvenParity, /* Even parity. */                                                     \
    usartStopbits1,  /* 1 stopbit. */                                                       \
    false,           /* Do not disable majority vote. */                                    \
    false,           /* Not USART PRS input mode. */                                        \
    usartPrsRxCh0,   /* PRS channel 0. */                                                   \
    false,           /* Auto CS functionality enable/disable switch */                      \
    0,               /* Auto CS Hold cycles */                                              \
    0                /* Auto CS Setup cycles */                                             \
  },                                                                                        \
  false,             /* Rx invert disabled. */                                              \
  false,             /* Filtering disabled. */                                              \
  usartIrDAPwTHREE,  /* Pulse width is set to ONE. */                                       \
  false,             /* Routing to PRS is disabled. */                                      \
  usartIrDAPrsCh0    /* PRS channel 0. */                                                   \
}
#elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
#define USART_INITIRDA_DEFAULT                                                              \
{                                                                                           \
  {                                                                                         \
    usartEnable,     /* Enable RX/TX when init completed. */                                \
    0,               /* Use current configured reference clock for configuring baudrate. */ \
    115200,          /* 115200 bits/s. */                                                   \
    usartOVS16,      /* 16x oversampling. */                                                \
    usartDatabits8,  /* 8 databits. */                                                      \
    usartEvenParity, /* Even parity. */                                                     \
    usartStopbits1,  /* 1 stopbit. */                                                       \
    false,           /* Do not disable majority vote. */                                    \
    false,           /* Not USART PRS input mode. */                                        \
    usartPrsRxCh0    /* PRS channel 0. */                                                   \
  },                                                                                        \
  false,             /* Rx invert disabled. */                                              \
  false,             /* Filtering disabled. */                                              \
  usartIrDAPwTHREE,  /* Pulse width is set to ONE. */                                       \
  false,             /* Routing to PRS is disabled. */                                      \
  usartIrDAPrsCh0    /* PRS channel 0. */                                                   \
}
#else
#define USART_INITIRDA_DEFAULT                                                              \
{                                                                                           \
  {                                                                                         \
    usartEnable,     /* Enable RX/TX when init completed. */                                \
    0,               /* Use current configured reference clock for configuring baudrate. */ \
    115200,          /* 115200 bits/s. */                                                   \
    usartOVS16,      /* 16x oversampling. */                                                \
    usartDatabits8,  /* 8 databits. */                                                      \
    usartEvenParity, /* Even parity. */                                                     \
    usartStopbits1   /* 1 stopbit. */                                                       \
  },                                                                                        \
  false,             /* Rx invert disabled. */                                              \
  false,             /* Filtering disabled. */                                              \
  usartIrDAPwTHREE,  /* Pulse width is set to ONE. */                                       \
  false,             /* Routing to PRS is disabled. */                                      \
  usartIrDAPrsCh0    /* PRS channel 0. */                                                   \
}
#endif

#if defined(_USART_I2SCTRL_MASK)

typedef struct
{
  USART_InitSync_TypeDef   sync;

  USART_I2sFormat_TypeDef  format;

  bool                     delay;

  bool                     dmaSplit;

  USART_I2sJustify_TypeDef justify;

  bool                     mono;
} USART_InitI2s_TypeDef;


#if defined(_USART_TIMING_CSHOLD_MASK)
#define USART_INITI2S_DEFAULT                                                                  \
{                                                                                              \
  {                                                                                            \
    usartEnableTx,      /* Enable TX when init completed. */                                   \
    0,                  /* Use current configured reference clock for configuring baudrate. */ \
    1000000,            /* Baudrate 1M bits/s. */                                              \
    usartDatabits16,    /* 16 databits. */                                                     \
    true,               /* Operate as I2S master. */                                           \
    true,               /* Most significant bit first. */                                      \
    usartClockMode0,    /* Clock idle low, sample on rising edge. */                           \
    false,              /* Don't enable USARTRx via PRS. */                                    \
    usartPrsRxCh0,      /* PRS channel selection (dummy). */                                   \
    false,              /* Disable AUTOTX mode. */                                             \
    false,              /* No AUTOCS mode */                                                   \
    0,                  /* Auto CS Hold cycles */                                              \
    0                   /* Auto CS Setup cycles */                                             \
  },                                                                                           \
  usartI2sFormatW16D16, /* 16-bit word, 16-bit data */                                         \
  true,                 /* Delay on I2S data. */                                               \
  false,                /* No DMA split. */                                                    \
  usartI2sJustifyLeft,  /* Data is left-justified within the frame */                          \
  false                 /* Stereo mode. */                                                     \
}
#else
#define USART_INITI2S_DEFAULT                                                                  \
{                                                                                              \
  {                                                                                            \
    usartEnableTx,      /* Enable TX when init completed. */                                   \
    0,                  /* Use current configured reference clock for configuring baudrate. */ \
    1000000,            /* Baudrate 1M bits/s. */                                              \
    usartDatabits16,    /* 16 databits. */                                                     \
    true,               /* Operate as I2S master. */                                           \
    true,               /* Most significant bit first. */                                      \
    usartClockMode0,    /* Clock idle low, sample on rising edge. */                           \
    false,              /* Don't enable USARTRx via PRS. */                                    \
    usartPrsRxCh0,      /* PRS channel selection (dummy). */                                   \
    false               /* Disable AUTOTX mode. */                                             \
  },                                                                                           \
  usartI2sFormatW16D16, /* 16-bit word, 16-bit data */                                         \
  true,                 /* Delay on I2S data. */                                               \
  false,                /* No DMA split. */                                                    \
  usartI2sJustifyLeft,  /* Data is left-justified within the frame */                          \
  false                 /* Stereo mode. */                                                     \
}
#endif
#endif

/*******************************************************************************
 *****************************   PROTOTYPES   **********************************
 ******************************************************************************/

void USART_BaudrateAsyncSet(USART_TypeDef *usart,
                            uint32_t refFreq,
                            uint32_t baudrate,
                            USART_OVS_TypeDef ovs);
uint32_t USART_BaudrateCalc(uint32_t refFreq,
                            uint32_t clkdiv,
                            bool syncmode,
                            USART_OVS_TypeDef ovs);
uint32_t USART_BaudrateGet(USART_TypeDef *usart);
void USART_BaudrateSyncSet(USART_TypeDef *usart,
                           uint32_t refFreq,
                           uint32_t baudrate);
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);

void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init);

#if defined(_USART_I2SCTRL_MASK)
void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
#endif
void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);

#if defined(DEFAULT_IRDA_USART) || defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
/***************************************************************************/
__STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
{
#if defined(DEFAULT_IRDA_USART)
  USART_TypeDef *usart = DEFAULT_IRDA_USART;
#elif (USART_COUNT == 1) && defined(USART1)
  USART_TypeDef *usart = USART1;
#else
  USART_TypeDef *usart = USART0;
#endif
  USARTn_InitIrDA(usart, init);
}
#endif

/***************************************************************************/
__STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
{
  usart->IFC = flags;
}


/***************************************************************************/
__STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
{
  usart->IEN &= ~flags;
}


/***************************************************************************/
__STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
{
  usart->IEN |= flags;
}


/***************************************************************************/
__STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
{
  return usart->IF;
}


/***************************************************************************/
__STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
{
  uint32_t ien;

  /* Store USARTx->IEN in temporary variable in order to define explicit order
   * of volatile accesses. */
  ien = usart->IEN;

  /* Bitwise AND of pending and enabled interrupts */
  return usart->IF & ien;
}


/***************************************************************************/
__STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
{
  usart->IFS = flags;
}


/***************************************************************************/
__STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
{
  return usart->STATUS;
}

void USART_Reset(USART_TypeDef *usart);
uint8_t USART_Rx(USART_TypeDef *usart);
uint16_t USART_RxDouble(USART_TypeDef *usart);
uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
uint16_t USART_RxExt(USART_TypeDef *usart);


/***************************************************************************/
__STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
{
  return (uint8_t)usart->RXDATA;
}


/***************************************************************************/
__STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
{
  return (uint16_t)usart->RXDOUBLE;
}


/***************************************************************************/
__STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
{
  return usart->RXDOUBLEX;
}


/***************************************************************************/
__STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
{
  return (uint16_t)usart->RXDATAX;
}

uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
void USART_Tx(USART_TypeDef *usart, uint8_t data);
void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
void USART_TxExt(USART_TypeDef *usart, uint16_t data);


#ifdef __cplusplus
}
#endif

#endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
#endif /* EM_USART_H */