EFM32 Giant Gecko Software Documentation  efm32gg-doc-5.1.2
efm32gg_i2c.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CMD;
45  __IM uint32_t STATE;
46  __IM uint32_t STATUS;
47  __IOM uint32_t CLKDIV;
48  __IOM uint32_t SADDR;
49  __IOM uint32_t SADDRMASK;
50  __IM uint32_t RXDATA;
51  __IM uint32_t RXDATAP;
52  __IOM uint32_t TXDATA;
53  __IM uint32_t IF;
54  __IOM uint32_t IFS;
55  __IOM uint32_t IFC;
56  __IOM uint32_t IEN;
57  __IOM uint32_t ROUTE;
58 } I2C_TypeDef;
60 /**************************************************************************/
65 /* Bit fields for I2C CTRL */
66 #define _I2C_CTRL_RESETVALUE 0x00000000UL
67 #define _I2C_CTRL_MASK 0x0007B37FUL
68 #define I2C_CTRL_EN (0x1UL << 0)
69 #define _I2C_CTRL_EN_SHIFT 0
70 #define _I2C_CTRL_EN_MASK 0x1UL
71 #define _I2C_CTRL_EN_DEFAULT 0x00000000UL
72 #define I2C_CTRL_EN_DEFAULT (_I2C_CTRL_EN_DEFAULT << 0)
73 #define I2C_CTRL_SLAVE (0x1UL << 1)
74 #define _I2C_CTRL_SLAVE_SHIFT 1
75 #define _I2C_CTRL_SLAVE_MASK 0x2UL
76 #define _I2C_CTRL_SLAVE_DEFAULT 0x00000000UL
77 #define I2C_CTRL_SLAVE_DEFAULT (_I2C_CTRL_SLAVE_DEFAULT << 1)
78 #define I2C_CTRL_AUTOACK (0x1UL << 2)
79 #define _I2C_CTRL_AUTOACK_SHIFT 2
80 #define _I2C_CTRL_AUTOACK_MASK 0x4UL
81 #define _I2C_CTRL_AUTOACK_DEFAULT 0x00000000UL
82 #define I2C_CTRL_AUTOACK_DEFAULT (_I2C_CTRL_AUTOACK_DEFAULT << 2)
83 #define I2C_CTRL_AUTOSE (0x1UL << 3)
84 #define _I2C_CTRL_AUTOSE_SHIFT 3
85 #define _I2C_CTRL_AUTOSE_MASK 0x8UL
86 #define _I2C_CTRL_AUTOSE_DEFAULT 0x00000000UL
87 #define I2C_CTRL_AUTOSE_DEFAULT (_I2C_CTRL_AUTOSE_DEFAULT << 3)
88 #define I2C_CTRL_AUTOSN (0x1UL << 4)
89 #define _I2C_CTRL_AUTOSN_SHIFT 4
90 #define _I2C_CTRL_AUTOSN_MASK 0x10UL
91 #define _I2C_CTRL_AUTOSN_DEFAULT 0x00000000UL
92 #define I2C_CTRL_AUTOSN_DEFAULT (_I2C_CTRL_AUTOSN_DEFAULT << 4)
93 #define I2C_CTRL_ARBDIS (0x1UL << 5)
94 #define _I2C_CTRL_ARBDIS_SHIFT 5
95 #define _I2C_CTRL_ARBDIS_MASK 0x20UL
96 #define _I2C_CTRL_ARBDIS_DEFAULT 0x00000000UL
97 #define I2C_CTRL_ARBDIS_DEFAULT (_I2C_CTRL_ARBDIS_DEFAULT << 5)
98 #define I2C_CTRL_GCAMEN (0x1UL << 6)
99 #define _I2C_CTRL_GCAMEN_SHIFT 6
100 #define _I2C_CTRL_GCAMEN_MASK 0x40UL
101 #define _I2C_CTRL_GCAMEN_DEFAULT 0x00000000UL
102 #define I2C_CTRL_GCAMEN_DEFAULT (_I2C_CTRL_GCAMEN_DEFAULT << 6)
103 #define _I2C_CTRL_CLHR_SHIFT 8
104 #define _I2C_CTRL_CLHR_MASK 0x300UL
105 #define _I2C_CTRL_CLHR_DEFAULT 0x00000000UL
106 #define _I2C_CTRL_CLHR_STANDARD 0x00000000UL
107 #define _I2C_CTRL_CLHR_ASYMMETRIC 0x00000001UL
108 #define _I2C_CTRL_CLHR_FAST 0x00000002UL
109 #define I2C_CTRL_CLHR_DEFAULT (_I2C_CTRL_CLHR_DEFAULT << 8)
110 #define I2C_CTRL_CLHR_STANDARD (_I2C_CTRL_CLHR_STANDARD << 8)
111 #define I2C_CTRL_CLHR_ASYMMETRIC (_I2C_CTRL_CLHR_ASYMMETRIC << 8)
112 #define I2C_CTRL_CLHR_FAST (_I2C_CTRL_CLHR_FAST << 8)
113 #define _I2C_CTRL_BITO_SHIFT 12
114 #define _I2C_CTRL_BITO_MASK 0x3000UL
115 #define _I2C_CTRL_BITO_DEFAULT 0x00000000UL
116 #define _I2C_CTRL_BITO_OFF 0x00000000UL
117 #define _I2C_CTRL_BITO_40PCC 0x00000001UL
118 #define _I2C_CTRL_BITO_80PCC 0x00000002UL
119 #define _I2C_CTRL_BITO_160PCC 0x00000003UL
120 #define I2C_CTRL_BITO_DEFAULT (_I2C_CTRL_BITO_DEFAULT << 12)
121 #define I2C_CTRL_BITO_OFF (_I2C_CTRL_BITO_OFF << 12)
122 #define I2C_CTRL_BITO_40PCC (_I2C_CTRL_BITO_40PCC << 12)
123 #define I2C_CTRL_BITO_80PCC (_I2C_CTRL_BITO_80PCC << 12)
124 #define I2C_CTRL_BITO_160PCC (_I2C_CTRL_BITO_160PCC << 12)
125 #define I2C_CTRL_GIBITO (0x1UL << 15)
126 #define _I2C_CTRL_GIBITO_SHIFT 15
127 #define _I2C_CTRL_GIBITO_MASK 0x8000UL
128 #define _I2C_CTRL_GIBITO_DEFAULT 0x00000000UL
129 #define I2C_CTRL_GIBITO_DEFAULT (_I2C_CTRL_GIBITO_DEFAULT << 15)
130 #define _I2C_CTRL_CLTO_SHIFT 16
131 #define _I2C_CTRL_CLTO_MASK 0x70000UL
132 #define _I2C_CTRL_CLTO_DEFAULT 0x00000000UL
133 #define _I2C_CTRL_CLTO_OFF 0x00000000UL
134 #define _I2C_CTRL_CLTO_40PCC 0x00000001UL
135 #define _I2C_CTRL_CLTO_80PCC 0x00000002UL
136 #define _I2C_CTRL_CLTO_160PCC 0x00000003UL
137 #define _I2C_CTRL_CLTO_320PPC 0x00000004UL
138 #define _I2C_CTRL_CLTO_1024PPC 0x00000005UL
139 #define I2C_CTRL_CLTO_DEFAULT (_I2C_CTRL_CLTO_DEFAULT << 16)
140 #define I2C_CTRL_CLTO_OFF (_I2C_CTRL_CLTO_OFF << 16)
141 #define I2C_CTRL_CLTO_40PCC (_I2C_CTRL_CLTO_40PCC << 16)
142 #define I2C_CTRL_CLTO_80PCC (_I2C_CTRL_CLTO_80PCC << 16)
143 #define I2C_CTRL_CLTO_160PCC (_I2C_CTRL_CLTO_160PCC << 16)
144 #define I2C_CTRL_CLTO_320PPC (_I2C_CTRL_CLTO_320PPC << 16)
145 #define I2C_CTRL_CLTO_1024PPC (_I2C_CTRL_CLTO_1024PPC << 16)
147 /* Bit fields for I2C CMD */
148 #define _I2C_CMD_RESETVALUE 0x00000000UL
149 #define _I2C_CMD_MASK 0x000000FFUL
150 #define I2C_CMD_START (0x1UL << 0)
151 #define _I2C_CMD_START_SHIFT 0
152 #define _I2C_CMD_START_MASK 0x1UL
153 #define _I2C_CMD_START_DEFAULT 0x00000000UL
154 #define I2C_CMD_START_DEFAULT (_I2C_CMD_START_DEFAULT << 0)
155 #define I2C_CMD_STOP (0x1UL << 1)
156 #define _I2C_CMD_STOP_SHIFT 1
157 #define _I2C_CMD_STOP_MASK 0x2UL
158 #define _I2C_CMD_STOP_DEFAULT 0x00000000UL
159 #define I2C_CMD_STOP_DEFAULT (_I2C_CMD_STOP_DEFAULT << 1)
160 #define I2C_CMD_ACK (0x1UL << 2)
161 #define _I2C_CMD_ACK_SHIFT 2
162 #define _I2C_CMD_ACK_MASK 0x4UL
163 #define _I2C_CMD_ACK_DEFAULT 0x00000000UL
164 #define I2C_CMD_ACK_DEFAULT (_I2C_CMD_ACK_DEFAULT << 2)
165 #define I2C_CMD_NACK (0x1UL << 3)
166 #define _I2C_CMD_NACK_SHIFT 3
167 #define _I2C_CMD_NACK_MASK 0x8UL
168 #define _I2C_CMD_NACK_DEFAULT 0x00000000UL
169 #define I2C_CMD_NACK_DEFAULT (_I2C_CMD_NACK_DEFAULT << 3)
170 #define I2C_CMD_CONT (0x1UL << 4)
171 #define _I2C_CMD_CONT_SHIFT 4
172 #define _I2C_CMD_CONT_MASK 0x10UL
173 #define _I2C_CMD_CONT_DEFAULT 0x00000000UL
174 #define I2C_CMD_CONT_DEFAULT (_I2C_CMD_CONT_DEFAULT << 4)
175 #define I2C_CMD_ABORT (0x1UL << 5)
176 #define _I2C_CMD_ABORT_SHIFT 5
177 #define _I2C_CMD_ABORT_MASK 0x20UL
178 #define _I2C_CMD_ABORT_DEFAULT 0x00000000UL
179 #define I2C_CMD_ABORT_DEFAULT (_I2C_CMD_ABORT_DEFAULT << 5)
180 #define I2C_CMD_CLEARTX (0x1UL << 6)
181 #define _I2C_CMD_CLEARTX_SHIFT 6
182 #define _I2C_CMD_CLEARTX_MASK 0x40UL
183 #define _I2C_CMD_CLEARTX_DEFAULT 0x00000000UL
184 #define I2C_CMD_CLEARTX_DEFAULT (_I2C_CMD_CLEARTX_DEFAULT << 6)
185 #define I2C_CMD_CLEARPC (0x1UL << 7)
186 #define _I2C_CMD_CLEARPC_SHIFT 7
187 #define _I2C_CMD_CLEARPC_MASK 0x80UL
188 #define _I2C_CMD_CLEARPC_DEFAULT 0x00000000UL
189 #define I2C_CMD_CLEARPC_DEFAULT (_I2C_CMD_CLEARPC_DEFAULT << 7)
191 /* Bit fields for I2C STATE */
192 #define _I2C_STATE_RESETVALUE 0x00000001UL
193 #define _I2C_STATE_MASK 0x000000FFUL
194 #define I2C_STATE_BUSY (0x1UL << 0)
195 #define _I2C_STATE_BUSY_SHIFT 0
196 #define _I2C_STATE_BUSY_MASK 0x1UL
197 #define _I2C_STATE_BUSY_DEFAULT 0x00000001UL
198 #define I2C_STATE_BUSY_DEFAULT (_I2C_STATE_BUSY_DEFAULT << 0)
199 #define I2C_STATE_MASTER (0x1UL << 1)
200 #define _I2C_STATE_MASTER_SHIFT 1
201 #define _I2C_STATE_MASTER_MASK 0x2UL
202 #define _I2C_STATE_MASTER_DEFAULT 0x00000000UL
203 #define I2C_STATE_MASTER_DEFAULT (_I2C_STATE_MASTER_DEFAULT << 1)
204 #define I2C_STATE_TRANSMITTER (0x1UL << 2)
205 #define _I2C_STATE_TRANSMITTER_SHIFT 2
206 #define _I2C_STATE_TRANSMITTER_MASK 0x4UL
207 #define _I2C_STATE_TRANSMITTER_DEFAULT 0x00000000UL
208 #define I2C_STATE_TRANSMITTER_DEFAULT (_I2C_STATE_TRANSMITTER_DEFAULT << 2)
209 #define I2C_STATE_NACKED (0x1UL << 3)
210 #define _I2C_STATE_NACKED_SHIFT 3
211 #define _I2C_STATE_NACKED_MASK 0x8UL
212 #define _I2C_STATE_NACKED_DEFAULT 0x00000000UL
213 #define I2C_STATE_NACKED_DEFAULT (_I2C_STATE_NACKED_DEFAULT << 3)
214 #define I2C_STATE_BUSHOLD (0x1UL << 4)
215 #define _I2C_STATE_BUSHOLD_SHIFT 4
216 #define _I2C_STATE_BUSHOLD_MASK 0x10UL
217 #define _I2C_STATE_BUSHOLD_DEFAULT 0x00000000UL
218 #define I2C_STATE_BUSHOLD_DEFAULT (_I2C_STATE_BUSHOLD_DEFAULT << 4)
219 #define _I2C_STATE_STATE_SHIFT 5
220 #define _I2C_STATE_STATE_MASK 0xE0UL
221 #define _I2C_STATE_STATE_DEFAULT 0x00000000UL
222 #define _I2C_STATE_STATE_IDLE 0x00000000UL
223 #define _I2C_STATE_STATE_WAIT 0x00000001UL
224 #define _I2C_STATE_STATE_START 0x00000002UL
225 #define _I2C_STATE_STATE_ADDR 0x00000003UL
226 #define _I2C_STATE_STATE_ADDRACK 0x00000004UL
227 #define _I2C_STATE_STATE_DATA 0x00000005UL
228 #define _I2C_STATE_STATE_DATAACK 0x00000006UL
229 #define I2C_STATE_STATE_DEFAULT (_I2C_STATE_STATE_DEFAULT << 5)
230 #define I2C_STATE_STATE_IDLE (_I2C_STATE_STATE_IDLE << 5)
231 #define I2C_STATE_STATE_WAIT (_I2C_STATE_STATE_WAIT << 5)
232 #define I2C_STATE_STATE_START (_I2C_STATE_STATE_START << 5)
233 #define I2C_STATE_STATE_ADDR (_I2C_STATE_STATE_ADDR << 5)
234 #define I2C_STATE_STATE_ADDRACK (_I2C_STATE_STATE_ADDRACK << 5)
235 #define I2C_STATE_STATE_DATA (_I2C_STATE_STATE_DATA << 5)
236 #define I2C_STATE_STATE_DATAACK (_I2C_STATE_STATE_DATAACK << 5)
238 /* Bit fields for I2C STATUS */
239 #define _I2C_STATUS_RESETVALUE 0x00000080UL
240 #define _I2C_STATUS_MASK 0x000001FFUL
241 #define I2C_STATUS_PSTART (0x1UL << 0)
242 #define _I2C_STATUS_PSTART_SHIFT 0
243 #define _I2C_STATUS_PSTART_MASK 0x1UL
244 #define _I2C_STATUS_PSTART_DEFAULT 0x00000000UL
245 #define I2C_STATUS_PSTART_DEFAULT (_I2C_STATUS_PSTART_DEFAULT << 0)
246 #define I2C_STATUS_PSTOP (0x1UL << 1)
247 #define _I2C_STATUS_PSTOP_SHIFT 1
248 #define _I2C_STATUS_PSTOP_MASK 0x2UL
249 #define _I2C_STATUS_PSTOP_DEFAULT 0x00000000UL
250 #define I2C_STATUS_PSTOP_DEFAULT (_I2C_STATUS_PSTOP_DEFAULT << 1)
251 #define I2C_STATUS_PACK (0x1UL << 2)
252 #define _I2C_STATUS_PACK_SHIFT 2
253 #define _I2C_STATUS_PACK_MASK 0x4UL
254 #define _I2C_STATUS_PACK_DEFAULT 0x00000000UL
255 #define I2C_STATUS_PACK_DEFAULT (_I2C_STATUS_PACK_DEFAULT << 2)
256 #define I2C_STATUS_PNACK (0x1UL << 3)
257 #define _I2C_STATUS_PNACK_SHIFT 3
258 #define _I2C_STATUS_PNACK_MASK 0x8UL
259 #define _I2C_STATUS_PNACK_DEFAULT 0x00000000UL
260 #define I2C_STATUS_PNACK_DEFAULT (_I2C_STATUS_PNACK_DEFAULT << 3)
261 #define I2C_STATUS_PCONT (0x1UL << 4)
262 #define _I2C_STATUS_PCONT_SHIFT 4
263 #define _I2C_STATUS_PCONT_MASK 0x10UL
264 #define _I2C_STATUS_PCONT_DEFAULT 0x00000000UL
265 #define I2C_STATUS_PCONT_DEFAULT (_I2C_STATUS_PCONT_DEFAULT << 4)
266 #define I2C_STATUS_PABORT (0x1UL << 5)
267 #define _I2C_STATUS_PABORT_SHIFT 5
268 #define _I2C_STATUS_PABORT_MASK 0x20UL
269 #define _I2C_STATUS_PABORT_DEFAULT 0x00000000UL
270 #define I2C_STATUS_PABORT_DEFAULT (_I2C_STATUS_PABORT_DEFAULT << 5)
271 #define I2C_STATUS_TXC (0x1UL << 6)
272 #define _I2C_STATUS_TXC_SHIFT 6
273 #define _I2C_STATUS_TXC_MASK 0x40UL
274 #define _I2C_STATUS_TXC_DEFAULT 0x00000000UL
275 #define I2C_STATUS_TXC_DEFAULT (_I2C_STATUS_TXC_DEFAULT << 6)
276 #define I2C_STATUS_TXBL (0x1UL << 7)
277 #define _I2C_STATUS_TXBL_SHIFT 7
278 #define _I2C_STATUS_TXBL_MASK 0x80UL
279 #define _I2C_STATUS_TXBL_DEFAULT 0x00000001UL
280 #define I2C_STATUS_TXBL_DEFAULT (_I2C_STATUS_TXBL_DEFAULT << 7)
281 #define I2C_STATUS_RXDATAV (0x1UL << 8)
282 #define _I2C_STATUS_RXDATAV_SHIFT 8
283 #define _I2C_STATUS_RXDATAV_MASK 0x100UL
284 #define _I2C_STATUS_RXDATAV_DEFAULT 0x00000000UL
285 #define I2C_STATUS_RXDATAV_DEFAULT (_I2C_STATUS_RXDATAV_DEFAULT << 8)
287 /* Bit fields for I2C CLKDIV */
288 #define _I2C_CLKDIV_RESETVALUE 0x00000000UL
289 #define _I2C_CLKDIV_MASK 0x000001FFUL
290 #define _I2C_CLKDIV_DIV_SHIFT 0
291 #define _I2C_CLKDIV_DIV_MASK 0x1FFUL
292 #define _I2C_CLKDIV_DIV_DEFAULT 0x00000000UL
293 #define I2C_CLKDIV_DIV_DEFAULT (_I2C_CLKDIV_DIV_DEFAULT << 0)
295 /* Bit fields for I2C SADDR */
296 #define _I2C_SADDR_RESETVALUE 0x00000000UL
297 #define _I2C_SADDR_MASK 0x000000FEUL
298 #define _I2C_SADDR_ADDR_SHIFT 1
299 #define _I2C_SADDR_ADDR_MASK 0xFEUL
300 #define _I2C_SADDR_ADDR_DEFAULT 0x00000000UL
301 #define I2C_SADDR_ADDR_DEFAULT (_I2C_SADDR_ADDR_DEFAULT << 1)
303 /* Bit fields for I2C SADDRMASK */
304 #define _I2C_SADDRMASK_RESETVALUE 0x00000000UL
305 #define _I2C_SADDRMASK_MASK 0x000000FEUL
306 #define _I2C_SADDRMASK_MASK_SHIFT 1
307 #define _I2C_SADDRMASK_MASK_MASK 0xFEUL
308 #define _I2C_SADDRMASK_MASK_DEFAULT 0x00000000UL
309 #define I2C_SADDRMASK_MASK_DEFAULT (_I2C_SADDRMASK_MASK_DEFAULT << 1)
311 /* Bit fields for I2C RXDATA */
312 #define _I2C_RXDATA_RESETVALUE 0x00000000UL
313 #define _I2C_RXDATA_MASK 0x000000FFUL
314 #define _I2C_RXDATA_RXDATA_SHIFT 0
315 #define _I2C_RXDATA_RXDATA_MASK 0xFFUL
316 #define _I2C_RXDATA_RXDATA_DEFAULT 0x00000000UL
317 #define I2C_RXDATA_RXDATA_DEFAULT (_I2C_RXDATA_RXDATA_DEFAULT << 0)
319 /* Bit fields for I2C RXDATAP */
320 #define _I2C_RXDATAP_RESETVALUE 0x00000000UL
321 #define _I2C_RXDATAP_MASK 0x000000FFUL
322 #define _I2C_RXDATAP_RXDATAP_SHIFT 0
323 #define _I2C_RXDATAP_RXDATAP_MASK 0xFFUL
324 #define _I2C_RXDATAP_RXDATAP_DEFAULT 0x00000000UL
325 #define I2C_RXDATAP_RXDATAP_DEFAULT (_I2C_RXDATAP_RXDATAP_DEFAULT << 0)
327 /* Bit fields for I2C TXDATA */
328 #define _I2C_TXDATA_RESETVALUE 0x00000000UL
329 #define _I2C_TXDATA_MASK 0x000000FFUL
330 #define _I2C_TXDATA_TXDATA_SHIFT 0
331 #define _I2C_TXDATA_TXDATA_MASK 0xFFUL
332 #define _I2C_TXDATA_TXDATA_DEFAULT 0x00000000UL
333 #define I2C_TXDATA_TXDATA_DEFAULT (_I2C_TXDATA_TXDATA_DEFAULT << 0)
335 /* Bit fields for I2C IF */
336 #define _I2C_IF_RESETVALUE 0x00000010UL
337 #define _I2C_IF_MASK 0x0001FFFFUL
338 #define I2C_IF_START (0x1UL << 0)
339 #define _I2C_IF_START_SHIFT 0
340 #define _I2C_IF_START_MASK 0x1UL
341 #define _I2C_IF_START_DEFAULT 0x00000000UL
342 #define I2C_IF_START_DEFAULT (_I2C_IF_START_DEFAULT << 0)
343 #define I2C_IF_RSTART (0x1UL << 1)
344 #define _I2C_IF_RSTART_SHIFT 1
345 #define _I2C_IF_RSTART_MASK 0x2UL
346 #define _I2C_IF_RSTART_DEFAULT 0x00000000UL
347 #define I2C_IF_RSTART_DEFAULT (_I2C_IF_RSTART_DEFAULT << 1)
348 #define I2C_IF_ADDR (0x1UL << 2)
349 #define _I2C_IF_ADDR_SHIFT 2
350 #define _I2C_IF_ADDR_MASK 0x4UL
351 #define _I2C_IF_ADDR_DEFAULT 0x00000000UL
352 #define I2C_IF_ADDR_DEFAULT (_I2C_IF_ADDR_DEFAULT << 2)
353 #define I2C_IF_TXC (0x1UL << 3)
354 #define _I2C_IF_TXC_SHIFT 3
355 #define _I2C_IF_TXC_MASK 0x8UL
356 #define _I2C_IF_TXC_DEFAULT 0x00000000UL
357 #define I2C_IF_TXC_DEFAULT (_I2C_IF_TXC_DEFAULT << 3)
358 #define I2C_IF_TXBL (0x1UL << 4)
359 #define _I2C_IF_TXBL_SHIFT 4
360 #define _I2C_IF_TXBL_MASK 0x10UL
361 #define _I2C_IF_TXBL_DEFAULT 0x00000000UL
362 #define I2C_IF_TXBL_DEFAULT (_I2C_IF_TXBL_DEFAULT << 4)
363 #define I2C_IF_RXDATAV (0x1UL << 5)
364 #define _I2C_IF_RXDATAV_SHIFT 5
365 #define _I2C_IF_RXDATAV_MASK 0x20UL
366 #define _I2C_IF_RXDATAV_DEFAULT 0x00000000UL
367 #define I2C_IF_RXDATAV_DEFAULT (_I2C_IF_RXDATAV_DEFAULT << 5)
368 #define I2C_IF_ACK (0x1UL << 6)
369 #define _I2C_IF_ACK_SHIFT 6
370 #define _I2C_IF_ACK_MASK 0x40UL
371 #define _I2C_IF_ACK_DEFAULT 0x00000000UL
372 #define I2C_IF_ACK_DEFAULT (_I2C_IF_ACK_DEFAULT << 6)
373 #define I2C_IF_NACK (0x1UL << 7)
374 #define _I2C_IF_NACK_SHIFT 7
375 #define _I2C_IF_NACK_MASK 0x80UL
376 #define _I2C_IF_NACK_DEFAULT 0x00000000UL
377 #define I2C_IF_NACK_DEFAULT (_I2C_IF_NACK_DEFAULT << 7)
378 #define I2C_IF_MSTOP (0x1UL << 8)
379 #define _I2C_IF_MSTOP_SHIFT 8
380 #define _I2C_IF_MSTOP_MASK 0x100UL
381 #define _I2C_IF_MSTOP_DEFAULT 0x00000000UL
382 #define I2C_IF_MSTOP_DEFAULT (_I2C_IF_MSTOP_DEFAULT << 8)
383 #define I2C_IF_ARBLOST (0x1UL << 9)
384 #define _I2C_IF_ARBLOST_SHIFT 9
385 #define _I2C_IF_ARBLOST_MASK 0x200UL
386 #define _I2C_IF_ARBLOST_DEFAULT 0x00000000UL
387 #define I2C_IF_ARBLOST_DEFAULT (_I2C_IF_ARBLOST_DEFAULT << 9)
388 #define I2C_IF_BUSERR (0x1UL << 10)
389 #define _I2C_IF_BUSERR_SHIFT 10
390 #define _I2C_IF_BUSERR_MASK 0x400UL
391 #define _I2C_IF_BUSERR_DEFAULT 0x00000000UL
392 #define I2C_IF_BUSERR_DEFAULT (_I2C_IF_BUSERR_DEFAULT << 10)
393 #define I2C_IF_BUSHOLD (0x1UL << 11)
394 #define _I2C_IF_BUSHOLD_SHIFT 11
395 #define _I2C_IF_BUSHOLD_MASK 0x800UL
396 #define _I2C_IF_BUSHOLD_DEFAULT 0x00000000UL
397 #define I2C_IF_BUSHOLD_DEFAULT (_I2C_IF_BUSHOLD_DEFAULT << 11)
398 #define I2C_IF_TXOF (0x1UL << 12)
399 #define _I2C_IF_TXOF_SHIFT 12
400 #define _I2C_IF_TXOF_MASK 0x1000UL
401 #define _I2C_IF_TXOF_DEFAULT 0x00000000UL
402 #define I2C_IF_TXOF_DEFAULT (_I2C_IF_TXOF_DEFAULT << 12)
403 #define I2C_IF_RXUF (0x1UL << 13)
404 #define _I2C_IF_RXUF_SHIFT 13
405 #define _I2C_IF_RXUF_MASK 0x2000UL
406 #define _I2C_IF_RXUF_DEFAULT 0x00000000UL
407 #define I2C_IF_RXUF_DEFAULT (_I2C_IF_RXUF_DEFAULT << 13)
408 #define I2C_IF_BITO (0x1UL << 14)
409 #define _I2C_IF_BITO_SHIFT 14
410 #define _I2C_IF_BITO_MASK 0x4000UL
411 #define _I2C_IF_BITO_DEFAULT 0x00000000UL
412 #define I2C_IF_BITO_DEFAULT (_I2C_IF_BITO_DEFAULT << 14)
413 #define I2C_IF_CLTO (0x1UL << 15)
414 #define _I2C_IF_CLTO_SHIFT 15
415 #define _I2C_IF_CLTO_MASK 0x8000UL
416 #define _I2C_IF_CLTO_DEFAULT 0x00000000UL
417 #define I2C_IF_CLTO_DEFAULT (_I2C_IF_CLTO_DEFAULT << 15)
418 #define I2C_IF_SSTOP (0x1UL << 16)
419 #define _I2C_IF_SSTOP_SHIFT 16
420 #define _I2C_IF_SSTOP_MASK 0x10000UL
421 #define _I2C_IF_SSTOP_DEFAULT 0x00000000UL
422 #define I2C_IF_SSTOP_DEFAULT (_I2C_IF_SSTOP_DEFAULT << 16)
424 /* Bit fields for I2C IFS */
425 #define _I2C_IFS_RESETVALUE 0x00000000UL
426 #define _I2C_IFS_MASK 0x0001FFCFUL
427 #define I2C_IFS_START (0x1UL << 0)
428 #define _I2C_IFS_START_SHIFT 0
429 #define _I2C_IFS_START_MASK 0x1UL
430 #define _I2C_IFS_START_DEFAULT 0x00000000UL
431 #define I2C_IFS_START_DEFAULT (_I2C_IFS_START_DEFAULT << 0)
432 #define I2C_IFS_RSTART (0x1UL << 1)
433 #define _I2C_IFS_RSTART_SHIFT 1
434 #define _I2C_IFS_RSTART_MASK 0x2UL
435 #define _I2C_IFS_RSTART_DEFAULT 0x00000000UL
436 #define I2C_IFS_RSTART_DEFAULT (_I2C_IFS_RSTART_DEFAULT << 1)
437 #define I2C_IFS_ADDR (0x1UL << 2)
438 #define _I2C_IFS_ADDR_SHIFT 2
439 #define _I2C_IFS_ADDR_MASK 0x4UL
440 #define _I2C_IFS_ADDR_DEFAULT 0x00000000UL
441 #define I2C_IFS_ADDR_DEFAULT (_I2C_IFS_ADDR_DEFAULT << 2)
442 #define I2C_IFS_TXC (0x1UL << 3)
443 #define _I2C_IFS_TXC_SHIFT 3
444 #define _I2C_IFS_TXC_MASK 0x8UL
445 #define _I2C_IFS_TXC_DEFAULT 0x00000000UL
446 #define I2C_IFS_TXC_DEFAULT (_I2C_IFS_TXC_DEFAULT << 3)
447 #define I2C_IFS_ACK (0x1UL << 6)
448 #define _I2C_IFS_ACK_SHIFT 6
449 #define _I2C_IFS_ACK_MASK 0x40UL
450 #define _I2C_IFS_ACK_DEFAULT 0x00000000UL
451 #define I2C_IFS_ACK_DEFAULT (_I2C_IFS_ACK_DEFAULT << 6)
452 #define I2C_IFS_NACK (0x1UL << 7)
453 #define _I2C_IFS_NACK_SHIFT 7
454 #define _I2C_IFS_NACK_MASK 0x80UL
455 #define _I2C_IFS_NACK_DEFAULT 0x00000000UL
456 #define I2C_IFS_NACK_DEFAULT (_I2C_IFS_NACK_DEFAULT << 7)
457 #define I2C_IFS_MSTOP (0x1UL << 8)
458 #define _I2C_IFS_MSTOP_SHIFT 8
459 #define _I2C_IFS_MSTOP_MASK 0x100UL
460 #define _I2C_IFS_MSTOP_DEFAULT 0x00000000UL
461 #define I2C_IFS_MSTOP_DEFAULT (_I2C_IFS_MSTOP_DEFAULT << 8)
462 #define I2C_IFS_ARBLOST (0x1UL << 9)
463 #define _I2C_IFS_ARBLOST_SHIFT 9
464 #define _I2C_IFS_ARBLOST_MASK 0x200UL
465 #define _I2C_IFS_ARBLOST_DEFAULT 0x00000000UL
466 #define I2C_IFS_ARBLOST_DEFAULT (_I2C_IFS_ARBLOST_DEFAULT << 9)
467 #define I2C_IFS_BUSERR (0x1UL << 10)
468 #define _I2C_IFS_BUSERR_SHIFT 10
469 #define _I2C_IFS_BUSERR_MASK 0x400UL
470 #define _I2C_IFS_BUSERR_DEFAULT 0x00000000UL
471 #define I2C_IFS_BUSERR_DEFAULT (_I2C_IFS_BUSERR_DEFAULT << 10)
472 #define I2C_IFS_BUSHOLD (0x1UL << 11)
473 #define _I2C_IFS_BUSHOLD_SHIFT 11
474 #define _I2C_IFS_BUSHOLD_MASK 0x800UL
475 #define _I2C_IFS_BUSHOLD_DEFAULT 0x00000000UL
476 #define I2C_IFS_BUSHOLD_DEFAULT (_I2C_IFS_BUSHOLD_DEFAULT << 11)
477 #define I2C_IFS_TXOF (0x1UL << 12)
478 #define _I2C_IFS_TXOF_SHIFT 12
479 #define _I2C_IFS_TXOF_MASK 0x1000UL
480 #define _I2C_IFS_TXOF_DEFAULT 0x00000000UL
481 #define I2C_IFS_TXOF_DEFAULT (_I2C_IFS_TXOF_DEFAULT << 12)
482 #define I2C_IFS_RXUF (0x1UL << 13)
483 #define _I2C_IFS_RXUF_SHIFT 13
484 #define _I2C_IFS_RXUF_MASK 0x2000UL
485 #define _I2C_IFS_RXUF_DEFAULT 0x00000000UL
486 #define I2C_IFS_RXUF_DEFAULT (_I2C_IFS_RXUF_DEFAULT << 13)
487 #define I2C_IFS_BITO (0x1UL << 14)
488 #define _I2C_IFS_BITO_SHIFT 14
489 #define _I2C_IFS_BITO_MASK 0x4000UL
490 #define _I2C_IFS_BITO_DEFAULT 0x00000000UL
491 #define I2C_IFS_BITO_DEFAULT (_I2C_IFS_BITO_DEFAULT << 14)
492 #define I2C_IFS_CLTO (0x1UL << 15)
493 #define _I2C_IFS_CLTO_SHIFT 15
494 #define _I2C_IFS_CLTO_MASK 0x8000UL
495 #define _I2C_IFS_CLTO_DEFAULT 0x00000000UL
496 #define I2C_IFS_CLTO_DEFAULT (_I2C_IFS_CLTO_DEFAULT << 15)
497 #define I2C_IFS_SSTOP (0x1UL << 16)
498 #define _I2C_IFS_SSTOP_SHIFT 16
499 #define _I2C_IFS_SSTOP_MASK 0x10000UL
500 #define _I2C_IFS_SSTOP_DEFAULT 0x00000000UL
501 #define I2C_IFS_SSTOP_DEFAULT (_I2C_IFS_SSTOP_DEFAULT << 16)
503 /* Bit fields for I2C IFC */
504 #define _I2C_IFC_RESETVALUE 0x00000000UL
505 #define _I2C_IFC_MASK 0x0001FFCFUL
506 #define I2C_IFC_START (0x1UL << 0)
507 #define _I2C_IFC_START_SHIFT 0
508 #define _I2C_IFC_START_MASK 0x1UL
509 #define _I2C_IFC_START_DEFAULT 0x00000000UL
510 #define I2C_IFC_START_DEFAULT (_I2C_IFC_START_DEFAULT << 0)
511 #define I2C_IFC_RSTART (0x1UL << 1)
512 #define _I2C_IFC_RSTART_SHIFT 1
513 #define _I2C_IFC_RSTART_MASK 0x2UL
514 #define _I2C_IFC_RSTART_DEFAULT 0x00000000UL
515 #define I2C_IFC_RSTART_DEFAULT (_I2C_IFC_RSTART_DEFAULT << 1)
516 #define I2C_IFC_ADDR (0x1UL << 2)
517 #define _I2C_IFC_ADDR_SHIFT 2
518 #define _I2C_IFC_ADDR_MASK 0x4UL
519 #define _I2C_IFC_ADDR_DEFAULT 0x00000000UL
520 #define I2C_IFC_ADDR_DEFAULT (_I2C_IFC_ADDR_DEFAULT << 2)
521 #define I2C_IFC_TXC (0x1UL << 3)
522 #define _I2C_IFC_TXC_SHIFT 3
523 #define _I2C_IFC_TXC_MASK 0x8UL
524 #define _I2C_IFC_TXC_DEFAULT 0x00000000UL
525 #define I2C_IFC_TXC_DEFAULT (_I2C_IFC_TXC_DEFAULT << 3)
526 #define I2C_IFC_ACK (0x1UL << 6)
527 #define _I2C_IFC_ACK_SHIFT 6
528 #define _I2C_IFC_ACK_MASK 0x40UL
529 #define _I2C_IFC_ACK_DEFAULT 0x00000000UL
530 #define I2C_IFC_ACK_DEFAULT (_I2C_IFC_ACK_DEFAULT << 6)
531 #define I2C_IFC_NACK (0x1UL << 7)
532 #define _I2C_IFC_NACK_SHIFT 7
533 #define _I2C_IFC_NACK_MASK 0x80UL
534 #define _I2C_IFC_NACK_DEFAULT 0x00000000UL
535 #define I2C_IFC_NACK_DEFAULT (_I2C_IFC_NACK_DEFAULT << 7)
536 #define I2C_IFC_MSTOP (0x1UL << 8)
537 #define _I2C_IFC_MSTOP_SHIFT 8
538 #define _I2C_IFC_MSTOP_MASK 0x100UL
539 #define _I2C_IFC_MSTOP_DEFAULT 0x00000000UL
540 #define I2C_IFC_MSTOP_DEFAULT (_I2C_IFC_MSTOP_DEFAULT << 8)
541 #define I2C_IFC_ARBLOST (0x1UL << 9)
542 #define _I2C_IFC_ARBLOST_SHIFT 9
543 #define _I2C_IFC_ARBLOST_MASK 0x200UL
544 #define _I2C_IFC_ARBLOST_DEFAULT 0x00000000UL
545 #define I2C_IFC_ARBLOST_DEFAULT (_I2C_IFC_ARBLOST_DEFAULT << 9)
546 #define I2C_IFC_BUSERR (0x1UL << 10)
547 #define _I2C_IFC_BUSERR_SHIFT 10
548 #define _I2C_IFC_BUSERR_MASK 0x400UL
549 #define _I2C_IFC_BUSERR_DEFAULT 0x00000000UL
550 #define I2C_IFC_BUSERR_DEFAULT (_I2C_IFC_BUSERR_DEFAULT << 10)
551 #define I2C_IFC_BUSHOLD (0x1UL << 11)
552 #define _I2C_IFC_BUSHOLD_SHIFT 11
553 #define _I2C_IFC_BUSHOLD_MASK 0x800UL
554 #define _I2C_IFC_BUSHOLD_DEFAULT 0x00000000UL
555 #define I2C_IFC_BUSHOLD_DEFAULT (_I2C_IFC_BUSHOLD_DEFAULT << 11)
556 #define I2C_IFC_TXOF (0x1UL << 12)
557 #define _I2C_IFC_TXOF_SHIFT 12
558 #define _I2C_IFC_TXOF_MASK 0x1000UL
559 #define _I2C_IFC_TXOF_DEFAULT 0x00000000UL
560 #define I2C_IFC_TXOF_DEFAULT (_I2C_IFC_TXOF_DEFAULT << 12)
561 #define I2C_IFC_RXUF (0x1UL << 13)
562 #define _I2C_IFC_RXUF_SHIFT 13
563 #define _I2C_IFC_RXUF_MASK 0x2000UL
564 #define _I2C_IFC_RXUF_DEFAULT 0x00000000UL
565 #define I2C_IFC_RXUF_DEFAULT (_I2C_IFC_RXUF_DEFAULT << 13)
566 #define I2C_IFC_BITO (0x1UL << 14)
567 #define _I2C_IFC_BITO_SHIFT 14
568 #define _I2C_IFC_BITO_MASK 0x4000UL
569 #define _I2C_IFC_BITO_DEFAULT 0x00000000UL
570 #define I2C_IFC_BITO_DEFAULT (_I2C_IFC_BITO_DEFAULT << 14)
571 #define I2C_IFC_CLTO (0x1UL << 15)
572 #define _I2C_IFC_CLTO_SHIFT 15
573 #define _I2C_IFC_CLTO_MASK 0x8000UL
574 #define _I2C_IFC_CLTO_DEFAULT 0x00000000UL
575 #define I2C_IFC_CLTO_DEFAULT (_I2C_IFC_CLTO_DEFAULT << 15)
576 #define I2C_IFC_SSTOP (0x1UL << 16)
577 #define _I2C_IFC_SSTOP_SHIFT 16
578 #define _I2C_IFC_SSTOP_MASK 0x10000UL
579 #define _I2C_IFC_SSTOP_DEFAULT 0x00000000UL
580 #define I2C_IFC_SSTOP_DEFAULT (_I2C_IFC_SSTOP_DEFAULT << 16)
582 /* Bit fields for I2C IEN */
583 #define _I2C_IEN_RESETVALUE 0x00000000UL
584 #define _I2C_IEN_MASK 0x0001FFFFUL
585 #define I2C_IEN_START (0x1UL << 0)
586 #define _I2C_IEN_START_SHIFT 0
587 #define _I2C_IEN_START_MASK 0x1UL
588 #define _I2C_IEN_START_DEFAULT 0x00000000UL
589 #define I2C_IEN_START_DEFAULT (_I2C_IEN_START_DEFAULT << 0)
590 #define I2C_IEN_RSTART (0x1UL << 1)
591 #define _I2C_IEN_RSTART_SHIFT 1
592 #define _I2C_IEN_RSTART_MASK 0x2UL
593 #define _I2C_IEN_RSTART_DEFAULT 0x00000000UL
594 #define I2C_IEN_RSTART_DEFAULT (_I2C_IEN_RSTART_DEFAULT << 1)
595 #define I2C_IEN_ADDR (0x1UL << 2)
596 #define _I2C_IEN_ADDR_SHIFT 2
597 #define _I2C_IEN_ADDR_MASK 0x4UL
598 #define _I2C_IEN_ADDR_DEFAULT 0x00000000UL
599 #define I2C_IEN_ADDR_DEFAULT (_I2C_IEN_ADDR_DEFAULT << 2)
600 #define I2C_IEN_TXC (0x1UL << 3)
601 #define _I2C_IEN_TXC_SHIFT 3
602 #define _I2C_IEN_TXC_MASK 0x8UL
603 #define _I2C_IEN_TXC_DEFAULT 0x00000000UL
604 #define I2C_IEN_TXC_DEFAULT (_I2C_IEN_TXC_DEFAULT << 3)
605 #define I2C_IEN_TXBL (0x1UL << 4)
606 #define _I2C_IEN_TXBL_SHIFT 4
607 #define _I2C_IEN_TXBL_MASK 0x10UL
608 #define _I2C_IEN_TXBL_DEFAULT 0x00000000UL
609 #define I2C_IEN_TXBL_DEFAULT (_I2C_IEN_TXBL_DEFAULT << 4)
610 #define I2C_IEN_RXDATAV (0x1UL << 5)
611 #define _I2C_IEN_RXDATAV_SHIFT 5
612 #define _I2C_IEN_RXDATAV_MASK 0x20UL
613 #define _I2C_IEN_RXDATAV_DEFAULT 0x00000000UL
614 #define I2C_IEN_RXDATAV_DEFAULT (_I2C_IEN_RXDATAV_DEFAULT << 5)
615 #define I2C_IEN_ACK (0x1UL << 6)
616 #define _I2C_IEN_ACK_SHIFT 6
617 #define _I2C_IEN_ACK_MASK 0x40UL
618 #define _I2C_IEN_ACK_DEFAULT 0x00000000UL
619 #define I2C_IEN_ACK_DEFAULT (_I2C_IEN_ACK_DEFAULT << 6)
620 #define I2C_IEN_NACK (0x1UL << 7)
621 #define _I2C_IEN_NACK_SHIFT 7
622 #define _I2C_IEN_NACK_MASK 0x80UL
623 #define _I2C_IEN_NACK_DEFAULT 0x00000000UL
624 #define I2C_IEN_NACK_DEFAULT (_I2C_IEN_NACK_DEFAULT << 7)
625 #define I2C_IEN_MSTOP (0x1UL << 8)
626 #define _I2C_IEN_MSTOP_SHIFT 8
627 #define _I2C_IEN_MSTOP_MASK 0x100UL
628 #define _I2C_IEN_MSTOP_DEFAULT 0x00000000UL
629 #define I2C_IEN_MSTOP_DEFAULT (_I2C_IEN_MSTOP_DEFAULT << 8)
630 #define I2C_IEN_ARBLOST (0x1UL << 9)
631 #define _I2C_IEN_ARBLOST_SHIFT 9
632 #define _I2C_IEN_ARBLOST_MASK 0x200UL
633 #define _I2C_IEN_ARBLOST_DEFAULT 0x00000000UL
634 #define I2C_IEN_ARBLOST_DEFAULT (_I2C_IEN_ARBLOST_DEFAULT << 9)
635 #define I2C_IEN_BUSERR (0x1UL << 10)
636 #define _I2C_IEN_BUSERR_SHIFT 10
637 #define _I2C_IEN_BUSERR_MASK 0x400UL
638 #define _I2C_IEN_BUSERR_DEFAULT 0x00000000UL
639 #define I2C_IEN_BUSERR_DEFAULT (_I2C_IEN_BUSERR_DEFAULT << 10)
640 #define I2C_IEN_BUSHOLD (0x1UL << 11)
641 #define _I2C_IEN_BUSHOLD_SHIFT 11
642 #define _I2C_IEN_BUSHOLD_MASK 0x800UL
643 #define _I2C_IEN_BUSHOLD_DEFAULT 0x00000000UL
644 #define I2C_IEN_BUSHOLD_DEFAULT (_I2C_IEN_BUSHOLD_DEFAULT << 11)
645 #define I2C_IEN_TXOF (0x1UL << 12)
646 #define _I2C_IEN_TXOF_SHIFT 12
647 #define _I2C_IEN_TXOF_MASK 0x1000UL
648 #define _I2C_IEN_TXOF_DEFAULT 0x00000000UL
649 #define I2C_IEN_TXOF_DEFAULT (_I2C_IEN_TXOF_DEFAULT << 12)
650 #define I2C_IEN_RXUF (0x1UL << 13)
651 #define _I2C_IEN_RXUF_SHIFT 13
652 #define _I2C_IEN_RXUF_MASK 0x2000UL
653 #define _I2C_IEN_RXUF_DEFAULT 0x00000000UL
654 #define I2C_IEN_RXUF_DEFAULT (_I2C_IEN_RXUF_DEFAULT << 13)
655 #define I2C_IEN_BITO (0x1UL << 14)
656 #define _I2C_IEN_BITO_SHIFT 14
657 #define _I2C_IEN_BITO_MASK 0x4000UL
658 #define _I2C_IEN_BITO_DEFAULT 0x00000000UL
659 #define I2C_IEN_BITO_DEFAULT (_I2C_IEN_BITO_DEFAULT << 14)
660 #define I2C_IEN_CLTO (0x1UL << 15)
661 #define _I2C_IEN_CLTO_SHIFT 15
662 #define _I2C_IEN_CLTO_MASK 0x8000UL
663 #define _I2C_IEN_CLTO_DEFAULT 0x00000000UL
664 #define I2C_IEN_CLTO_DEFAULT (_I2C_IEN_CLTO_DEFAULT << 15)
665 #define I2C_IEN_SSTOP (0x1UL << 16)
666 #define _I2C_IEN_SSTOP_SHIFT 16
667 #define _I2C_IEN_SSTOP_MASK 0x10000UL
668 #define _I2C_IEN_SSTOP_DEFAULT 0x00000000UL
669 #define I2C_IEN_SSTOP_DEFAULT (_I2C_IEN_SSTOP_DEFAULT << 16)
671 /* Bit fields for I2C ROUTE */
672 #define _I2C_ROUTE_RESETVALUE 0x00000000UL
673 #define _I2C_ROUTE_MASK 0x00000703UL
674 #define I2C_ROUTE_SDAPEN (0x1UL << 0)
675 #define _I2C_ROUTE_SDAPEN_SHIFT 0
676 #define _I2C_ROUTE_SDAPEN_MASK 0x1UL
677 #define _I2C_ROUTE_SDAPEN_DEFAULT 0x00000000UL
678 #define I2C_ROUTE_SDAPEN_DEFAULT (_I2C_ROUTE_SDAPEN_DEFAULT << 0)
679 #define I2C_ROUTE_SCLPEN (0x1UL << 1)
680 #define _I2C_ROUTE_SCLPEN_SHIFT 1
681 #define _I2C_ROUTE_SCLPEN_MASK 0x2UL
682 #define _I2C_ROUTE_SCLPEN_DEFAULT 0x00000000UL
683 #define I2C_ROUTE_SCLPEN_DEFAULT (_I2C_ROUTE_SCLPEN_DEFAULT << 1)
684 #define _I2C_ROUTE_LOCATION_SHIFT 8
685 #define _I2C_ROUTE_LOCATION_MASK 0x700UL
686 #define _I2C_ROUTE_LOCATION_LOC0 0x00000000UL
687 #define _I2C_ROUTE_LOCATION_DEFAULT 0x00000000UL
688 #define _I2C_ROUTE_LOCATION_LOC1 0x00000001UL
689 #define _I2C_ROUTE_LOCATION_LOC2 0x00000002UL
690 #define _I2C_ROUTE_LOCATION_LOC3 0x00000003UL
691 #define _I2C_ROUTE_LOCATION_LOC4 0x00000004UL
692 #define _I2C_ROUTE_LOCATION_LOC5 0x00000005UL
693 #define _I2C_ROUTE_LOCATION_LOC6 0x00000006UL
694 #define I2C_ROUTE_LOCATION_LOC0 (_I2C_ROUTE_LOCATION_LOC0 << 8)
695 #define I2C_ROUTE_LOCATION_DEFAULT (_I2C_ROUTE_LOCATION_DEFAULT << 8)
696 #define I2C_ROUTE_LOCATION_LOC1 (_I2C_ROUTE_LOCATION_LOC1 << 8)
697 #define I2C_ROUTE_LOCATION_LOC2 (_I2C_ROUTE_LOCATION_LOC2 << 8)
698 #define I2C_ROUTE_LOCATION_LOC3 (_I2C_ROUTE_LOCATION_LOC3 << 8)
699 #define I2C_ROUTE_LOCATION_LOC4 (_I2C_ROUTE_LOCATION_LOC4 << 8)
700 #define I2C_ROUTE_LOCATION_LOC5 (_I2C_ROUTE_LOCATION_LOC5 << 8)
701 #define I2C_ROUTE_LOCATION_LOC6 (_I2C_ROUTE_LOCATION_LOC6 << 8)
__IOM uint32_t SADDR
Definition: efm32gg_i2c.h:48
__IOM uint32_t CMD
Definition: efm32gg_i2c.h:44
__IM uint32_t RXDATAP
Definition: efm32gg_i2c.h:51
__IM uint32_t STATUS
Definition: efm32gg_i2c.h:46
__IM uint32_t IF
Definition: efm32gg_i2c.h:53
__IOM uint32_t ROUTE
Definition: efm32gg_i2c.h:57
__IM uint32_t RXDATA
Definition: efm32gg_i2c.h:50
__IM uint32_t STATE
Definition: efm32gg_i2c.h:45
__IOM uint32_t CTRL
Definition: efm32gg_i2c.h:43
__IOM uint32_t TXDATA
Definition: efm32gg_i2c.h:52
__IOM uint32_t IFS
Definition: efm32gg_i2c.h:54
__IOM uint32_t SADDRMASK
Definition: efm32gg_i2c.h:49
__IOM uint32_t CLKDIV
Definition: efm32gg_i2c.h:47
__IOM uint32_t IFC
Definition: efm32gg_i2c.h:55
__IOM uint32_t IEN
Definition: efm32gg_i2c.h:56