efm32gg/html/efm32gg__emu_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   __IOM uint32_t MEMCTRL;

   __IOM uint32_t LOCK;

   uint32_t       RESERVED0[6];

   __IOM uint32_t AUXCTRL;

   uint32_t       RESERVED1[1];

   __IOM uint32_t EM4CONF;

   __IOM uint32_t BUCTRL;

   __IOM uint32_t PWRCONF;

   __IOM uint32_t BUINACT;

   __IOM uint32_t BUACT;

   __IM uint32_t  STATUS;

   __IOM uint32_t ROUTE;

   __IM uint32_t  IF;

   __IOM uint32_t IFS;

   __IOM uint32_t IFC;

   __IOM uint32_t IEN;

   __IOM uint32_t BUBODBUVINCAL;

   __IOM uint32_t BUBODUNREGCAL;

 } EMU_TypeDef;

 /**************************************************************************/

 /* Bit fields for EMU CTRL */

 #define _EMU_CTRL_RESETVALUE                 0x00000000UL

 #define _EMU_CTRL_MASK                       0x0000000FUL

 #define EMU_CTRL_EMVREG                      (0x1UL << 0)

 #define _EMU_CTRL_EMVREG_SHIFT               0

 #define _EMU_CTRL_EMVREG_MASK                0x1UL

 #define _EMU_CTRL_EMVREG_DEFAULT             0x00000000UL

 #define _EMU_CTRL_EMVREG_REDUCED             0x00000000UL

 #define _EMU_CTRL_EMVREG_FULL                0x00000001UL

 #define EMU_CTRL_EMVREG_DEFAULT              (_EMU_CTRL_EMVREG_DEFAULT << 0)

 #define EMU_CTRL_EMVREG_REDUCED              (_EMU_CTRL_EMVREG_REDUCED << 0)

 #define EMU_CTRL_EMVREG_FULL                 (_EMU_CTRL_EMVREG_FULL << 0)

 #define EMU_CTRL_EM2BLOCK                    (0x1UL << 1)

 #define _EMU_CTRL_EM2BLOCK_SHIFT             1

 #define _EMU_CTRL_EM2BLOCK_MASK              0x2UL

 #define _EMU_CTRL_EM2BLOCK_DEFAULT           0x00000000UL

 #define EMU_CTRL_EM2BLOCK_DEFAULT            (_EMU_CTRL_EM2BLOCK_DEFAULT << 1)

 #define _EMU_CTRL_EM4CTRL_SHIFT              2

 #define _EMU_CTRL_EM4CTRL_MASK               0xCUL

 #define _EMU_CTRL_EM4CTRL_DEFAULT            0x00000000UL

 #define EMU_CTRL_EM4CTRL_DEFAULT             (_EMU_CTRL_EM4CTRL_DEFAULT << 2)

 /* Bit fields for EMU MEMCTRL */

 #define _EMU_MEMCTRL_RESETVALUE              0x00000000UL

 #define _EMU_MEMCTRL_MASK                    0x00000007UL

 #define _EMU_MEMCTRL_POWERDOWN_SHIFT         0

 #define _EMU_MEMCTRL_POWERDOWN_MASK          0x7UL

 #define _EMU_MEMCTRL_POWERDOWN_DEFAULT       0x00000000UL

 #define _EMU_MEMCTRL_POWERDOWN_BLK3          0x00000004UL

 #define _EMU_MEMCTRL_POWERDOWN_BLK23         0x00000006UL

 #define _EMU_MEMCTRL_POWERDOWN_BLK123        0x00000007UL

 #define EMU_MEMCTRL_POWERDOWN_DEFAULT        (_EMU_MEMCTRL_POWERDOWN_DEFAULT << 0)

 #define EMU_MEMCTRL_POWERDOWN_BLK3           (_EMU_MEMCTRL_POWERDOWN_BLK3 << 0)

 #define EMU_MEMCTRL_POWERDOWN_BLK23          (_EMU_MEMCTRL_POWERDOWN_BLK23 << 0)

 #define EMU_MEMCTRL_POWERDOWN_BLK123         (_EMU_MEMCTRL_POWERDOWN_BLK123 << 0)

 /* Bit fields for EMU LOCK */

 #define _EMU_LOCK_RESETVALUE                 0x00000000UL

 #define _EMU_LOCK_MASK                       0x0000FFFFUL

 #define _EMU_LOCK_LOCKKEY_SHIFT              0

 #define _EMU_LOCK_LOCKKEY_MASK               0xFFFFUL

 #define _EMU_LOCK_LOCKKEY_DEFAULT            0x00000000UL

 #define _EMU_LOCK_LOCKKEY_LOCK               0x00000000UL

 #define _EMU_LOCK_LOCKKEY_UNLOCKED           0x00000000UL

 #define _EMU_LOCK_LOCKKEY_LOCKED             0x00000001UL

 #define _EMU_LOCK_LOCKKEY_UNLOCK             0x0000ADE8UL

 #define EMU_LOCK_LOCKKEY_DEFAULT             (_EMU_LOCK_LOCKKEY_DEFAULT << 0)

 #define EMU_LOCK_LOCKKEY_LOCK                (_EMU_LOCK_LOCKKEY_LOCK << 0)

 #define EMU_LOCK_LOCKKEY_UNLOCKED            (_EMU_LOCK_LOCKKEY_UNLOCKED << 0)

 #define EMU_LOCK_LOCKKEY_LOCKED              (_EMU_LOCK_LOCKKEY_LOCKED << 0)

 #define EMU_LOCK_LOCKKEY_UNLOCK              (_EMU_LOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for EMU AUXCTRL */

 #define _EMU_AUXCTRL_RESETVALUE              0x00000000UL

 #define _EMU_AUXCTRL_MASK                    0x00000101UL

 #define EMU_AUXCTRL_HRCCLR                   (0x1UL << 0)

 #define _EMU_AUXCTRL_HRCCLR_SHIFT            0

 #define _EMU_AUXCTRL_HRCCLR_MASK             0x1UL

 #define _EMU_AUXCTRL_HRCCLR_DEFAULT          0x00000000UL

 #define EMU_AUXCTRL_HRCCLR_DEFAULT           (_EMU_AUXCTRL_HRCCLR_DEFAULT << 0)

 #define EMU_AUXCTRL_REDLFXOBOOST             (0x1UL << 8)

 #define _EMU_AUXCTRL_REDLFXOBOOST_SHIFT      8

 #define _EMU_AUXCTRL_REDLFXOBOOST_MASK       0x100UL

 #define _EMU_AUXCTRL_REDLFXOBOOST_DEFAULT    0x00000000UL

 #define EMU_AUXCTRL_REDLFXOBOOST_DEFAULT     (_EMU_AUXCTRL_REDLFXOBOOST_DEFAULT << 8)

 /* Bit fields for EMU EM4CONF */

 #define _EMU_EM4CONF_RESETVALUE              0x00000000UL

 #define _EMU_EM4CONF_MASK                    0x0001001FUL

 #define EMU_EM4CONF_VREGEN                   (0x1UL << 0)

 #define _EMU_EM4CONF_VREGEN_SHIFT            0

 #define _EMU_EM4CONF_VREGEN_MASK             0x1UL

 #define _EMU_EM4CONF_VREGEN_DEFAULT          0x00000000UL

 #define EMU_EM4CONF_VREGEN_DEFAULT           (_EMU_EM4CONF_VREGEN_DEFAULT << 0)

 #define EMU_EM4CONF_BURTCWU                  (0x1UL << 1)

 #define _EMU_EM4CONF_BURTCWU_SHIFT           1

 #define _EMU_EM4CONF_BURTCWU_MASK            0x2UL

 #define _EMU_EM4CONF_BURTCWU_DEFAULT         0x00000000UL

 #define EMU_EM4CONF_BURTCWU_DEFAULT          (_EMU_EM4CONF_BURTCWU_DEFAULT << 1)

 #define _EMU_EM4CONF_OSC_SHIFT               2

 #define _EMU_EM4CONF_OSC_MASK                0xCUL

 #define _EMU_EM4CONF_OSC_DEFAULT             0x00000000UL

 #define _EMU_EM4CONF_OSC_ULFRCO              0x00000000UL

 #define _EMU_EM4CONF_OSC_LFRCO               0x00000001UL

 #define _EMU_EM4CONF_OSC_LFXO                0x00000002UL

 #define EMU_EM4CONF_OSC_DEFAULT              (_EMU_EM4CONF_OSC_DEFAULT << 2)

 #define EMU_EM4CONF_OSC_ULFRCO               (_EMU_EM4CONF_OSC_ULFRCO << 2)

 #define EMU_EM4CONF_OSC_LFRCO                (_EMU_EM4CONF_OSC_LFRCO << 2)

 #define EMU_EM4CONF_OSC_LFXO                 (_EMU_EM4CONF_OSC_LFXO << 2)

 #define EMU_EM4CONF_BUBODRSTDIS              (0x1UL << 4)

 #define _EMU_EM4CONF_BUBODRSTDIS_SHIFT       4

 #define _EMU_EM4CONF_BUBODRSTDIS_MASK        0x10UL

 #define _EMU_EM4CONF_BUBODRSTDIS_DEFAULT     0x00000000UL

 #define EMU_EM4CONF_BUBODRSTDIS_DEFAULT      (_EMU_EM4CONF_BUBODRSTDIS_DEFAULT << 4)

 #define EMU_EM4CONF_LOCKCONF                 (0x1UL << 16)

 #define _EMU_EM4CONF_LOCKCONF_SHIFT          16

 #define _EMU_EM4CONF_LOCKCONF_MASK           0x10000UL

 #define _EMU_EM4CONF_LOCKCONF_DEFAULT        0x00000000UL

 #define EMU_EM4CONF_LOCKCONF_DEFAULT         (_EMU_EM4CONF_LOCKCONF_DEFAULT << 16)

 /* Bit fields for EMU BUCTRL */

 #define _EMU_BUCTRL_RESETVALUE               0x00000000UL

 #define _EMU_BUCTRL_MASK                     0x0000006FUL

 #define EMU_BUCTRL_EN                        (0x1UL << 0)

 #define _EMU_BUCTRL_EN_SHIFT                 0

 #define _EMU_BUCTRL_EN_MASK                  0x1UL

 #define _EMU_BUCTRL_EN_DEFAULT               0x00000000UL

 #define EMU_BUCTRL_EN_DEFAULT                (_EMU_BUCTRL_EN_DEFAULT << 0)

 #define EMU_BUCTRL_STATEN                    (0x1UL << 1)

 #define _EMU_BUCTRL_STATEN_SHIFT             1

 #define _EMU_BUCTRL_STATEN_MASK              0x2UL

 #define _EMU_BUCTRL_STATEN_DEFAULT           0x00000000UL

 #define EMU_BUCTRL_STATEN_DEFAULT            (_EMU_BUCTRL_STATEN_DEFAULT << 1)

 #define EMU_BUCTRL_BODCAL                    (0x1UL << 2)

 #define _EMU_BUCTRL_BODCAL_SHIFT             2

 #define _EMU_BUCTRL_BODCAL_MASK              0x4UL

 #define _EMU_BUCTRL_BODCAL_DEFAULT           0x00000000UL

 #define EMU_BUCTRL_BODCAL_DEFAULT            (_EMU_BUCTRL_BODCAL_DEFAULT << 2)

 #define EMU_BUCTRL_BUMODEBODEN               (0x1UL << 3)

 #define _EMU_BUCTRL_BUMODEBODEN_SHIFT        3

 #define _EMU_BUCTRL_BUMODEBODEN_MASK         0x8UL

 #define _EMU_BUCTRL_BUMODEBODEN_DEFAULT      0x00000000UL

 #define EMU_BUCTRL_BUMODEBODEN_DEFAULT       (_EMU_BUCTRL_BUMODEBODEN_DEFAULT << 3)

 #define _EMU_BUCTRL_PROBE_SHIFT              5

 #define _EMU_BUCTRL_PROBE_MASK               0x60UL

 #define _EMU_BUCTRL_PROBE_DEFAULT            0x00000000UL

 #define _EMU_BUCTRL_PROBE_DISABLE            0x00000000UL

 #define _EMU_BUCTRL_PROBE_VDDDREG            0x00000001UL

 #define _EMU_BUCTRL_PROBE_BUIN               0x00000002UL

 #define _EMU_BUCTRL_PROBE_BUOUT              0x00000003UL

 #define EMU_BUCTRL_PROBE_DEFAULT             (_EMU_BUCTRL_PROBE_DEFAULT << 5)

 #define EMU_BUCTRL_PROBE_DISABLE             (_EMU_BUCTRL_PROBE_DISABLE << 5)

 #define EMU_BUCTRL_PROBE_VDDDREG             (_EMU_BUCTRL_PROBE_VDDDREG << 5)

 #define EMU_BUCTRL_PROBE_BUIN                (_EMU_BUCTRL_PROBE_BUIN << 5)

 #define EMU_BUCTRL_PROBE_BUOUT               (_EMU_BUCTRL_PROBE_BUOUT << 5)

 /* Bit fields for EMU PWRCONF */

 #define _EMU_PWRCONF_RESETVALUE              0x00000000UL

 #define _EMU_PWRCONF_MASK                    0x0000001FUL

 #define EMU_PWRCONF_VOUTWEAK                 (0x1UL << 0)

 #define _EMU_PWRCONF_VOUTWEAK_SHIFT          0

 #define _EMU_PWRCONF_VOUTWEAK_MASK           0x1UL

 #define _EMU_PWRCONF_VOUTWEAK_DEFAULT        0x00000000UL

 #define EMU_PWRCONF_VOUTWEAK_DEFAULT         (_EMU_PWRCONF_VOUTWEAK_DEFAULT << 0)

 #define EMU_PWRCONF_VOUTMED                  (0x1UL << 1)

 #define _EMU_PWRCONF_VOUTMED_SHIFT           1

 #define _EMU_PWRCONF_VOUTMED_MASK            0x2UL

 #define _EMU_PWRCONF_VOUTMED_DEFAULT         0x00000000UL

 #define EMU_PWRCONF_VOUTMED_DEFAULT          (_EMU_PWRCONF_VOUTMED_DEFAULT << 1)

 #define EMU_PWRCONF_VOUTSTRONG               (0x1UL << 2)

 #define _EMU_PWRCONF_VOUTSTRONG_SHIFT        2

 #define _EMU_PWRCONF_VOUTSTRONG_MASK         0x4UL

 #define _EMU_PWRCONF_VOUTSTRONG_DEFAULT      0x00000000UL

 #define EMU_PWRCONF_VOUTSTRONG_DEFAULT       (_EMU_PWRCONF_VOUTSTRONG_DEFAULT << 2)

 #define _EMU_PWRCONF_PWRRES_SHIFT            3

 #define _EMU_PWRCONF_PWRRES_MASK             0x18UL

 #define _EMU_PWRCONF_PWRRES_DEFAULT          0x00000000UL

 #define _EMU_PWRCONF_PWRRES_RES0             0x00000000UL

 #define _EMU_PWRCONF_PWRRES_RES1             0x00000001UL

 #define _EMU_PWRCONF_PWRRES_RES2             0x00000002UL

 #define _EMU_PWRCONF_PWRRES_RES3             0x00000003UL

 #define EMU_PWRCONF_PWRRES_DEFAULT           (_EMU_PWRCONF_PWRRES_DEFAULT << 3)

 #define EMU_PWRCONF_PWRRES_RES0              (_EMU_PWRCONF_PWRRES_RES0 << 3)

 #define EMU_PWRCONF_PWRRES_RES1              (_EMU_PWRCONF_PWRRES_RES1 << 3)

 #define EMU_PWRCONF_PWRRES_RES2              (_EMU_PWRCONF_PWRRES_RES2 << 3)

 #define EMU_PWRCONF_PWRRES_RES3              (_EMU_PWRCONF_PWRRES_RES3 << 3)

 /* Bit fields for EMU BUINACT */

 #define _EMU_BUINACT_RESETVALUE              0x0000000BUL

 #define _EMU_BUINACT_MASK                    0x0000007FUL

 #define _EMU_BUINACT_BUENTHRES_SHIFT         0

 #define _EMU_BUINACT_BUENTHRES_MASK          0x7UL

 #define _EMU_BUINACT_BUENTHRES_DEFAULT       0x00000003UL

 #define EMU_BUINACT_BUENTHRES_DEFAULT        (_EMU_BUINACT_BUENTHRES_DEFAULT << 0)

 #define _EMU_BUINACT_BUENRANGE_SHIFT         3

 #define _EMU_BUINACT_BUENRANGE_MASK          0x18UL

 #define _EMU_BUINACT_BUENRANGE_DEFAULT       0x00000001UL

 #define EMU_BUINACT_BUENRANGE_DEFAULT        (_EMU_BUINACT_BUENRANGE_DEFAULT << 3)

 #define _EMU_BUINACT_PWRCON_SHIFT            5

 #define _EMU_BUINACT_PWRCON_MASK             0x60UL

 #define _EMU_BUINACT_PWRCON_DEFAULT          0x00000000UL

 #define _EMU_BUINACT_PWRCON_NONE             0x00000000UL

 #define _EMU_BUINACT_PWRCON_BUMAIN           0x00000001UL

 #define _EMU_BUINACT_PWRCON_MAINBU           0x00000002UL

 #define _EMU_BUINACT_PWRCON_NODIODE          0x00000003UL

 #define EMU_BUINACT_PWRCON_DEFAULT           (_EMU_BUINACT_PWRCON_DEFAULT << 5)

 #define EMU_BUINACT_PWRCON_NONE              (_EMU_BUINACT_PWRCON_NONE << 5)

 #define EMU_BUINACT_PWRCON_BUMAIN            (_EMU_BUINACT_PWRCON_BUMAIN << 5)

 #define EMU_BUINACT_PWRCON_MAINBU            (_EMU_BUINACT_PWRCON_MAINBU << 5)

 #define EMU_BUINACT_PWRCON_NODIODE           (_EMU_BUINACT_PWRCON_NODIODE << 5)

 /* Bit fields for EMU BUACT */

 #define _EMU_BUACT_RESETVALUE                0x0000000BUL

 #define _EMU_BUACT_MASK                      0x0000007FUL

 #define _EMU_BUACT_BUEXTHRES_SHIFT           0

 #define _EMU_BUACT_BUEXTHRES_MASK            0x7UL

 #define _EMU_BUACT_BUEXTHRES_DEFAULT         0x00000003UL

 #define EMU_BUACT_BUEXTHRES_DEFAULT          (_EMU_BUACT_BUEXTHRES_DEFAULT << 0)

 #define _EMU_BUACT_BUEXRANGE_SHIFT           3

 #define _EMU_BUACT_BUEXRANGE_MASK            0x18UL

 #define _EMU_BUACT_BUEXRANGE_DEFAULT         0x00000001UL

 #define EMU_BUACT_BUEXRANGE_DEFAULT          (_EMU_BUACT_BUEXRANGE_DEFAULT << 3)

 #define _EMU_BUACT_PWRCON_SHIFT              5

 #define _EMU_BUACT_PWRCON_MASK               0x60UL

 #define _EMU_BUACT_PWRCON_DEFAULT            0x00000000UL

 #define _EMU_BUACT_PWRCON_NONE               0x00000000UL

 #define _EMU_BUACT_PWRCON_BUMAIN             0x00000001UL

 #define _EMU_BUACT_PWRCON_MAINBU             0x00000002UL

 #define _EMU_BUACT_PWRCON_NODIODE            0x00000003UL

 #define EMU_BUACT_PWRCON_DEFAULT             (_EMU_BUACT_PWRCON_DEFAULT << 5)

 #define EMU_BUACT_PWRCON_NONE                (_EMU_BUACT_PWRCON_NONE << 5)

 #define EMU_BUACT_PWRCON_BUMAIN              (_EMU_BUACT_PWRCON_BUMAIN << 5)

 #define EMU_BUACT_PWRCON_MAINBU              (_EMU_BUACT_PWRCON_MAINBU << 5)

 #define EMU_BUACT_PWRCON_NODIODE             (_EMU_BUACT_PWRCON_NODIODE << 5)

 /* Bit fields for EMU STATUS */

 #define _EMU_STATUS_RESETVALUE               0x00000000UL

 #define _EMU_STATUS_MASK                     0x00000001UL

 #define EMU_STATUS_BURDY                     (0x1UL << 0)

 #define _EMU_STATUS_BURDY_SHIFT              0

 #define _EMU_STATUS_BURDY_MASK               0x1UL

 #define _EMU_STATUS_BURDY_DEFAULT            0x00000000UL

 #define EMU_STATUS_BURDY_DEFAULT             (_EMU_STATUS_BURDY_DEFAULT << 0)

 /* Bit fields for EMU ROUTE */

 #define _EMU_ROUTE_RESETVALUE                0x00000001UL

 #define _EMU_ROUTE_MASK                      0x00000001UL

 #define EMU_ROUTE_BUVINPEN                   (0x1UL << 0)

 #define _EMU_ROUTE_BUVINPEN_SHIFT            0

 #define _EMU_ROUTE_BUVINPEN_MASK             0x1UL

 #define _EMU_ROUTE_BUVINPEN_DEFAULT          0x00000001UL

 #define EMU_ROUTE_BUVINPEN_DEFAULT           (_EMU_ROUTE_BUVINPEN_DEFAULT << 0)

 /* Bit fields for EMU IF */

 #define _EMU_IF_RESETVALUE                   0x00000000UL

 #define _EMU_IF_MASK                         0x00000001UL

 #define EMU_IF_BURDY                         (0x1UL << 0)

 #define _EMU_IF_BURDY_SHIFT                  0

 #define _EMU_IF_BURDY_MASK                   0x1UL

 #define _EMU_IF_BURDY_DEFAULT                0x00000000UL

 #define EMU_IF_BURDY_DEFAULT                 (_EMU_IF_BURDY_DEFAULT << 0)

 /* Bit fields for EMU IFS */

 #define _EMU_IFS_RESETVALUE                  0x00000000UL

 #define _EMU_IFS_MASK                        0x00000001UL

 #define EMU_IFS_BURDY                        (0x1UL << 0)

 #define _EMU_IFS_BURDY_SHIFT                 0

 #define _EMU_IFS_BURDY_MASK                  0x1UL

 #define _EMU_IFS_BURDY_DEFAULT               0x00000000UL

 #define EMU_IFS_BURDY_DEFAULT                (_EMU_IFS_BURDY_DEFAULT << 0)

 /* Bit fields for EMU IFC */

 #define _EMU_IFC_RESETVALUE                  0x00000000UL

 #define _EMU_IFC_MASK                        0x00000001UL

 #define EMU_IFC_BURDY                        (0x1UL << 0)

 #define _EMU_IFC_BURDY_SHIFT                 0

 #define _EMU_IFC_BURDY_MASK                  0x1UL

 #define _EMU_IFC_BURDY_DEFAULT               0x00000000UL

 #define EMU_IFC_BURDY_DEFAULT                (_EMU_IFC_BURDY_DEFAULT << 0)

 /* Bit fields for EMU IEN */

 #define _EMU_IEN_RESETVALUE                  0x00000000UL

 #define _EMU_IEN_MASK                        0x00000001UL

 #define EMU_IEN_BURDY                        (0x1UL << 0)

 #define _EMU_IEN_BURDY_SHIFT                 0

 #define _EMU_IEN_BURDY_MASK                  0x1UL

 #define _EMU_IEN_BURDY_DEFAULT               0x00000000UL

 #define EMU_IEN_BURDY_DEFAULT                (_EMU_IEN_BURDY_DEFAULT << 0)

 /* Bit fields for EMU BUBODBUVINCAL */

 #define _EMU_BUBODBUVINCAL_RESETVALUE        0x0000000BUL

 #define _EMU_BUBODBUVINCAL_MASK              0x0000001FUL

 #define _EMU_BUBODBUVINCAL_THRES_SHIFT       0

 #define _EMU_BUBODBUVINCAL_THRES_MASK        0x7UL

 #define _EMU_BUBODBUVINCAL_THRES_DEFAULT     0x00000003UL

 #define EMU_BUBODBUVINCAL_THRES_DEFAULT      (_EMU_BUBODBUVINCAL_THRES_DEFAULT << 0)

 #define _EMU_BUBODBUVINCAL_RANGE_SHIFT       3

 #define _EMU_BUBODBUVINCAL_RANGE_MASK        0x18UL

 #define _EMU_BUBODBUVINCAL_RANGE_DEFAULT     0x00000001UL

 #define EMU_BUBODBUVINCAL_RANGE_DEFAULT      (_EMU_BUBODBUVINCAL_RANGE_DEFAULT << 3)

 /* Bit fields for EMU BUBODUNREGCAL */

 #define _EMU_BUBODUNREGCAL_RESETVALUE        0x0000000BUL

 #define _EMU_BUBODUNREGCAL_MASK              0x0000001FUL

 #define _EMU_BUBODUNREGCAL_THRES_SHIFT       0

 #define _EMU_BUBODUNREGCAL_THRES_MASK        0x7UL

 #define _EMU_BUBODUNREGCAL_THRES_DEFAULT     0x00000003UL

 #define EMU_BUBODUNREGCAL_THRES_DEFAULT      (_EMU_BUBODUNREGCAL_THRES_DEFAULT << 0)

 #define _EMU_BUBODUNREGCAL_RANGE_SHIFT       3

 #define _EMU_BUBODUNREGCAL_RANGE_MASK        0x18UL

 #define _EMU_BUBODUNREGCAL_RANGE_DEFAULT     0x00000001UL

 #define EMU_BUBODUNREGCAL_RANGE_DEFAULT      (_EMU_BUBODUNREGCAL_RANGE_DEFAULT << 3)

EMU_TypeDef::MEMCTRL
__IOM uint32_t MEMCTRL
Definition: efm32gg_emu.h:44

EMU_TypeDef::PWRCONF
__IOM uint32_t PWRCONF
Definition: efm32gg_emu.h:53

EMU_TypeDef::EM4CONF
__IOM uint32_t EM4CONF
Definition: efm32gg_emu.h:51

EMU_TypeDef::IFS
__IOM uint32_t IFS
Definition: efm32gg_emu.h:59

EMU_TypeDef
Definition: efm32gg_emu.h:41

EMU_TypeDef::IFC
__IOM uint32_t IFC
Definition: efm32gg_emu.h:60

EMU_TypeDef::IEN
__IOM uint32_t IEN
Definition: efm32gg_emu.h:61

EMU_TypeDef::ROUTE
__IOM uint32_t ROUTE
Definition: efm32gg_emu.h:57

EMU_TypeDef::BUBODUNREGCAL
__IOM uint32_t BUBODUNREGCAL
Definition: efm32gg_emu.h:63

EMU_TypeDef::BUCTRL
__IOM uint32_t BUCTRL
Definition: efm32gg_emu.h:52

EMU_TypeDef::IF
__IM uint32_t IF
Definition: efm32gg_emu.h:58

EMU_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32gg_emu.h:43

EMU_TypeDef::BUACT
__IOM uint32_t BUACT
Definition: efm32gg_emu.h:55

EMU_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efm32gg_emu.h:56

EMU_TypeDef::AUXCTRL
__IOM uint32_t AUXCTRL
Definition: efm32gg_emu.h:48

EMU_TypeDef::BUINACT
__IOM uint32_t BUINACT
Definition: efm32gg_emu.h:54

EMU_TypeDef::LOCK
__IOM uint32_t LOCK
Definition: efm32gg_emu.h:45

EMU_TypeDef::BUBODBUVINCAL
__IOM uint32_t BUBODBUVINCAL
Definition: efm32gg_emu.h:62