EFM32 Giant Gecko Software Documentation  efm32gg-doc-5.1.2
efm32gg_ebi.h
Go to the documentation of this file.
1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t ADDRTIMING;
45  __IOM uint32_t RDTIMING;
46  __IOM uint32_t WRTIMING;
47  __IOM uint32_t POLARITY;
48  __IOM uint32_t ROUTE;
49  __IOM uint32_t ADDRTIMING1;
50  __IOM uint32_t RDTIMING1;
51  __IOM uint32_t WRTIMING1;
52  __IOM uint32_t POLARITY1;
53  __IOM uint32_t ADDRTIMING2;
54  __IOM uint32_t RDTIMING2;
55  __IOM uint32_t WRTIMING2;
56  __IOM uint32_t POLARITY2;
57  __IOM uint32_t ADDRTIMING3;
58  __IOM uint32_t RDTIMING3;
59  __IOM uint32_t WRTIMING3;
60  __IOM uint32_t POLARITY3;
61  __IOM uint32_t PAGECTRL;
62  __IOM uint32_t NANDCTRL;
63  __IOM uint32_t CMD;
64  __IM uint32_t STATUS;
65  __IM uint32_t ECCPARITY;
66  __IOM uint32_t TFTCTRL;
67  __IM uint32_t TFTSTATUS;
68  __IOM uint32_t TFTFRAMEBASE;
69  __IOM uint32_t TFTSTRIDE;
70  __IOM uint32_t TFTSIZE;
71  __IOM uint32_t TFTHPORCH;
72  __IOM uint32_t TFTVPORCH;
73  __IOM uint32_t TFTTIMING;
74  __IOM uint32_t TFTPOLARITY;
75  __IOM uint32_t TFTDD;
76  __IOM uint32_t TFTALPHA;
77  __IOM uint32_t TFTPIXEL0;
78  __IOM uint32_t TFTPIXEL1;
79  __IM uint32_t TFTPIXEL;
80  __IOM uint32_t TFTMASK;
81  __IM uint32_t IF;
82  __IOM uint32_t IFS;
83  __IOM uint32_t IFC;
84  __IOM uint32_t IEN;
85 } EBI_TypeDef;
87 /**************************************************************************/
92 /* Bit fields for EBI CTRL */
93 #define _EBI_CTRL_RESETVALUE 0x00000000UL
94 #define _EBI_CTRL_MASK 0xCFFFFFFFUL
95 #define _EBI_CTRL_MODE_SHIFT 0
96 #define _EBI_CTRL_MODE_MASK 0x3UL
97 #define _EBI_CTRL_MODE_DEFAULT 0x00000000UL
98 #define _EBI_CTRL_MODE_D8A8 0x00000000UL
99 #define _EBI_CTRL_MODE_D16A16ALE 0x00000001UL
100 #define _EBI_CTRL_MODE_D8A24ALE 0x00000002UL
101 #define _EBI_CTRL_MODE_D16 0x00000003UL
102 #define EBI_CTRL_MODE_DEFAULT (_EBI_CTRL_MODE_DEFAULT << 0)
103 #define EBI_CTRL_MODE_D8A8 (_EBI_CTRL_MODE_D8A8 << 0)
104 #define EBI_CTRL_MODE_D16A16ALE (_EBI_CTRL_MODE_D16A16ALE << 0)
105 #define EBI_CTRL_MODE_D8A24ALE (_EBI_CTRL_MODE_D8A24ALE << 0)
106 #define EBI_CTRL_MODE_D16 (_EBI_CTRL_MODE_D16 << 0)
107 #define _EBI_CTRL_MODE1_SHIFT 2
108 #define _EBI_CTRL_MODE1_MASK 0xCUL
109 #define _EBI_CTRL_MODE1_DEFAULT 0x00000000UL
110 #define _EBI_CTRL_MODE1_D8A8 0x00000000UL
111 #define _EBI_CTRL_MODE1_D16A16ALE 0x00000001UL
112 #define _EBI_CTRL_MODE1_D8A24ALE 0x00000002UL
113 #define _EBI_CTRL_MODE1_D16 0x00000003UL
114 #define EBI_CTRL_MODE1_DEFAULT (_EBI_CTRL_MODE1_DEFAULT << 2)
115 #define EBI_CTRL_MODE1_D8A8 (_EBI_CTRL_MODE1_D8A8 << 2)
116 #define EBI_CTRL_MODE1_D16A16ALE (_EBI_CTRL_MODE1_D16A16ALE << 2)
117 #define EBI_CTRL_MODE1_D8A24ALE (_EBI_CTRL_MODE1_D8A24ALE << 2)
118 #define EBI_CTRL_MODE1_D16 (_EBI_CTRL_MODE1_D16 << 2)
119 #define _EBI_CTRL_MODE2_SHIFT 4
120 #define _EBI_CTRL_MODE2_MASK 0x30UL
121 #define _EBI_CTRL_MODE2_DEFAULT 0x00000000UL
122 #define _EBI_CTRL_MODE2_D8A8 0x00000000UL
123 #define _EBI_CTRL_MODE2_D16A16ALE 0x00000001UL
124 #define _EBI_CTRL_MODE2_D8A24ALE 0x00000002UL
125 #define _EBI_CTRL_MODE2_D16 0x00000003UL
126 #define EBI_CTRL_MODE2_DEFAULT (_EBI_CTRL_MODE2_DEFAULT << 4)
127 #define EBI_CTRL_MODE2_D8A8 (_EBI_CTRL_MODE2_D8A8 << 4)
128 #define EBI_CTRL_MODE2_D16A16ALE (_EBI_CTRL_MODE2_D16A16ALE << 4)
129 #define EBI_CTRL_MODE2_D8A24ALE (_EBI_CTRL_MODE2_D8A24ALE << 4)
130 #define EBI_CTRL_MODE2_D16 (_EBI_CTRL_MODE2_D16 << 4)
131 #define _EBI_CTRL_MODE3_SHIFT 6
132 #define _EBI_CTRL_MODE3_MASK 0xC0UL
133 #define _EBI_CTRL_MODE3_DEFAULT 0x00000000UL
134 #define _EBI_CTRL_MODE3_D8A8 0x00000000UL
135 #define _EBI_CTRL_MODE3_D16A16ALE 0x00000001UL
136 #define _EBI_CTRL_MODE3_D8A24ALE 0x00000002UL
137 #define _EBI_CTRL_MODE3_D16 0x00000003UL
138 #define EBI_CTRL_MODE3_DEFAULT (_EBI_CTRL_MODE3_DEFAULT << 6)
139 #define EBI_CTRL_MODE3_D8A8 (_EBI_CTRL_MODE3_D8A8 << 6)
140 #define EBI_CTRL_MODE3_D16A16ALE (_EBI_CTRL_MODE3_D16A16ALE << 6)
141 #define EBI_CTRL_MODE3_D8A24ALE (_EBI_CTRL_MODE3_D8A24ALE << 6)
142 #define EBI_CTRL_MODE3_D16 (_EBI_CTRL_MODE3_D16 << 6)
143 #define EBI_CTRL_BANK0EN (0x1UL << 8)
144 #define _EBI_CTRL_BANK0EN_SHIFT 8
145 #define _EBI_CTRL_BANK0EN_MASK 0x100UL
146 #define _EBI_CTRL_BANK0EN_DEFAULT 0x00000000UL
147 #define EBI_CTRL_BANK0EN_DEFAULT (_EBI_CTRL_BANK0EN_DEFAULT << 8)
148 #define EBI_CTRL_BANK1EN (0x1UL << 9)
149 #define _EBI_CTRL_BANK1EN_SHIFT 9
150 #define _EBI_CTRL_BANK1EN_MASK 0x200UL
151 #define _EBI_CTRL_BANK1EN_DEFAULT 0x00000000UL
152 #define EBI_CTRL_BANK1EN_DEFAULT (_EBI_CTRL_BANK1EN_DEFAULT << 9)
153 #define EBI_CTRL_BANK2EN (0x1UL << 10)
154 #define _EBI_CTRL_BANK2EN_SHIFT 10
155 #define _EBI_CTRL_BANK2EN_MASK 0x400UL
156 #define _EBI_CTRL_BANK2EN_DEFAULT 0x00000000UL
157 #define EBI_CTRL_BANK2EN_DEFAULT (_EBI_CTRL_BANK2EN_DEFAULT << 10)
158 #define EBI_CTRL_BANK3EN (0x1UL << 11)
159 #define _EBI_CTRL_BANK3EN_SHIFT 11
160 #define _EBI_CTRL_BANK3EN_MASK 0x800UL
161 #define _EBI_CTRL_BANK3EN_DEFAULT 0x00000000UL
162 #define EBI_CTRL_BANK3EN_DEFAULT (_EBI_CTRL_BANK3EN_DEFAULT << 11)
163 #define EBI_CTRL_NOIDLE (0x1UL << 12)
164 #define _EBI_CTRL_NOIDLE_SHIFT 12
165 #define _EBI_CTRL_NOIDLE_MASK 0x1000UL
166 #define _EBI_CTRL_NOIDLE_DEFAULT 0x00000000UL
167 #define EBI_CTRL_NOIDLE_DEFAULT (_EBI_CTRL_NOIDLE_DEFAULT << 12)
168 #define EBI_CTRL_NOIDLE1 (0x1UL << 13)
169 #define _EBI_CTRL_NOIDLE1_SHIFT 13
170 #define _EBI_CTRL_NOIDLE1_MASK 0x2000UL
171 #define _EBI_CTRL_NOIDLE1_DEFAULT 0x00000000UL
172 #define EBI_CTRL_NOIDLE1_DEFAULT (_EBI_CTRL_NOIDLE1_DEFAULT << 13)
173 #define EBI_CTRL_NOIDLE2 (0x1UL << 14)
174 #define _EBI_CTRL_NOIDLE2_SHIFT 14
175 #define _EBI_CTRL_NOIDLE2_MASK 0x4000UL
176 #define _EBI_CTRL_NOIDLE2_DEFAULT 0x00000000UL
177 #define EBI_CTRL_NOIDLE2_DEFAULT (_EBI_CTRL_NOIDLE2_DEFAULT << 14)
178 #define EBI_CTRL_NOIDLE3 (0x1UL << 15)
179 #define _EBI_CTRL_NOIDLE3_SHIFT 15
180 #define _EBI_CTRL_NOIDLE3_MASK 0x8000UL
181 #define _EBI_CTRL_NOIDLE3_DEFAULT 0x00000000UL
182 #define EBI_CTRL_NOIDLE3_DEFAULT (_EBI_CTRL_NOIDLE3_DEFAULT << 15)
183 #define EBI_CTRL_ARDYEN (0x1UL << 16)
184 #define _EBI_CTRL_ARDYEN_SHIFT 16
185 #define _EBI_CTRL_ARDYEN_MASK 0x10000UL
186 #define _EBI_CTRL_ARDYEN_DEFAULT 0x00000000UL
187 #define EBI_CTRL_ARDYEN_DEFAULT (_EBI_CTRL_ARDYEN_DEFAULT << 16)
188 #define EBI_CTRL_ARDYTODIS (0x1UL << 17)
189 #define _EBI_CTRL_ARDYTODIS_SHIFT 17
190 #define _EBI_CTRL_ARDYTODIS_MASK 0x20000UL
191 #define _EBI_CTRL_ARDYTODIS_DEFAULT 0x00000000UL
192 #define EBI_CTRL_ARDYTODIS_DEFAULT (_EBI_CTRL_ARDYTODIS_DEFAULT << 17)
193 #define EBI_CTRL_ARDY1EN (0x1UL << 18)
194 #define _EBI_CTRL_ARDY1EN_SHIFT 18
195 #define _EBI_CTRL_ARDY1EN_MASK 0x40000UL
196 #define _EBI_CTRL_ARDY1EN_DEFAULT 0x00000000UL
197 #define EBI_CTRL_ARDY1EN_DEFAULT (_EBI_CTRL_ARDY1EN_DEFAULT << 18)
198 #define EBI_CTRL_ARDYTO1DIS (0x1UL << 19)
199 #define _EBI_CTRL_ARDYTO1DIS_SHIFT 19
200 #define _EBI_CTRL_ARDYTO1DIS_MASK 0x80000UL
201 #define _EBI_CTRL_ARDYTO1DIS_DEFAULT 0x00000000UL
202 #define EBI_CTRL_ARDYTO1DIS_DEFAULT (_EBI_CTRL_ARDYTO1DIS_DEFAULT << 19)
203 #define EBI_CTRL_ARDY2EN (0x1UL << 20)
204 #define _EBI_CTRL_ARDY2EN_SHIFT 20
205 #define _EBI_CTRL_ARDY2EN_MASK 0x100000UL
206 #define _EBI_CTRL_ARDY2EN_DEFAULT 0x00000000UL
207 #define EBI_CTRL_ARDY2EN_DEFAULT (_EBI_CTRL_ARDY2EN_DEFAULT << 20)
208 #define EBI_CTRL_ARDYTO2DIS (0x1UL << 21)
209 #define _EBI_CTRL_ARDYTO2DIS_SHIFT 21
210 #define _EBI_CTRL_ARDYTO2DIS_MASK 0x200000UL
211 #define _EBI_CTRL_ARDYTO2DIS_DEFAULT 0x00000000UL
212 #define EBI_CTRL_ARDYTO2DIS_DEFAULT (_EBI_CTRL_ARDYTO2DIS_DEFAULT << 21)
213 #define EBI_CTRL_ARDY3EN (0x1UL << 22)
214 #define _EBI_CTRL_ARDY3EN_SHIFT 22
215 #define _EBI_CTRL_ARDY3EN_MASK 0x400000UL
216 #define _EBI_CTRL_ARDY3EN_DEFAULT 0x00000000UL
217 #define EBI_CTRL_ARDY3EN_DEFAULT (_EBI_CTRL_ARDY3EN_DEFAULT << 22)
218 #define EBI_CTRL_ARDYTO3DIS (0x1UL << 23)
219 #define _EBI_CTRL_ARDYTO3DIS_SHIFT 23
220 #define _EBI_CTRL_ARDYTO3DIS_MASK 0x800000UL
221 #define _EBI_CTRL_ARDYTO3DIS_DEFAULT 0x00000000UL
222 #define EBI_CTRL_ARDYTO3DIS_DEFAULT (_EBI_CTRL_ARDYTO3DIS_DEFAULT << 23)
223 #define EBI_CTRL_BL (0x1UL << 24)
224 #define _EBI_CTRL_BL_SHIFT 24
225 #define _EBI_CTRL_BL_MASK 0x1000000UL
226 #define _EBI_CTRL_BL_DEFAULT 0x00000000UL
227 #define EBI_CTRL_BL_DEFAULT (_EBI_CTRL_BL_DEFAULT << 24)
228 #define EBI_CTRL_BL1 (0x1UL << 25)
229 #define _EBI_CTRL_BL1_SHIFT 25
230 #define _EBI_CTRL_BL1_MASK 0x2000000UL
231 #define _EBI_CTRL_BL1_DEFAULT 0x00000000UL
232 #define EBI_CTRL_BL1_DEFAULT (_EBI_CTRL_BL1_DEFAULT << 25)
233 #define EBI_CTRL_BL2 (0x1UL << 26)
234 #define _EBI_CTRL_BL2_SHIFT 26
235 #define _EBI_CTRL_BL2_MASK 0x4000000UL
236 #define _EBI_CTRL_BL2_DEFAULT 0x00000000UL
237 #define EBI_CTRL_BL2_DEFAULT (_EBI_CTRL_BL2_DEFAULT << 26)
238 #define EBI_CTRL_BL3 (0x1UL << 27)
239 #define _EBI_CTRL_BL3_SHIFT 27
240 #define _EBI_CTRL_BL3_MASK 0x8000000UL
241 #define _EBI_CTRL_BL3_DEFAULT 0x00000000UL
242 #define EBI_CTRL_BL3_DEFAULT (_EBI_CTRL_BL3_DEFAULT << 27)
243 #define EBI_CTRL_ITS (0x1UL << 30)
244 #define _EBI_CTRL_ITS_SHIFT 30
245 #define _EBI_CTRL_ITS_MASK 0x40000000UL
246 #define _EBI_CTRL_ITS_DEFAULT 0x00000000UL
247 #define EBI_CTRL_ITS_DEFAULT (_EBI_CTRL_ITS_DEFAULT << 30)
248 #define EBI_CTRL_ALTMAP (0x1UL << 31)
249 #define _EBI_CTRL_ALTMAP_SHIFT 31
250 #define _EBI_CTRL_ALTMAP_MASK 0x80000000UL
251 #define _EBI_CTRL_ALTMAP_DEFAULT 0x00000000UL
252 #define EBI_CTRL_ALTMAP_DEFAULT (_EBI_CTRL_ALTMAP_DEFAULT << 31)
254 /* Bit fields for EBI ADDRTIMING */
255 #define _EBI_ADDRTIMING_RESETVALUE 0x00000303UL
256 #define _EBI_ADDRTIMING_MASK 0x10000303UL
257 #define _EBI_ADDRTIMING_ADDRSETUP_SHIFT 0
258 #define _EBI_ADDRTIMING_ADDRSETUP_MASK 0x3UL
259 #define _EBI_ADDRTIMING_ADDRSETUP_DEFAULT 0x00000003UL
260 #define EBI_ADDRTIMING_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING_ADDRSETUP_DEFAULT << 0)
261 #define _EBI_ADDRTIMING_ADDRHOLD_SHIFT 8
262 #define _EBI_ADDRTIMING_ADDRHOLD_MASK 0x300UL
263 #define _EBI_ADDRTIMING_ADDRHOLD_DEFAULT 0x00000003UL
264 #define EBI_ADDRTIMING_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING_ADDRHOLD_DEFAULT << 8)
265 #define EBI_ADDRTIMING_HALFALE (0x1UL << 28)
266 #define _EBI_ADDRTIMING_HALFALE_SHIFT 28
267 #define _EBI_ADDRTIMING_HALFALE_MASK 0x10000000UL
268 #define _EBI_ADDRTIMING_HALFALE_DEFAULT 0x00000000UL
269 #define EBI_ADDRTIMING_HALFALE_DEFAULT (_EBI_ADDRTIMING_HALFALE_DEFAULT << 28)
271 /* Bit fields for EBI RDTIMING */
272 #define _EBI_RDTIMING_RESETVALUE 0x00033F03UL
273 #define _EBI_RDTIMING_MASK 0x70033F03UL
274 #define _EBI_RDTIMING_RDSETUP_SHIFT 0
275 #define _EBI_RDTIMING_RDSETUP_MASK 0x3UL
276 #define _EBI_RDTIMING_RDSETUP_DEFAULT 0x00000003UL
277 #define EBI_RDTIMING_RDSETUP_DEFAULT (_EBI_RDTIMING_RDSETUP_DEFAULT << 0)
278 #define _EBI_RDTIMING_RDSTRB_SHIFT 8
279 #define _EBI_RDTIMING_RDSTRB_MASK 0x3F00UL
280 #define _EBI_RDTIMING_RDSTRB_DEFAULT 0x0000003FUL
281 #define EBI_RDTIMING_RDSTRB_DEFAULT (_EBI_RDTIMING_RDSTRB_DEFAULT << 8)
282 #define _EBI_RDTIMING_RDHOLD_SHIFT 16
283 #define _EBI_RDTIMING_RDHOLD_MASK 0x30000UL
284 #define _EBI_RDTIMING_RDHOLD_DEFAULT 0x00000003UL
285 #define EBI_RDTIMING_RDHOLD_DEFAULT (_EBI_RDTIMING_RDHOLD_DEFAULT << 16)
286 #define EBI_RDTIMING_HALFRE (0x1UL << 28)
287 #define _EBI_RDTIMING_HALFRE_SHIFT 28
288 #define _EBI_RDTIMING_HALFRE_MASK 0x10000000UL
289 #define _EBI_RDTIMING_HALFRE_DEFAULT 0x00000000UL
290 #define EBI_RDTIMING_HALFRE_DEFAULT (_EBI_RDTIMING_HALFRE_DEFAULT << 28)
291 #define EBI_RDTIMING_PREFETCH (0x1UL << 29)
292 #define _EBI_RDTIMING_PREFETCH_SHIFT 29
293 #define _EBI_RDTIMING_PREFETCH_MASK 0x20000000UL
294 #define _EBI_RDTIMING_PREFETCH_DEFAULT 0x00000000UL
295 #define EBI_RDTIMING_PREFETCH_DEFAULT (_EBI_RDTIMING_PREFETCH_DEFAULT << 29)
296 #define EBI_RDTIMING_PAGEMODE (0x1UL << 30)
297 #define _EBI_RDTIMING_PAGEMODE_SHIFT 30
298 #define _EBI_RDTIMING_PAGEMODE_MASK 0x40000000UL
299 #define _EBI_RDTIMING_PAGEMODE_DEFAULT 0x00000000UL
300 #define EBI_RDTIMING_PAGEMODE_DEFAULT (_EBI_RDTIMING_PAGEMODE_DEFAULT << 30)
302 /* Bit fields for EBI WRTIMING */
303 #define _EBI_WRTIMING_RESETVALUE 0x00033F03UL
304 #define _EBI_WRTIMING_MASK 0x30033F03UL
305 #define _EBI_WRTIMING_WRSETUP_SHIFT 0
306 #define _EBI_WRTIMING_WRSETUP_MASK 0x3UL
307 #define _EBI_WRTIMING_WRSETUP_DEFAULT 0x00000003UL
308 #define EBI_WRTIMING_WRSETUP_DEFAULT (_EBI_WRTIMING_WRSETUP_DEFAULT << 0)
309 #define _EBI_WRTIMING_WRSTRB_SHIFT 8
310 #define _EBI_WRTIMING_WRSTRB_MASK 0x3F00UL
311 #define _EBI_WRTIMING_WRSTRB_DEFAULT 0x0000003FUL
312 #define EBI_WRTIMING_WRSTRB_DEFAULT (_EBI_WRTIMING_WRSTRB_DEFAULT << 8)
313 #define _EBI_WRTIMING_WRHOLD_SHIFT 16
314 #define _EBI_WRTIMING_WRHOLD_MASK 0x30000UL
315 #define _EBI_WRTIMING_WRHOLD_DEFAULT 0x00000003UL
316 #define EBI_WRTIMING_WRHOLD_DEFAULT (_EBI_WRTIMING_WRHOLD_DEFAULT << 16)
317 #define EBI_WRTIMING_HALFWE (0x1UL << 28)
318 #define _EBI_WRTIMING_HALFWE_SHIFT 28
319 #define _EBI_WRTIMING_HALFWE_MASK 0x10000000UL
320 #define _EBI_WRTIMING_HALFWE_DEFAULT 0x00000000UL
321 #define EBI_WRTIMING_HALFWE_DEFAULT (_EBI_WRTIMING_HALFWE_DEFAULT << 28)
322 #define EBI_WRTIMING_WBUFDIS (0x1UL << 29)
323 #define _EBI_WRTIMING_WBUFDIS_SHIFT 29
324 #define _EBI_WRTIMING_WBUFDIS_MASK 0x20000000UL
325 #define _EBI_WRTIMING_WBUFDIS_DEFAULT 0x00000000UL
326 #define EBI_WRTIMING_WBUFDIS_DEFAULT (_EBI_WRTIMING_WBUFDIS_DEFAULT << 29)
328 /* Bit fields for EBI POLARITY */
329 #define _EBI_POLARITY_RESETVALUE 0x00000000UL
330 #define _EBI_POLARITY_MASK 0x0000003FUL
331 #define EBI_POLARITY_CSPOL (0x1UL << 0)
332 #define _EBI_POLARITY_CSPOL_SHIFT 0
333 #define _EBI_POLARITY_CSPOL_MASK 0x1UL
334 #define _EBI_POLARITY_CSPOL_DEFAULT 0x00000000UL
335 #define _EBI_POLARITY_CSPOL_ACTIVELOW 0x00000000UL
336 #define _EBI_POLARITY_CSPOL_ACTIVEHIGH 0x00000001UL
337 #define EBI_POLARITY_CSPOL_DEFAULT (_EBI_POLARITY_CSPOL_DEFAULT << 0)
338 #define EBI_POLARITY_CSPOL_ACTIVELOW (_EBI_POLARITY_CSPOL_ACTIVELOW << 0)
339 #define EBI_POLARITY_CSPOL_ACTIVEHIGH (_EBI_POLARITY_CSPOL_ACTIVEHIGH << 0)
340 #define EBI_POLARITY_REPOL (0x1UL << 1)
341 #define _EBI_POLARITY_REPOL_SHIFT 1
342 #define _EBI_POLARITY_REPOL_MASK 0x2UL
343 #define _EBI_POLARITY_REPOL_DEFAULT 0x00000000UL
344 #define _EBI_POLARITY_REPOL_ACTIVELOW 0x00000000UL
345 #define _EBI_POLARITY_REPOL_ACTIVEHIGH 0x00000001UL
346 #define EBI_POLARITY_REPOL_DEFAULT (_EBI_POLARITY_REPOL_DEFAULT << 1)
347 #define EBI_POLARITY_REPOL_ACTIVELOW (_EBI_POLARITY_REPOL_ACTIVELOW << 1)
348 #define EBI_POLARITY_REPOL_ACTIVEHIGH (_EBI_POLARITY_REPOL_ACTIVEHIGH << 1)
349 #define EBI_POLARITY_WEPOL (0x1UL << 2)
350 #define _EBI_POLARITY_WEPOL_SHIFT 2
351 #define _EBI_POLARITY_WEPOL_MASK 0x4UL
352 #define _EBI_POLARITY_WEPOL_DEFAULT 0x00000000UL
353 #define _EBI_POLARITY_WEPOL_ACTIVELOW 0x00000000UL
354 #define _EBI_POLARITY_WEPOL_ACTIVEHIGH 0x00000001UL
355 #define EBI_POLARITY_WEPOL_DEFAULT (_EBI_POLARITY_WEPOL_DEFAULT << 2)
356 #define EBI_POLARITY_WEPOL_ACTIVELOW (_EBI_POLARITY_WEPOL_ACTIVELOW << 2)
357 #define EBI_POLARITY_WEPOL_ACTIVEHIGH (_EBI_POLARITY_WEPOL_ACTIVEHIGH << 2)
358 #define EBI_POLARITY_ALEPOL (0x1UL << 3)
359 #define _EBI_POLARITY_ALEPOL_SHIFT 3
360 #define _EBI_POLARITY_ALEPOL_MASK 0x8UL
361 #define _EBI_POLARITY_ALEPOL_DEFAULT 0x00000000UL
362 #define _EBI_POLARITY_ALEPOL_ACTIVELOW 0x00000000UL
363 #define _EBI_POLARITY_ALEPOL_ACTIVEHIGH 0x00000001UL
364 #define EBI_POLARITY_ALEPOL_DEFAULT (_EBI_POLARITY_ALEPOL_DEFAULT << 3)
365 #define EBI_POLARITY_ALEPOL_ACTIVELOW (_EBI_POLARITY_ALEPOL_ACTIVELOW << 3)
366 #define EBI_POLARITY_ALEPOL_ACTIVEHIGH (_EBI_POLARITY_ALEPOL_ACTIVEHIGH << 3)
367 #define EBI_POLARITY_ARDYPOL (0x1UL << 4)
368 #define _EBI_POLARITY_ARDYPOL_SHIFT 4
369 #define _EBI_POLARITY_ARDYPOL_MASK 0x10UL
370 #define _EBI_POLARITY_ARDYPOL_DEFAULT 0x00000000UL
371 #define _EBI_POLARITY_ARDYPOL_ACTIVELOW 0x00000000UL
372 #define _EBI_POLARITY_ARDYPOL_ACTIVEHIGH 0x00000001UL
373 #define EBI_POLARITY_ARDYPOL_DEFAULT (_EBI_POLARITY_ARDYPOL_DEFAULT << 4)
374 #define EBI_POLARITY_ARDYPOL_ACTIVELOW (_EBI_POLARITY_ARDYPOL_ACTIVELOW << 4)
375 #define EBI_POLARITY_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY_ARDYPOL_ACTIVEHIGH << 4)
376 #define EBI_POLARITY_BLPOL (0x1UL << 5)
377 #define _EBI_POLARITY_BLPOL_SHIFT 5
378 #define _EBI_POLARITY_BLPOL_MASK 0x20UL
379 #define _EBI_POLARITY_BLPOL_DEFAULT 0x00000000UL
380 #define _EBI_POLARITY_BLPOL_ACTIVELOW 0x00000000UL
381 #define _EBI_POLARITY_BLPOL_ACTIVEHIGH 0x00000001UL
382 #define EBI_POLARITY_BLPOL_DEFAULT (_EBI_POLARITY_BLPOL_DEFAULT << 5)
383 #define EBI_POLARITY_BLPOL_ACTIVELOW (_EBI_POLARITY_BLPOL_ACTIVELOW << 5)
384 #define EBI_POLARITY_BLPOL_ACTIVEHIGH (_EBI_POLARITY_BLPOL_ACTIVEHIGH << 5)
386 /* Bit fields for EBI ROUTE */
387 #define _EBI_ROUTE_RESETVALUE 0x00000000UL
388 #define _EBI_ROUTE_MASK 0x777F10FFUL
389 #define EBI_ROUTE_EBIPEN (0x1UL << 0)
390 #define _EBI_ROUTE_EBIPEN_SHIFT 0
391 #define _EBI_ROUTE_EBIPEN_MASK 0x1UL
392 #define _EBI_ROUTE_EBIPEN_DEFAULT 0x00000000UL
393 #define EBI_ROUTE_EBIPEN_DEFAULT (_EBI_ROUTE_EBIPEN_DEFAULT << 0)
394 #define EBI_ROUTE_CS0PEN (0x1UL << 1)
395 #define _EBI_ROUTE_CS0PEN_SHIFT 1
396 #define _EBI_ROUTE_CS0PEN_MASK 0x2UL
397 #define _EBI_ROUTE_CS0PEN_DEFAULT 0x00000000UL
398 #define EBI_ROUTE_CS0PEN_DEFAULT (_EBI_ROUTE_CS0PEN_DEFAULT << 1)
399 #define EBI_ROUTE_CS1PEN (0x1UL << 2)
400 #define _EBI_ROUTE_CS1PEN_SHIFT 2
401 #define _EBI_ROUTE_CS1PEN_MASK 0x4UL
402 #define _EBI_ROUTE_CS1PEN_DEFAULT 0x00000000UL
403 #define EBI_ROUTE_CS1PEN_DEFAULT (_EBI_ROUTE_CS1PEN_DEFAULT << 2)
404 #define EBI_ROUTE_CS2PEN (0x1UL << 3)
405 #define _EBI_ROUTE_CS2PEN_SHIFT 3
406 #define _EBI_ROUTE_CS2PEN_MASK 0x8UL
407 #define _EBI_ROUTE_CS2PEN_DEFAULT 0x00000000UL
408 #define EBI_ROUTE_CS2PEN_DEFAULT (_EBI_ROUTE_CS2PEN_DEFAULT << 3)
409 #define EBI_ROUTE_CS3PEN (0x1UL << 4)
410 #define _EBI_ROUTE_CS3PEN_SHIFT 4
411 #define _EBI_ROUTE_CS3PEN_MASK 0x10UL
412 #define _EBI_ROUTE_CS3PEN_DEFAULT 0x00000000UL
413 #define EBI_ROUTE_CS3PEN_DEFAULT (_EBI_ROUTE_CS3PEN_DEFAULT << 4)
414 #define EBI_ROUTE_ALEPEN (0x1UL << 5)
415 #define _EBI_ROUTE_ALEPEN_SHIFT 5
416 #define _EBI_ROUTE_ALEPEN_MASK 0x20UL
417 #define _EBI_ROUTE_ALEPEN_DEFAULT 0x00000000UL
418 #define EBI_ROUTE_ALEPEN_DEFAULT (_EBI_ROUTE_ALEPEN_DEFAULT << 5)
419 #define EBI_ROUTE_ARDYPEN (0x1UL << 6)
420 #define _EBI_ROUTE_ARDYPEN_SHIFT 6
421 #define _EBI_ROUTE_ARDYPEN_MASK 0x40UL
422 #define _EBI_ROUTE_ARDYPEN_DEFAULT 0x00000000UL
423 #define EBI_ROUTE_ARDYPEN_DEFAULT (_EBI_ROUTE_ARDYPEN_DEFAULT << 6)
424 #define EBI_ROUTE_BLPEN (0x1UL << 7)
425 #define _EBI_ROUTE_BLPEN_SHIFT 7
426 #define _EBI_ROUTE_BLPEN_MASK 0x80UL
427 #define _EBI_ROUTE_BLPEN_DEFAULT 0x00000000UL
428 #define EBI_ROUTE_BLPEN_DEFAULT (_EBI_ROUTE_BLPEN_DEFAULT << 7)
429 #define EBI_ROUTE_NANDPEN (0x1UL << 12)
430 #define _EBI_ROUTE_NANDPEN_SHIFT 12
431 #define _EBI_ROUTE_NANDPEN_MASK 0x1000UL
432 #define _EBI_ROUTE_NANDPEN_DEFAULT 0x00000000UL
433 #define EBI_ROUTE_NANDPEN_DEFAULT (_EBI_ROUTE_NANDPEN_DEFAULT << 12)
434 #define _EBI_ROUTE_ALB_SHIFT 16
435 #define _EBI_ROUTE_ALB_MASK 0x30000UL
436 #define _EBI_ROUTE_ALB_DEFAULT 0x00000000UL
437 #define _EBI_ROUTE_ALB_A0 0x00000000UL
438 #define _EBI_ROUTE_ALB_A8 0x00000001UL
439 #define _EBI_ROUTE_ALB_A16 0x00000002UL
440 #define _EBI_ROUTE_ALB_A24 0x00000003UL
441 #define EBI_ROUTE_ALB_DEFAULT (_EBI_ROUTE_ALB_DEFAULT << 16)
442 #define EBI_ROUTE_ALB_A0 (_EBI_ROUTE_ALB_A0 << 16)
443 #define EBI_ROUTE_ALB_A8 (_EBI_ROUTE_ALB_A8 << 16)
444 #define EBI_ROUTE_ALB_A16 (_EBI_ROUTE_ALB_A16 << 16)
445 #define EBI_ROUTE_ALB_A24 (_EBI_ROUTE_ALB_A24 << 16)
446 #define _EBI_ROUTE_APEN_SHIFT 18
447 #define _EBI_ROUTE_APEN_MASK 0x7C0000UL
448 #define _EBI_ROUTE_APEN_DEFAULT 0x00000000UL
449 #define _EBI_ROUTE_APEN_A0 0x00000000UL
450 #define _EBI_ROUTE_APEN_A5 0x00000005UL
451 #define _EBI_ROUTE_APEN_A6 0x00000006UL
452 #define _EBI_ROUTE_APEN_A7 0x00000007UL
453 #define _EBI_ROUTE_APEN_A8 0x00000008UL
454 #define _EBI_ROUTE_APEN_A9 0x00000009UL
455 #define _EBI_ROUTE_APEN_A10 0x0000000AUL
456 #define _EBI_ROUTE_APEN_A11 0x0000000BUL
457 #define _EBI_ROUTE_APEN_A12 0x0000000CUL
458 #define _EBI_ROUTE_APEN_A13 0x0000000DUL
459 #define _EBI_ROUTE_APEN_A14 0x0000000EUL
460 #define _EBI_ROUTE_APEN_A15 0x0000000FUL
461 #define _EBI_ROUTE_APEN_A16 0x00000010UL
462 #define _EBI_ROUTE_APEN_A17 0x00000011UL
463 #define _EBI_ROUTE_APEN_A18 0x00000012UL
464 #define _EBI_ROUTE_APEN_A19 0x00000013UL
465 #define _EBI_ROUTE_APEN_A20 0x00000014UL
466 #define _EBI_ROUTE_APEN_A21 0x00000015UL
467 #define _EBI_ROUTE_APEN_A22 0x00000016UL
468 #define _EBI_ROUTE_APEN_A23 0x00000017UL
469 #define _EBI_ROUTE_APEN_A24 0x00000018UL
470 #define _EBI_ROUTE_APEN_A25 0x00000019UL
471 #define _EBI_ROUTE_APEN_A26 0x0000001AUL
472 #define _EBI_ROUTE_APEN_A27 0x0000001BUL
473 #define _EBI_ROUTE_APEN_A28 0x0000001CUL
474 #define EBI_ROUTE_APEN_DEFAULT (_EBI_ROUTE_APEN_DEFAULT << 18)
475 #define EBI_ROUTE_APEN_A0 (_EBI_ROUTE_APEN_A0 << 18)
476 #define EBI_ROUTE_APEN_A5 (_EBI_ROUTE_APEN_A5 << 18)
477 #define EBI_ROUTE_APEN_A6 (_EBI_ROUTE_APEN_A6 << 18)
478 #define EBI_ROUTE_APEN_A7 (_EBI_ROUTE_APEN_A7 << 18)
479 #define EBI_ROUTE_APEN_A8 (_EBI_ROUTE_APEN_A8 << 18)
480 #define EBI_ROUTE_APEN_A9 (_EBI_ROUTE_APEN_A9 << 18)
481 #define EBI_ROUTE_APEN_A10 (_EBI_ROUTE_APEN_A10 << 18)
482 #define EBI_ROUTE_APEN_A11 (_EBI_ROUTE_APEN_A11 << 18)
483 #define EBI_ROUTE_APEN_A12 (_EBI_ROUTE_APEN_A12 << 18)
484 #define EBI_ROUTE_APEN_A13 (_EBI_ROUTE_APEN_A13 << 18)
485 #define EBI_ROUTE_APEN_A14 (_EBI_ROUTE_APEN_A14 << 18)
486 #define EBI_ROUTE_APEN_A15 (_EBI_ROUTE_APEN_A15 << 18)
487 #define EBI_ROUTE_APEN_A16 (_EBI_ROUTE_APEN_A16 << 18)
488 #define EBI_ROUTE_APEN_A17 (_EBI_ROUTE_APEN_A17 << 18)
489 #define EBI_ROUTE_APEN_A18 (_EBI_ROUTE_APEN_A18 << 18)
490 #define EBI_ROUTE_APEN_A19 (_EBI_ROUTE_APEN_A19 << 18)
491 #define EBI_ROUTE_APEN_A20 (_EBI_ROUTE_APEN_A20 << 18)
492 #define EBI_ROUTE_APEN_A21 (_EBI_ROUTE_APEN_A21 << 18)
493 #define EBI_ROUTE_APEN_A22 (_EBI_ROUTE_APEN_A22 << 18)
494 #define EBI_ROUTE_APEN_A23 (_EBI_ROUTE_APEN_A23 << 18)
495 #define EBI_ROUTE_APEN_A24 (_EBI_ROUTE_APEN_A24 << 18)
496 #define EBI_ROUTE_APEN_A25 (_EBI_ROUTE_APEN_A25 << 18)
497 #define EBI_ROUTE_APEN_A26 (_EBI_ROUTE_APEN_A26 << 18)
498 #define EBI_ROUTE_APEN_A27 (_EBI_ROUTE_APEN_A27 << 18)
499 #define EBI_ROUTE_APEN_A28 (_EBI_ROUTE_APEN_A28 << 18)
500 #define EBI_ROUTE_TFTPEN (0x1UL << 24)
501 #define _EBI_ROUTE_TFTPEN_SHIFT 24
502 #define _EBI_ROUTE_TFTPEN_MASK 0x1000000UL
503 #define _EBI_ROUTE_TFTPEN_DEFAULT 0x00000000UL
504 #define EBI_ROUTE_TFTPEN_DEFAULT (_EBI_ROUTE_TFTPEN_DEFAULT << 24)
505 #define EBI_ROUTE_DATAENPEN (0x1UL << 25)
506 #define _EBI_ROUTE_DATAENPEN_SHIFT 25
507 #define _EBI_ROUTE_DATAENPEN_MASK 0x2000000UL
508 #define _EBI_ROUTE_DATAENPEN_DEFAULT 0x00000000UL
509 #define EBI_ROUTE_DATAENPEN_DEFAULT (_EBI_ROUTE_DATAENPEN_DEFAULT << 25)
510 #define EBI_ROUTE_CSTFTPEN (0x1UL << 26)
511 #define _EBI_ROUTE_CSTFTPEN_SHIFT 26
512 #define _EBI_ROUTE_CSTFTPEN_MASK 0x4000000UL
513 #define _EBI_ROUTE_CSTFTPEN_DEFAULT 0x00000000UL
514 #define EBI_ROUTE_CSTFTPEN_DEFAULT (_EBI_ROUTE_CSTFTPEN_DEFAULT << 26)
515 #define _EBI_ROUTE_LOCATION_SHIFT 28
516 #define _EBI_ROUTE_LOCATION_MASK 0x70000000UL
517 #define _EBI_ROUTE_LOCATION_LOC0 0x00000000UL
518 #define _EBI_ROUTE_LOCATION_DEFAULT 0x00000000UL
519 #define _EBI_ROUTE_LOCATION_LOC1 0x00000001UL
520 #define _EBI_ROUTE_LOCATION_LOC2 0x00000002UL
521 #define EBI_ROUTE_LOCATION_LOC0 (_EBI_ROUTE_LOCATION_LOC0 << 28)
522 #define EBI_ROUTE_LOCATION_DEFAULT (_EBI_ROUTE_LOCATION_DEFAULT << 28)
523 #define EBI_ROUTE_LOCATION_LOC1 (_EBI_ROUTE_LOCATION_LOC1 << 28)
524 #define EBI_ROUTE_LOCATION_LOC2 (_EBI_ROUTE_LOCATION_LOC2 << 28)
526 /* Bit fields for EBI ADDRTIMING1 */
527 #define _EBI_ADDRTIMING1_RESETVALUE 0x00000303UL
528 #define _EBI_ADDRTIMING1_MASK 0x10000303UL
529 #define _EBI_ADDRTIMING1_ADDRSETUP_SHIFT 0
530 #define _EBI_ADDRTIMING1_ADDRSETUP_MASK 0x3UL
531 #define _EBI_ADDRTIMING1_ADDRSETUP_DEFAULT 0x00000003UL
532 #define EBI_ADDRTIMING1_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING1_ADDRSETUP_DEFAULT << 0)
533 #define _EBI_ADDRTIMING1_ADDRHOLD_SHIFT 8
534 #define _EBI_ADDRTIMING1_ADDRHOLD_MASK 0x300UL
535 #define _EBI_ADDRTIMING1_ADDRHOLD_DEFAULT 0x00000003UL
536 #define EBI_ADDRTIMING1_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING1_ADDRHOLD_DEFAULT << 8)
537 #define EBI_ADDRTIMING1_HALFALE (0x1UL << 28)
538 #define _EBI_ADDRTIMING1_HALFALE_SHIFT 28
539 #define _EBI_ADDRTIMING1_HALFALE_MASK 0x10000000UL
540 #define _EBI_ADDRTIMING1_HALFALE_DEFAULT 0x00000000UL
541 #define EBI_ADDRTIMING1_HALFALE_DEFAULT (_EBI_ADDRTIMING1_HALFALE_DEFAULT << 28)
543 /* Bit fields for EBI RDTIMING1 */
544 #define _EBI_RDTIMING1_RESETVALUE 0x00033F03UL
545 #define _EBI_RDTIMING1_MASK 0x70033F03UL
546 #define _EBI_RDTIMING1_RDSETUP_SHIFT 0
547 #define _EBI_RDTIMING1_RDSETUP_MASK 0x3UL
548 #define _EBI_RDTIMING1_RDSETUP_DEFAULT 0x00000003UL
549 #define EBI_RDTIMING1_RDSETUP_DEFAULT (_EBI_RDTIMING1_RDSETUP_DEFAULT << 0)
550 #define _EBI_RDTIMING1_RDSTRB_SHIFT 8
551 #define _EBI_RDTIMING1_RDSTRB_MASK 0x3F00UL
552 #define _EBI_RDTIMING1_RDSTRB_DEFAULT 0x0000003FUL
553 #define EBI_RDTIMING1_RDSTRB_DEFAULT (_EBI_RDTIMING1_RDSTRB_DEFAULT << 8)
554 #define _EBI_RDTIMING1_RDHOLD_SHIFT 16
555 #define _EBI_RDTIMING1_RDHOLD_MASK 0x30000UL
556 #define _EBI_RDTIMING1_RDHOLD_DEFAULT 0x00000003UL
557 #define EBI_RDTIMING1_RDHOLD_DEFAULT (_EBI_RDTIMING1_RDHOLD_DEFAULT << 16)
558 #define EBI_RDTIMING1_HALFRE (0x1UL << 28)
559 #define _EBI_RDTIMING1_HALFRE_SHIFT 28
560 #define _EBI_RDTIMING1_HALFRE_MASK 0x10000000UL
561 #define _EBI_RDTIMING1_HALFRE_DEFAULT 0x00000000UL
562 #define EBI_RDTIMING1_HALFRE_DEFAULT (_EBI_RDTIMING1_HALFRE_DEFAULT << 28)
563 #define EBI_RDTIMING1_PREFETCH (0x1UL << 29)
564 #define _EBI_RDTIMING1_PREFETCH_SHIFT 29
565 #define _EBI_RDTIMING1_PREFETCH_MASK 0x20000000UL
566 #define _EBI_RDTIMING1_PREFETCH_DEFAULT 0x00000000UL
567 #define EBI_RDTIMING1_PREFETCH_DEFAULT (_EBI_RDTIMING1_PREFETCH_DEFAULT << 29)
568 #define EBI_RDTIMING1_PAGEMODE (0x1UL << 30)
569 #define _EBI_RDTIMING1_PAGEMODE_SHIFT 30
570 #define _EBI_RDTIMING1_PAGEMODE_MASK 0x40000000UL
571 #define _EBI_RDTIMING1_PAGEMODE_DEFAULT 0x00000000UL
572 #define EBI_RDTIMING1_PAGEMODE_DEFAULT (_EBI_RDTIMING1_PAGEMODE_DEFAULT << 30)
574 /* Bit fields for EBI WRTIMING1 */
575 #define _EBI_WRTIMING1_RESETVALUE 0x00033F03UL
576 #define _EBI_WRTIMING1_MASK 0x30033F03UL
577 #define _EBI_WRTIMING1_WRSETUP_SHIFT 0
578 #define _EBI_WRTIMING1_WRSETUP_MASK 0x3UL
579 #define _EBI_WRTIMING1_WRSETUP_DEFAULT 0x00000003UL
580 #define EBI_WRTIMING1_WRSETUP_DEFAULT (_EBI_WRTIMING1_WRSETUP_DEFAULT << 0)
581 #define _EBI_WRTIMING1_WRSTRB_SHIFT 8
582 #define _EBI_WRTIMING1_WRSTRB_MASK 0x3F00UL
583 #define _EBI_WRTIMING1_WRSTRB_DEFAULT 0x0000003FUL
584 #define EBI_WRTIMING1_WRSTRB_DEFAULT (_EBI_WRTIMING1_WRSTRB_DEFAULT << 8)
585 #define _EBI_WRTIMING1_WRHOLD_SHIFT 16
586 #define _EBI_WRTIMING1_WRHOLD_MASK 0x30000UL
587 #define _EBI_WRTIMING1_WRHOLD_DEFAULT 0x00000003UL
588 #define EBI_WRTIMING1_WRHOLD_DEFAULT (_EBI_WRTIMING1_WRHOLD_DEFAULT << 16)
589 #define EBI_WRTIMING1_HALFWE (0x1UL << 28)
590 #define _EBI_WRTIMING1_HALFWE_SHIFT 28
591 #define _EBI_WRTIMING1_HALFWE_MASK 0x10000000UL
592 #define _EBI_WRTIMING1_HALFWE_DEFAULT 0x00000000UL
593 #define EBI_WRTIMING1_HALFWE_DEFAULT (_EBI_WRTIMING1_HALFWE_DEFAULT << 28)
594 #define EBI_WRTIMING1_WBUFDIS (0x1UL << 29)
595 #define _EBI_WRTIMING1_WBUFDIS_SHIFT 29
596 #define _EBI_WRTIMING1_WBUFDIS_MASK 0x20000000UL
597 #define _EBI_WRTIMING1_WBUFDIS_DEFAULT 0x00000000UL
598 #define EBI_WRTIMING1_WBUFDIS_DEFAULT (_EBI_WRTIMING1_WBUFDIS_DEFAULT << 29)
600 /* Bit fields for EBI POLARITY1 */
601 #define _EBI_POLARITY1_RESETVALUE 0x00000000UL
602 #define _EBI_POLARITY1_MASK 0x0000003FUL
603 #define EBI_POLARITY1_CSPOL (0x1UL << 0)
604 #define _EBI_POLARITY1_CSPOL_SHIFT 0
605 #define _EBI_POLARITY1_CSPOL_MASK 0x1UL
606 #define _EBI_POLARITY1_CSPOL_DEFAULT 0x00000000UL
607 #define _EBI_POLARITY1_CSPOL_ACTIVELOW 0x00000000UL
608 #define _EBI_POLARITY1_CSPOL_ACTIVEHIGH 0x00000001UL
609 #define EBI_POLARITY1_CSPOL_DEFAULT (_EBI_POLARITY1_CSPOL_DEFAULT << 0)
610 #define EBI_POLARITY1_CSPOL_ACTIVELOW (_EBI_POLARITY1_CSPOL_ACTIVELOW << 0)
611 #define EBI_POLARITY1_CSPOL_ACTIVEHIGH (_EBI_POLARITY1_CSPOL_ACTIVEHIGH << 0)
612 #define EBI_POLARITY1_REPOL (0x1UL << 1)
613 #define _EBI_POLARITY1_REPOL_SHIFT 1
614 #define _EBI_POLARITY1_REPOL_MASK 0x2UL
615 #define _EBI_POLARITY1_REPOL_DEFAULT 0x00000000UL
616 #define _EBI_POLARITY1_REPOL_ACTIVELOW 0x00000000UL
617 #define _EBI_POLARITY1_REPOL_ACTIVEHIGH 0x00000001UL
618 #define EBI_POLARITY1_REPOL_DEFAULT (_EBI_POLARITY1_REPOL_DEFAULT << 1)
619 #define EBI_POLARITY1_REPOL_ACTIVELOW (_EBI_POLARITY1_REPOL_ACTIVELOW << 1)
620 #define EBI_POLARITY1_REPOL_ACTIVEHIGH (_EBI_POLARITY1_REPOL_ACTIVEHIGH << 1)
621 #define EBI_POLARITY1_WEPOL (0x1UL << 2)
622 #define _EBI_POLARITY1_WEPOL_SHIFT 2
623 #define _EBI_POLARITY1_WEPOL_MASK 0x4UL
624 #define _EBI_POLARITY1_WEPOL_DEFAULT 0x00000000UL
625 #define _EBI_POLARITY1_WEPOL_ACTIVELOW 0x00000000UL
626 #define _EBI_POLARITY1_WEPOL_ACTIVEHIGH 0x00000001UL
627 #define EBI_POLARITY1_WEPOL_DEFAULT (_EBI_POLARITY1_WEPOL_DEFAULT << 2)
628 #define EBI_POLARITY1_WEPOL_ACTIVELOW (_EBI_POLARITY1_WEPOL_ACTIVELOW << 2)
629 #define EBI_POLARITY1_WEPOL_ACTIVEHIGH (_EBI_POLARITY1_WEPOL_ACTIVEHIGH << 2)
630 #define EBI_POLARITY1_ALEPOL (0x1UL << 3)
631 #define _EBI_POLARITY1_ALEPOL_SHIFT 3
632 #define _EBI_POLARITY1_ALEPOL_MASK 0x8UL
633 #define _EBI_POLARITY1_ALEPOL_DEFAULT 0x00000000UL
634 #define _EBI_POLARITY1_ALEPOL_ACTIVELOW 0x00000000UL
635 #define _EBI_POLARITY1_ALEPOL_ACTIVEHIGH 0x00000001UL
636 #define EBI_POLARITY1_ALEPOL_DEFAULT (_EBI_POLARITY1_ALEPOL_DEFAULT << 3)
637 #define EBI_POLARITY1_ALEPOL_ACTIVELOW (_EBI_POLARITY1_ALEPOL_ACTIVELOW << 3)
638 #define EBI_POLARITY1_ALEPOL_ACTIVEHIGH (_EBI_POLARITY1_ALEPOL_ACTIVEHIGH << 3)
639 #define EBI_POLARITY1_ARDYPOL (0x1UL << 4)
640 #define _EBI_POLARITY1_ARDYPOL_SHIFT 4
641 #define _EBI_POLARITY1_ARDYPOL_MASK 0x10UL
642 #define _EBI_POLARITY1_ARDYPOL_DEFAULT 0x00000000UL
643 #define _EBI_POLARITY1_ARDYPOL_ACTIVELOW 0x00000000UL
644 #define _EBI_POLARITY1_ARDYPOL_ACTIVEHIGH 0x00000001UL
645 #define EBI_POLARITY1_ARDYPOL_DEFAULT (_EBI_POLARITY1_ARDYPOL_DEFAULT << 4)
646 #define EBI_POLARITY1_ARDYPOL_ACTIVELOW (_EBI_POLARITY1_ARDYPOL_ACTIVELOW << 4)
647 #define EBI_POLARITY1_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY1_ARDYPOL_ACTIVEHIGH << 4)
648 #define EBI_POLARITY1_BLPOL (0x1UL << 5)
649 #define _EBI_POLARITY1_BLPOL_SHIFT 5
650 #define _EBI_POLARITY1_BLPOL_MASK 0x20UL
651 #define _EBI_POLARITY1_BLPOL_DEFAULT 0x00000000UL
652 #define _EBI_POLARITY1_BLPOL_ACTIVELOW 0x00000000UL
653 #define _EBI_POLARITY1_BLPOL_ACTIVEHIGH 0x00000001UL
654 #define EBI_POLARITY1_BLPOL_DEFAULT (_EBI_POLARITY1_BLPOL_DEFAULT << 5)
655 #define EBI_POLARITY1_BLPOL_ACTIVELOW (_EBI_POLARITY1_BLPOL_ACTIVELOW << 5)
656 #define EBI_POLARITY1_BLPOL_ACTIVEHIGH (_EBI_POLARITY1_BLPOL_ACTIVEHIGH << 5)
658 /* Bit fields for EBI ADDRTIMING2 */
659 #define _EBI_ADDRTIMING2_RESETVALUE 0x00000303UL
660 #define _EBI_ADDRTIMING2_MASK 0x10000303UL
661 #define _EBI_ADDRTIMING2_ADDRSETUP_SHIFT 0
662 #define _EBI_ADDRTIMING2_ADDRSETUP_MASK 0x3UL
663 #define _EBI_ADDRTIMING2_ADDRSETUP_DEFAULT 0x00000003UL
664 #define EBI_ADDRTIMING2_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING2_ADDRSETUP_DEFAULT << 0)
665 #define _EBI_ADDRTIMING2_ADDRHOLD_SHIFT 8
666 #define _EBI_ADDRTIMING2_ADDRHOLD_MASK 0x300UL
667 #define _EBI_ADDRTIMING2_ADDRHOLD_DEFAULT 0x00000003UL
668 #define EBI_ADDRTIMING2_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING2_ADDRHOLD_DEFAULT << 8)
669 #define EBI_ADDRTIMING2_HALFALE (0x1UL << 28)
670 #define _EBI_ADDRTIMING2_HALFALE_SHIFT 28
671 #define _EBI_ADDRTIMING2_HALFALE_MASK 0x10000000UL
672 #define _EBI_ADDRTIMING2_HALFALE_DEFAULT 0x00000000UL
673 #define EBI_ADDRTIMING2_HALFALE_DEFAULT (_EBI_ADDRTIMING2_HALFALE_DEFAULT << 28)
675 /* Bit fields for EBI RDTIMING2 */
676 #define _EBI_RDTIMING2_RESETVALUE 0x00033F03UL
677 #define _EBI_RDTIMING2_MASK 0x70033F03UL
678 #define _EBI_RDTIMING2_RDSETUP_SHIFT 0
679 #define _EBI_RDTIMING2_RDSETUP_MASK 0x3UL
680 #define _EBI_RDTIMING2_RDSETUP_DEFAULT 0x00000003UL
681 #define EBI_RDTIMING2_RDSETUP_DEFAULT (_EBI_RDTIMING2_RDSETUP_DEFAULT << 0)
682 #define _EBI_RDTIMING2_RDSTRB_SHIFT 8
683 #define _EBI_RDTIMING2_RDSTRB_MASK 0x3F00UL
684 #define _EBI_RDTIMING2_RDSTRB_DEFAULT 0x0000003FUL
685 #define EBI_RDTIMING2_RDSTRB_DEFAULT (_EBI_RDTIMING2_RDSTRB_DEFAULT << 8)
686 #define _EBI_RDTIMING2_RDHOLD_SHIFT 16
687 #define _EBI_RDTIMING2_RDHOLD_MASK 0x30000UL
688 #define _EBI_RDTIMING2_RDHOLD_DEFAULT 0x00000003UL
689 #define EBI_RDTIMING2_RDHOLD_DEFAULT (_EBI_RDTIMING2_RDHOLD_DEFAULT << 16)
690 #define EBI_RDTIMING2_HALFRE (0x1UL << 28)
691 #define _EBI_RDTIMING2_HALFRE_SHIFT 28
692 #define _EBI_RDTIMING2_HALFRE_MASK 0x10000000UL
693 #define _EBI_RDTIMING2_HALFRE_DEFAULT 0x00000000UL
694 #define EBI_RDTIMING2_HALFRE_DEFAULT (_EBI_RDTIMING2_HALFRE_DEFAULT << 28)
695 #define EBI_RDTIMING2_PREFETCH (0x1UL << 29)
696 #define _EBI_RDTIMING2_PREFETCH_SHIFT 29
697 #define _EBI_RDTIMING2_PREFETCH_MASK 0x20000000UL
698 #define _EBI_RDTIMING2_PREFETCH_DEFAULT 0x00000000UL
699 #define EBI_RDTIMING2_PREFETCH_DEFAULT (_EBI_RDTIMING2_PREFETCH_DEFAULT << 29)
700 #define EBI_RDTIMING2_PAGEMODE (0x1UL << 30)
701 #define _EBI_RDTIMING2_PAGEMODE_SHIFT 30
702 #define _EBI_RDTIMING2_PAGEMODE_MASK 0x40000000UL
703 #define _EBI_RDTIMING2_PAGEMODE_DEFAULT 0x00000000UL
704 #define EBI_RDTIMING2_PAGEMODE_DEFAULT (_EBI_RDTIMING2_PAGEMODE_DEFAULT << 30)
706 /* Bit fields for EBI WRTIMING2 */
707 #define _EBI_WRTIMING2_RESETVALUE 0x00033F03UL
708 #define _EBI_WRTIMING2_MASK 0x30033F03UL
709 #define _EBI_WRTIMING2_WRSETUP_SHIFT 0
710 #define _EBI_WRTIMING2_WRSETUP_MASK 0x3UL
711 #define _EBI_WRTIMING2_WRSETUP_DEFAULT 0x00000003UL
712 #define EBI_WRTIMING2_WRSETUP_DEFAULT (_EBI_WRTIMING2_WRSETUP_DEFAULT << 0)
713 #define _EBI_WRTIMING2_WRSTRB_SHIFT 8
714 #define _EBI_WRTIMING2_WRSTRB_MASK 0x3F00UL
715 #define _EBI_WRTIMING2_WRSTRB_DEFAULT 0x0000003FUL
716 #define EBI_WRTIMING2_WRSTRB_DEFAULT (_EBI_WRTIMING2_WRSTRB_DEFAULT << 8)
717 #define _EBI_WRTIMING2_WRHOLD_SHIFT 16
718 #define _EBI_WRTIMING2_WRHOLD_MASK 0x30000UL
719 #define _EBI_WRTIMING2_WRHOLD_DEFAULT 0x00000003UL
720 #define EBI_WRTIMING2_WRHOLD_DEFAULT (_EBI_WRTIMING2_WRHOLD_DEFAULT << 16)
721 #define EBI_WRTIMING2_HALFWE (0x1UL << 28)
722 #define _EBI_WRTIMING2_HALFWE_SHIFT 28
723 #define _EBI_WRTIMING2_HALFWE_MASK 0x10000000UL
724 #define _EBI_WRTIMING2_HALFWE_DEFAULT 0x00000000UL
725 #define EBI_WRTIMING2_HALFWE_DEFAULT (_EBI_WRTIMING2_HALFWE_DEFAULT << 28)
726 #define EBI_WRTIMING2_WBUFDIS (0x1UL << 29)
727 #define _EBI_WRTIMING2_WBUFDIS_SHIFT 29
728 #define _EBI_WRTIMING2_WBUFDIS_MASK 0x20000000UL
729 #define _EBI_WRTIMING2_WBUFDIS_DEFAULT 0x00000000UL
730 #define EBI_WRTIMING2_WBUFDIS_DEFAULT (_EBI_WRTIMING2_WBUFDIS_DEFAULT << 29)
732 /* Bit fields for EBI POLARITY2 */
733 #define _EBI_POLARITY2_RESETVALUE 0x00000000UL
734 #define _EBI_POLARITY2_MASK 0x0000003FUL
735 #define EBI_POLARITY2_CSPOL (0x1UL << 0)
736 #define _EBI_POLARITY2_CSPOL_SHIFT 0
737 #define _EBI_POLARITY2_CSPOL_MASK 0x1UL
738 #define _EBI_POLARITY2_CSPOL_DEFAULT 0x00000000UL
739 #define _EBI_POLARITY2_CSPOL_ACTIVELOW 0x00000000UL
740 #define _EBI_POLARITY2_CSPOL_ACTIVEHIGH 0x00000001UL
741 #define EBI_POLARITY2_CSPOL_DEFAULT (_EBI_POLARITY2_CSPOL_DEFAULT << 0)
742 #define EBI_POLARITY2_CSPOL_ACTIVELOW (_EBI_POLARITY2_CSPOL_ACTIVELOW << 0)
743 #define EBI_POLARITY2_CSPOL_ACTIVEHIGH (_EBI_POLARITY2_CSPOL_ACTIVEHIGH << 0)
744 #define EBI_POLARITY2_REPOL (0x1UL << 1)
745 #define _EBI_POLARITY2_REPOL_SHIFT 1
746 #define _EBI_POLARITY2_REPOL_MASK 0x2UL
747 #define _EBI_POLARITY2_REPOL_DEFAULT 0x00000000UL
748 #define _EBI_POLARITY2_REPOL_ACTIVELOW 0x00000000UL
749 #define _EBI_POLARITY2_REPOL_ACTIVEHIGH 0x00000001UL
750 #define EBI_POLARITY2_REPOL_DEFAULT (_EBI_POLARITY2_REPOL_DEFAULT << 1)
751 #define EBI_POLARITY2_REPOL_ACTIVELOW (_EBI_POLARITY2_REPOL_ACTIVELOW << 1)
752 #define EBI_POLARITY2_REPOL_ACTIVEHIGH (_EBI_POLARITY2_REPOL_ACTIVEHIGH << 1)
753 #define EBI_POLARITY2_WEPOL (0x1UL << 2)
754 #define _EBI_POLARITY2_WEPOL_SHIFT 2
755 #define _EBI_POLARITY2_WEPOL_MASK 0x4UL
756 #define _EBI_POLARITY2_WEPOL_DEFAULT 0x00000000UL
757 #define _EBI_POLARITY2_WEPOL_ACTIVELOW 0x00000000UL
758 #define _EBI_POLARITY2_WEPOL_ACTIVEHIGH 0x00000001UL
759 #define EBI_POLARITY2_WEPOL_DEFAULT (_EBI_POLARITY2_WEPOL_DEFAULT << 2)
760 #define EBI_POLARITY2_WEPOL_ACTIVELOW (_EBI_POLARITY2_WEPOL_ACTIVELOW << 2)
761 #define EBI_POLARITY2_WEPOL_ACTIVEHIGH (_EBI_POLARITY2_WEPOL_ACTIVEHIGH << 2)
762 #define EBI_POLARITY2_ALEPOL (0x1UL << 3)
763 #define _EBI_POLARITY2_ALEPOL_SHIFT 3
764 #define _EBI_POLARITY2_ALEPOL_MASK 0x8UL
765 #define _EBI_POLARITY2_ALEPOL_DEFAULT 0x00000000UL
766 #define _EBI_POLARITY2_ALEPOL_ACTIVELOW 0x00000000UL
767 #define _EBI_POLARITY2_ALEPOL_ACTIVEHIGH 0x00000001UL
768 #define EBI_POLARITY2_ALEPOL_DEFAULT (_EBI_POLARITY2_ALEPOL_DEFAULT << 3)
769 #define EBI_POLARITY2_ALEPOL_ACTIVELOW (_EBI_POLARITY2_ALEPOL_ACTIVELOW << 3)
770 #define EBI_POLARITY2_ALEPOL_ACTIVEHIGH (_EBI_POLARITY2_ALEPOL_ACTIVEHIGH << 3)
771 #define EBI_POLARITY2_ARDYPOL (0x1UL << 4)
772 #define _EBI_POLARITY2_ARDYPOL_SHIFT 4
773 #define _EBI_POLARITY2_ARDYPOL_MASK 0x10UL
774 #define _EBI_POLARITY2_ARDYPOL_DEFAULT 0x00000000UL
775 #define _EBI_POLARITY2_ARDYPOL_ACTIVELOW 0x00000000UL
776 #define _EBI_POLARITY2_ARDYPOL_ACTIVEHIGH 0x00000001UL
777 #define EBI_POLARITY2_ARDYPOL_DEFAULT (_EBI_POLARITY2_ARDYPOL_DEFAULT << 4)
778 #define EBI_POLARITY2_ARDYPOL_ACTIVELOW (_EBI_POLARITY2_ARDYPOL_ACTIVELOW << 4)
779 #define EBI_POLARITY2_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY2_ARDYPOL_ACTIVEHIGH << 4)
780 #define EBI_POLARITY2_BLPOL (0x1UL << 5)
781 #define _EBI_POLARITY2_BLPOL_SHIFT 5
782 #define _EBI_POLARITY2_BLPOL_MASK 0x20UL
783 #define _EBI_POLARITY2_BLPOL_DEFAULT 0x00000000UL
784 #define _EBI_POLARITY2_BLPOL_ACTIVELOW 0x00000000UL
785 #define _EBI_POLARITY2_BLPOL_ACTIVEHIGH 0x00000001UL
786 #define EBI_POLARITY2_BLPOL_DEFAULT (_EBI_POLARITY2_BLPOL_DEFAULT << 5)
787 #define EBI_POLARITY2_BLPOL_ACTIVELOW (_EBI_POLARITY2_BLPOL_ACTIVELOW << 5)
788 #define EBI_POLARITY2_BLPOL_ACTIVEHIGH (_EBI_POLARITY2_BLPOL_ACTIVEHIGH << 5)
790 /* Bit fields for EBI ADDRTIMING3 */
791 #define _EBI_ADDRTIMING3_RESETVALUE 0x00000303UL
792 #define _EBI_ADDRTIMING3_MASK 0x10000303UL
793 #define _EBI_ADDRTIMING3_ADDRSETUP_SHIFT 0
794 #define _EBI_ADDRTIMING3_ADDRSETUP_MASK 0x3UL
795 #define _EBI_ADDRTIMING3_ADDRSETUP_DEFAULT 0x00000003UL
796 #define EBI_ADDRTIMING3_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING3_ADDRSETUP_DEFAULT << 0)
797 #define _EBI_ADDRTIMING3_ADDRHOLD_SHIFT 8
798 #define _EBI_ADDRTIMING3_ADDRHOLD_MASK 0x300UL
799 #define _EBI_ADDRTIMING3_ADDRHOLD_DEFAULT 0x00000003UL
800 #define EBI_ADDRTIMING3_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING3_ADDRHOLD_DEFAULT << 8)
801 #define EBI_ADDRTIMING3_HALFALE (0x1UL << 28)
802 #define _EBI_ADDRTIMING3_HALFALE_SHIFT 28
803 #define _EBI_ADDRTIMING3_HALFALE_MASK 0x10000000UL
804 #define _EBI_ADDRTIMING3_HALFALE_DEFAULT 0x00000000UL
805 #define EBI_ADDRTIMING3_HALFALE_DEFAULT (_EBI_ADDRTIMING3_HALFALE_DEFAULT << 28)
807 /* Bit fields for EBI RDTIMING3 */
808 #define _EBI_RDTIMING3_RESETVALUE 0x00033F03UL
809 #define _EBI_RDTIMING3_MASK 0x70033F03UL
810 #define _EBI_RDTIMING3_RDSETUP_SHIFT 0
811 #define _EBI_RDTIMING3_RDSETUP_MASK 0x3UL
812 #define _EBI_RDTIMING3_RDSETUP_DEFAULT 0x00000003UL
813 #define EBI_RDTIMING3_RDSETUP_DEFAULT (_EBI_RDTIMING3_RDSETUP_DEFAULT << 0)
814 #define _EBI_RDTIMING3_RDSTRB_SHIFT 8
815 #define _EBI_RDTIMING3_RDSTRB_MASK 0x3F00UL
816 #define _EBI_RDTIMING3_RDSTRB_DEFAULT 0x0000003FUL
817 #define EBI_RDTIMING3_RDSTRB_DEFAULT (_EBI_RDTIMING3_RDSTRB_DEFAULT << 8)
818 #define _EBI_RDTIMING3_RDHOLD_SHIFT 16
819 #define _EBI_RDTIMING3_RDHOLD_MASK 0x30000UL
820 #define _EBI_RDTIMING3_RDHOLD_DEFAULT 0x00000003UL
821 #define EBI_RDTIMING3_RDHOLD_DEFAULT (_EBI_RDTIMING3_RDHOLD_DEFAULT << 16)
822 #define EBI_RDTIMING3_HALFRE (0x1UL << 28)
823 #define _EBI_RDTIMING3_HALFRE_SHIFT 28
824 #define _EBI_RDTIMING3_HALFRE_MASK 0x10000000UL
825 #define _EBI_RDTIMING3_HALFRE_DEFAULT 0x00000000UL
826 #define EBI_RDTIMING3_HALFRE_DEFAULT (_EBI_RDTIMING3_HALFRE_DEFAULT << 28)
827 #define EBI_RDTIMING3_PREFETCH (0x1UL << 29)
828 #define _EBI_RDTIMING3_PREFETCH_SHIFT 29
829 #define _EBI_RDTIMING3_PREFETCH_MASK 0x20000000UL
830 #define _EBI_RDTIMING3_PREFETCH_DEFAULT 0x00000000UL
831 #define EBI_RDTIMING3_PREFETCH_DEFAULT (_EBI_RDTIMING3_PREFETCH_DEFAULT << 29)
832 #define EBI_RDTIMING3_PAGEMODE (0x1UL << 30)
833 #define _EBI_RDTIMING3_PAGEMODE_SHIFT 30
834 #define _EBI_RDTIMING3_PAGEMODE_MASK 0x40000000UL
835 #define _EBI_RDTIMING3_PAGEMODE_DEFAULT 0x00000000UL
836 #define EBI_RDTIMING3_PAGEMODE_DEFAULT (_EBI_RDTIMING3_PAGEMODE_DEFAULT << 30)
838 /* Bit fields for EBI WRTIMING3 */
839 #define _EBI_WRTIMING3_RESETVALUE 0x00033F03UL
840 #define _EBI_WRTIMING3_MASK 0x30033F03UL
841 #define _EBI_WRTIMING3_WRSETUP_SHIFT 0
842 #define _EBI_WRTIMING3_WRSETUP_MASK 0x3UL
843 #define _EBI_WRTIMING3_WRSETUP_DEFAULT 0x00000003UL
844 #define EBI_WRTIMING3_WRSETUP_DEFAULT (_EBI_WRTIMING3_WRSETUP_DEFAULT << 0)
845 #define _EBI_WRTIMING3_WRSTRB_SHIFT 8
846 #define _EBI_WRTIMING3_WRSTRB_MASK 0x3F00UL
847 #define _EBI_WRTIMING3_WRSTRB_DEFAULT 0x0000003FUL
848 #define EBI_WRTIMING3_WRSTRB_DEFAULT (_EBI_WRTIMING3_WRSTRB_DEFAULT << 8)
849 #define _EBI_WRTIMING3_WRHOLD_SHIFT 16
850 #define _EBI_WRTIMING3_WRHOLD_MASK 0x30000UL
851 #define _EBI_WRTIMING3_WRHOLD_DEFAULT 0x00000003UL
852 #define EBI_WRTIMING3_WRHOLD_DEFAULT (_EBI_WRTIMING3_WRHOLD_DEFAULT << 16)
853 #define EBI_WRTIMING3_HALFWE (0x1UL << 28)
854 #define _EBI_WRTIMING3_HALFWE_SHIFT 28
855 #define _EBI_WRTIMING3_HALFWE_MASK 0x10000000UL
856 #define _EBI_WRTIMING3_HALFWE_DEFAULT 0x00000000UL
857 #define EBI_WRTIMING3_HALFWE_DEFAULT (_EBI_WRTIMING3_HALFWE_DEFAULT << 28)
858 #define EBI_WRTIMING3_WBUFDIS (0x1UL << 29)
859 #define _EBI_WRTIMING3_WBUFDIS_SHIFT 29
860 #define _EBI_WRTIMING3_WBUFDIS_MASK 0x20000000UL
861 #define _EBI_WRTIMING3_WBUFDIS_DEFAULT 0x00000000UL
862 #define EBI_WRTIMING3_WBUFDIS_DEFAULT (_EBI_WRTIMING3_WBUFDIS_DEFAULT << 29)
864 /* Bit fields for EBI POLARITY3 */
865 #define _EBI_POLARITY3_RESETVALUE 0x00000000UL
866 #define _EBI_POLARITY3_MASK 0x0000003FUL
867 #define EBI_POLARITY3_CSPOL (0x1UL << 0)
868 #define _EBI_POLARITY3_CSPOL_SHIFT 0
869 #define _EBI_POLARITY3_CSPOL_MASK 0x1UL
870 #define _EBI_POLARITY3_CSPOL_DEFAULT 0x00000000UL
871 #define _EBI_POLARITY3_CSPOL_ACTIVELOW 0x00000000UL
872 #define _EBI_POLARITY3_CSPOL_ACTIVEHIGH 0x00000001UL
873 #define EBI_POLARITY3_CSPOL_DEFAULT (_EBI_POLARITY3_CSPOL_DEFAULT << 0)
874 #define EBI_POLARITY3_CSPOL_ACTIVELOW (_EBI_POLARITY3_CSPOL_ACTIVELOW << 0)
875 #define EBI_POLARITY3_CSPOL_ACTIVEHIGH (_EBI_POLARITY3_CSPOL_ACTIVEHIGH << 0)
876 #define EBI_POLARITY3_REPOL (0x1UL << 1)
877 #define _EBI_POLARITY3_REPOL_SHIFT 1
878 #define _EBI_POLARITY3_REPOL_MASK 0x2UL
879 #define _EBI_POLARITY3_REPOL_DEFAULT 0x00000000UL
880 #define _EBI_POLARITY3_REPOL_ACTIVELOW 0x00000000UL
881 #define _EBI_POLARITY3_REPOL_ACTIVEHIGH 0x00000001UL
882 #define EBI_POLARITY3_REPOL_DEFAULT (_EBI_POLARITY3_REPOL_DEFAULT << 1)
883 #define EBI_POLARITY3_REPOL_ACTIVELOW (_EBI_POLARITY3_REPOL_ACTIVELOW << 1)
884 #define EBI_POLARITY3_REPOL_ACTIVEHIGH (_EBI_POLARITY3_REPOL_ACTIVEHIGH << 1)
885 #define EBI_POLARITY3_WEPOL (0x1UL << 2)
886 #define _EBI_POLARITY3_WEPOL_SHIFT 2
887 #define _EBI_POLARITY3_WEPOL_MASK 0x4UL
888 #define _EBI_POLARITY3_WEPOL_DEFAULT 0x00000000UL
889 #define _EBI_POLARITY3_WEPOL_ACTIVELOW 0x00000000UL
890 #define _EBI_POLARITY3_WEPOL_ACTIVEHIGH 0x00000001UL
891 #define EBI_POLARITY3_WEPOL_DEFAULT (_EBI_POLARITY3_WEPOL_DEFAULT << 2)
892 #define EBI_POLARITY3_WEPOL_ACTIVELOW (_EBI_POLARITY3_WEPOL_ACTIVELOW << 2)
893 #define EBI_POLARITY3_WEPOL_ACTIVEHIGH (_EBI_POLARITY3_WEPOL_ACTIVEHIGH << 2)
894 #define EBI_POLARITY3_ALEPOL (0x1UL << 3)
895 #define _EBI_POLARITY3_ALEPOL_SHIFT 3
896 #define _EBI_POLARITY3_ALEPOL_MASK 0x8UL
897 #define _EBI_POLARITY3_ALEPOL_DEFAULT 0x00000000UL
898 #define _EBI_POLARITY3_ALEPOL_ACTIVELOW 0x00000000UL
899 #define _EBI_POLARITY3_ALEPOL_ACTIVEHIGH 0x00000001UL
900 #define EBI_POLARITY3_ALEPOL_DEFAULT (_EBI_POLARITY3_ALEPOL_DEFAULT << 3)
901 #define EBI_POLARITY3_ALEPOL_ACTIVELOW (_EBI_POLARITY3_ALEPOL_ACTIVELOW << 3)
902 #define EBI_POLARITY3_ALEPOL_ACTIVEHIGH (_EBI_POLARITY3_ALEPOL_ACTIVEHIGH << 3)
903 #define EBI_POLARITY3_ARDYPOL (0x1UL << 4)
904 #define _EBI_POLARITY3_ARDYPOL_SHIFT 4
905 #define _EBI_POLARITY3_ARDYPOL_MASK 0x10UL
906 #define _EBI_POLARITY3_ARDYPOL_DEFAULT 0x00000000UL
907 #define _EBI_POLARITY3_ARDYPOL_ACTIVELOW 0x00000000UL
908 #define _EBI_POLARITY3_ARDYPOL_ACTIVEHIGH 0x00000001UL
909 #define EBI_POLARITY3_ARDYPOL_DEFAULT (_EBI_POLARITY3_ARDYPOL_DEFAULT << 4)
910 #define EBI_POLARITY3_ARDYPOL_ACTIVELOW (_EBI_POLARITY3_ARDYPOL_ACTIVELOW << 4)
911 #define EBI_POLARITY3_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY3_ARDYPOL_ACTIVEHIGH << 4)
912 #define EBI_POLARITY3_BLPOL (0x1UL << 5)
913 #define _EBI_POLARITY3_BLPOL_SHIFT 5
914 #define _EBI_POLARITY3_BLPOL_MASK 0x20UL
915 #define _EBI_POLARITY3_BLPOL_DEFAULT 0x00000000UL
916 #define _EBI_POLARITY3_BLPOL_ACTIVELOW 0x00000000UL
917 #define _EBI_POLARITY3_BLPOL_ACTIVEHIGH 0x00000001UL
918 #define EBI_POLARITY3_BLPOL_DEFAULT (_EBI_POLARITY3_BLPOL_DEFAULT << 5)
919 #define EBI_POLARITY3_BLPOL_ACTIVELOW (_EBI_POLARITY3_BLPOL_ACTIVELOW << 5)
920 #define EBI_POLARITY3_BLPOL_ACTIVEHIGH (_EBI_POLARITY3_BLPOL_ACTIVEHIGH << 5)
922 /* Bit fields for EBI PAGECTRL */
923 #define _EBI_PAGECTRL_RESETVALUE 0x00000700UL
924 #define _EBI_PAGECTRL_MASK 0x07F00713UL
925 #define _EBI_PAGECTRL_PAGELEN_SHIFT 0
926 #define _EBI_PAGECTRL_PAGELEN_MASK 0x3UL
927 #define _EBI_PAGECTRL_PAGELEN_DEFAULT 0x00000000UL
928 #define _EBI_PAGECTRL_PAGELEN_MEMBER4 0x00000000UL
929 #define _EBI_PAGECTRL_PAGELEN_MEMBER8 0x00000001UL
930 #define _EBI_PAGECTRL_PAGELEN_MEMBER16 0x00000002UL
931 #define _EBI_PAGECTRL_PAGELEN_MEMBER32 0x00000003UL
932 #define EBI_PAGECTRL_PAGELEN_DEFAULT (_EBI_PAGECTRL_PAGELEN_DEFAULT << 0)
933 #define EBI_PAGECTRL_PAGELEN_MEMBER4 (_EBI_PAGECTRL_PAGELEN_MEMBER4 << 0)
934 #define EBI_PAGECTRL_PAGELEN_MEMBER8 (_EBI_PAGECTRL_PAGELEN_MEMBER8 << 0)
935 #define EBI_PAGECTRL_PAGELEN_MEMBER16 (_EBI_PAGECTRL_PAGELEN_MEMBER16 << 0)
936 #define EBI_PAGECTRL_PAGELEN_MEMBER32 (_EBI_PAGECTRL_PAGELEN_MEMBER32 << 0)
937 #define EBI_PAGECTRL_INCHIT (0x1UL << 4)
938 #define _EBI_PAGECTRL_INCHIT_SHIFT 4
939 #define _EBI_PAGECTRL_INCHIT_MASK 0x10UL
940 #define _EBI_PAGECTRL_INCHIT_DEFAULT 0x00000000UL
941 #define EBI_PAGECTRL_INCHIT_DEFAULT (_EBI_PAGECTRL_INCHIT_DEFAULT << 4)
942 #define _EBI_PAGECTRL_RDPA_SHIFT 8
943 #define _EBI_PAGECTRL_RDPA_MASK 0x700UL
944 #define _EBI_PAGECTRL_RDPA_DEFAULT 0x00000007UL
945 #define EBI_PAGECTRL_RDPA_DEFAULT (_EBI_PAGECTRL_RDPA_DEFAULT << 8)
946 #define _EBI_PAGECTRL_KEEPOPEN_SHIFT 20
947 #define _EBI_PAGECTRL_KEEPOPEN_MASK 0x7F00000UL
948 #define _EBI_PAGECTRL_KEEPOPEN_DEFAULT 0x00000000UL
949 #define EBI_PAGECTRL_KEEPOPEN_DEFAULT (_EBI_PAGECTRL_KEEPOPEN_DEFAULT << 20)
951 /* Bit fields for EBI NANDCTRL */
952 #define _EBI_NANDCTRL_RESETVALUE 0x00000000UL
953 #define _EBI_NANDCTRL_MASK 0x00000031UL
954 #define EBI_NANDCTRL_EN (0x1UL << 0)
955 #define _EBI_NANDCTRL_EN_SHIFT 0
956 #define _EBI_NANDCTRL_EN_MASK 0x1UL
957 #define _EBI_NANDCTRL_EN_DEFAULT 0x00000000UL
958 #define EBI_NANDCTRL_EN_DEFAULT (_EBI_NANDCTRL_EN_DEFAULT << 0)
959 #define _EBI_NANDCTRL_BANKSEL_SHIFT 4
960 #define _EBI_NANDCTRL_BANKSEL_MASK 0x30UL
961 #define _EBI_NANDCTRL_BANKSEL_DEFAULT 0x00000000UL
962 #define _EBI_NANDCTRL_BANKSEL_BANK0 0x00000000UL
963 #define _EBI_NANDCTRL_BANKSEL_BANK1 0x00000001UL
964 #define _EBI_NANDCTRL_BANKSEL_BANK2 0x00000002UL
965 #define _EBI_NANDCTRL_BANKSEL_BANK3 0x00000003UL
966 #define EBI_NANDCTRL_BANKSEL_DEFAULT (_EBI_NANDCTRL_BANKSEL_DEFAULT << 4)
967 #define EBI_NANDCTRL_BANKSEL_BANK0 (_EBI_NANDCTRL_BANKSEL_BANK0 << 4)
968 #define EBI_NANDCTRL_BANKSEL_BANK1 (_EBI_NANDCTRL_BANKSEL_BANK1 << 4)
969 #define EBI_NANDCTRL_BANKSEL_BANK2 (_EBI_NANDCTRL_BANKSEL_BANK2 << 4)
970 #define EBI_NANDCTRL_BANKSEL_BANK3 (_EBI_NANDCTRL_BANKSEL_BANK3 << 4)
972 /* Bit fields for EBI CMD */
973 #define _EBI_CMD_RESETVALUE 0x00000000UL
974 #define _EBI_CMD_MASK 0x00000007UL
975 #define EBI_CMD_ECCSTART (0x1UL << 0)
976 #define _EBI_CMD_ECCSTART_SHIFT 0
977 #define _EBI_CMD_ECCSTART_MASK 0x1UL
978 #define _EBI_CMD_ECCSTART_DEFAULT 0x00000000UL
979 #define EBI_CMD_ECCSTART_DEFAULT (_EBI_CMD_ECCSTART_DEFAULT << 0)
980 #define EBI_CMD_ECCSTOP (0x1UL << 1)
981 #define _EBI_CMD_ECCSTOP_SHIFT 1
982 #define _EBI_CMD_ECCSTOP_MASK 0x2UL
983 #define _EBI_CMD_ECCSTOP_DEFAULT 0x00000000UL
984 #define EBI_CMD_ECCSTOP_DEFAULT (_EBI_CMD_ECCSTOP_DEFAULT << 1)
985 #define EBI_CMD_ECCCLEAR (0x1UL << 2)
986 #define _EBI_CMD_ECCCLEAR_SHIFT 2
987 #define _EBI_CMD_ECCCLEAR_MASK 0x4UL
988 #define _EBI_CMD_ECCCLEAR_DEFAULT 0x00000000UL
989 #define EBI_CMD_ECCCLEAR_DEFAULT (_EBI_CMD_ECCCLEAR_DEFAULT << 2)
991 /* Bit fields for EBI STATUS */
992 #define _EBI_STATUS_RESETVALUE 0x00000000UL
993 #define _EBI_STATUS_MASK 0x00003711UL
994 #define EBI_STATUS_AHBACT (0x1UL << 0)
995 #define _EBI_STATUS_AHBACT_SHIFT 0
996 #define _EBI_STATUS_AHBACT_MASK 0x1UL
997 #define _EBI_STATUS_AHBACT_DEFAULT 0x00000000UL
998 #define EBI_STATUS_AHBACT_DEFAULT (_EBI_STATUS_AHBACT_DEFAULT << 0)
999 #define EBI_STATUS_ECCACT (0x1UL << 4)
1000 #define _EBI_STATUS_ECCACT_SHIFT 4
1001 #define _EBI_STATUS_ECCACT_MASK 0x10UL
1002 #define _EBI_STATUS_ECCACT_DEFAULT 0x00000000UL
1003 #define EBI_STATUS_ECCACT_DEFAULT (_EBI_STATUS_ECCACT_DEFAULT << 4)
1004 #define EBI_STATUS_TFTPIXEL0EMPTY (0x1UL << 8)
1005 #define _EBI_STATUS_TFTPIXEL0EMPTY_SHIFT 8
1006 #define _EBI_STATUS_TFTPIXEL0EMPTY_MASK 0x100UL
1007 #define _EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT 0x00000000UL
1008 #define EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT (_EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT << 8)
1009 #define EBI_STATUS_TFTPIXEL1EMPTY (0x1UL << 9)
1010 #define _EBI_STATUS_TFTPIXEL1EMPTY_SHIFT 9
1011 #define _EBI_STATUS_TFTPIXEL1EMPTY_MASK 0x200UL
1012 #define _EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT 0x00000000UL
1013 #define EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT (_EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT << 9)
1014 #define EBI_STATUS_TFTPIXELFULL (0x1UL << 10)
1015 #define _EBI_STATUS_TFTPIXELFULL_SHIFT 10
1016 #define _EBI_STATUS_TFTPIXELFULL_MASK 0x400UL
1017 #define _EBI_STATUS_TFTPIXELFULL_DEFAULT 0x00000000UL
1018 #define EBI_STATUS_TFTPIXELFULL_DEFAULT (_EBI_STATUS_TFTPIXELFULL_DEFAULT << 10)
1019 #define EBI_STATUS_DDACT (0x1UL << 12)
1020 #define _EBI_STATUS_DDACT_SHIFT 12
1021 #define _EBI_STATUS_DDACT_MASK 0x1000UL
1022 #define _EBI_STATUS_DDACT_DEFAULT 0x00000000UL
1023 #define EBI_STATUS_DDACT_DEFAULT (_EBI_STATUS_DDACT_DEFAULT << 12)
1024 #define EBI_STATUS_TFTDDEMPTY (0x1UL << 13)
1025 #define _EBI_STATUS_TFTDDEMPTY_SHIFT 13
1026 #define _EBI_STATUS_TFTDDEMPTY_MASK 0x2000UL
1027 #define _EBI_STATUS_TFTDDEMPTY_DEFAULT 0x00000000UL
1028 #define EBI_STATUS_TFTDDEMPTY_DEFAULT (_EBI_STATUS_TFTDDEMPTY_DEFAULT << 13)
1030 /* Bit fields for EBI ECCPARITY */
1031 #define _EBI_ECCPARITY_RESETVALUE 0x00000000UL
1032 #define _EBI_ECCPARITY_MASK 0xFFFFFFFFUL
1033 #define _EBI_ECCPARITY_ECCPARITY_SHIFT 0
1034 #define _EBI_ECCPARITY_ECCPARITY_MASK 0xFFFFFFFFUL
1035 #define _EBI_ECCPARITY_ECCPARITY_DEFAULT 0x00000000UL
1036 #define EBI_ECCPARITY_ECCPARITY_DEFAULT (_EBI_ECCPARITY_ECCPARITY_DEFAULT << 0)
1038 /* Bit fields for EBI TFTCTRL */
1039 #define _EBI_TFTCTRL_RESETVALUE 0x00000000UL
1040 #define _EBI_TFTCTRL_MASK 0x01311F1FUL
1041 #define _EBI_TFTCTRL_DD_SHIFT 0
1042 #define _EBI_TFTCTRL_DD_MASK 0x3UL
1043 #define _EBI_TFTCTRL_DD_DEFAULT 0x00000000UL
1044 #define _EBI_TFTCTRL_DD_DISABLED 0x00000000UL
1045 #define _EBI_TFTCTRL_DD_INTERNAL 0x00000001UL
1046 #define _EBI_TFTCTRL_DD_EXTERNAL 0x00000002UL
1047 #define EBI_TFTCTRL_DD_DEFAULT (_EBI_TFTCTRL_DD_DEFAULT << 0)
1048 #define EBI_TFTCTRL_DD_DISABLED (_EBI_TFTCTRL_DD_DISABLED << 0)
1049 #define EBI_TFTCTRL_DD_INTERNAL (_EBI_TFTCTRL_DD_INTERNAL << 0)
1050 #define EBI_TFTCTRL_DD_EXTERNAL (_EBI_TFTCTRL_DD_EXTERNAL << 0)
1051 #define _EBI_TFTCTRL_MASKBLEND_SHIFT 2
1052 #define _EBI_TFTCTRL_MASKBLEND_MASK 0x1CUL
1053 #define _EBI_TFTCTRL_MASKBLEND_DEFAULT 0x00000000UL
1054 #define _EBI_TFTCTRL_MASKBLEND_DISABLED 0x00000000UL
1055 #define _EBI_TFTCTRL_MASKBLEND_IMASK 0x00000001UL
1056 #define _EBI_TFTCTRL_MASKBLEND_IALPHA 0x00000002UL
1057 #define _EBI_TFTCTRL_MASKBLEND_IMASKIALPHA 0x00000003UL
1058 #define _EBI_TFTCTRL_MASKBLEND_EMASK 0x00000005UL
1059 #define _EBI_TFTCTRL_MASKBLEND_EALPHA 0x00000006UL
1060 #define _EBI_TFTCTRL_MASKBLEND_EMASKEALPHA 0x00000007UL
1061 #define EBI_TFTCTRL_MASKBLEND_DEFAULT (_EBI_TFTCTRL_MASKBLEND_DEFAULT << 2)
1062 #define EBI_TFTCTRL_MASKBLEND_DISABLED (_EBI_TFTCTRL_MASKBLEND_DISABLED << 2)
1063 #define EBI_TFTCTRL_MASKBLEND_IMASK (_EBI_TFTCTRL_MASKBLEND_IMASK << 2)
1064 #define EBI_TFTCTRL_MASKBLEND_IALPHA (_EBI_TFTCTRL_MASKBLEND_IALPHA << 2)
1065 #define EBI_TFTCTRL_MASKBLEND_IMASKIALPHA (_EBI_TFTCTRL_MASKBLEND_IMASKIALPHA << 2)
1066 #define EBI_TFTCTRL_MASKBLEND_EMASK (_EBI_TFTCTRL_MASKBLEND_EMASK << 2)
1067 #define EBI_TFTCTRL_MASKBLEND_EALPHA (_EBI_TFTCTRL_MASKBLEND_EALPHA << 2)
1068 #define EBI_TFTCTRL_MASKBLEND_EMASKEALPHA (_EBI_TFTCTRL_MASKBLEND_EMASKEALPHA << 2)
1069 #define EBI_TFTCTRL_SHIFTDCLKEN (0x1UL << 8)
1070 #define _EBI_TFTCTRL_SHIFTDCLKEN_SHIFT 8
1071 #define _EBI_TFTCTRL_SHIFTDCLKEN_MASK 0x100UL
1072 #define _EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT 0x00000000UL
1073 #define EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT (_EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT << 8)
1074 #define EBI_TFTCTRL_FBCTRIG (0x1UL << 9)
1075 #define _EBI_TFTCTRL_FBCTRIG_SHIFT 9
1076 #define _EBI_TFTCTRL_FBCTRIG_MASK 0x200UL
1077 #define _EBI_TFTCTRL_FBCTRIG_DEFAULT 0x00000000UL
1078 #define _EBI_TFTCTRL_FBCTRIG_VSYNC 0x00000000UL
1079 #define _EBI_TFTCTRL_FBCTRIG_HSYNC 0x00000001UL
1080 #define EBI_TFTCTRL_FBCTRIG_DEFAULT (_EBI_TFTCTRL_FBCTRIG_DEFAULT << 9)
1081 #define EBI_TFTCTRL_FBCTRIG_VSYNC (_EBI_TFTCTRL_FBCTRIG_VSYNC << 9)
1082 #define EBI_TFTCTRL_FBCTRIG_HSYNC (_EBI_TFTCTRL_FBCTRIG_HSYNC << 9)
1083 #define _EBI_TFTCTRL_INTERLEAVE_SHIFT 10
1084 #define _EBI_TFTCTRL_INTERLEAVE_MASK 0xC00UL
1085 #define _EBI_TFTCTRL_INTERLEAVE_DEFAULT 0x00000000UL
1086 #define _EBI_TFTCTRL_INTERLEAVE_UNLIMITED 0x00000000UL
1087 #define _EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK 0x00000001UL
1088 #define _EBI_TFTCTRL_INTERLEAVE_PORCH 0x00000002UL
1089 #define EBI_TFTCTRL_INTERLEAVE_DEFAULT (_EBI_TFTCTRL_INTERLEAVE_DEFAULT << 10)
1090 #define EBI_TFTCTRL_INTERLEAVE_UNLIMITED (_EBI_TFTCTRL_INTERLEAVE_UNLIMITED << 10)
1091 #define EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK (_EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK << 10)
1092 #define EBI_TFTCTRL_INTERLEAVE_PORCH (_EBI_TFTCTRL_INTERLEAVE_PORCH << 10)
1093 #define EBI_TFTCTRL_COLOR1SRC (0x1UL << 12)
1094 #define _EBI_TFTCTRL_COLOR1SRC_SHIFT 12
1095 #define _EBI_TFTCTRL_COLOR1SRC_MASK 0x1000UL
1096 #define _EBI_TFTCTRL_COLOR1SRC_DEFAULT 0x00000000UL
1097 #define _EBI_TFTCTRL_COLOR1SRC_MEM 0x00000000UL
1098 #define _EBI_TFTCTRL_COLOR1SRC_PIXEL1 0x00000001UL
1099 #define EBI_TFTCTRL_COLOR1SRC_DEFAULT (_EBI_TFTCTRL_COLOR1SRC_DEFAULT << 12)
1100 #define EBI_TFTCTRL_COLOR1SRC_MEM (_EBI_TFTCTRL_COLOR1SRC_MEM << 12)
1101 #define EBI_TFTCTRL_COLOR1SRC_PIXEL1 (_EBI_TFTCTRL_COLOR1SRC_PIXEL1 << 12)
1102 #define EBI_TFTCTRL_WIDTH (0x1UL << 16)
1103 #define _EBI_TFTCTRL_WIDTH_SHIFT 16
1104 #define _EBI_TFTCTRL_WIDTH_MASK 0x10000UL
1105 #define _EBI_TFTCTRL_WIDTH_DEFAULT 0x00000000UL
1106 #define _EBI_TFTCTRL_WIDTH_BYTE 0x00000000UL
1107 #define _EBI_TFTCTRL_WIDTH_HALFWORD 0x00000001UL
1108 #define EBI_TFTCTRL_WIDTH_DEFAULT (_EBI_TFTCTRL_WIDTH_DEFAULT << 16)
1109 #define EBI_TFTCTRL_WIDTH_BYTE (_EBI_TFTCTRL_WIDTH_BYTE << 16)
1110 #define EBI_TFTCTRL_WIDTH_HALFWORD (_EBI_TFTCTRL_WIDTH_HALFWORD << 16)
1111 #define _EBI_TFTCTRL_BANKSEL_SHIFT 20
1112 #define _EBI_TFTCTRL_BANKSEL_MASK 0x300000UL
1113 #define _EBI_TFTCTRL_BANKSEL_DEFAULT 0x00000000UL
1114 #define _EBI_TFTCTRL_BANKSEL_BANK0 0x00000000UL
1115 #define _EBI_TFTCTRL_BANKSEL_BANK1 0x00000001UL
1116 #define _EBI_TFTCTRL_BANKSEL_BANK2 0x00000002UL
1117 #define _EBI_TFTCTRL_BANKSEL_BANK3 0x00000003UL
1118 #define EBI_TFTCTRL_BANKSEL_DEFAULT (_EBI_TFTCTRL_BANKSEL_DEFAULT << 20)
1119 #define EBI_TFTCTRL_BANKSEL_BANK0 (_EBI_TFTCTRL_BANKSEL_BANK0 << 20)
1120 #define EBI_TFTCTRL_BANKSEL_BANK1 (_EBI_TFTCTRL_BANKSEL_BANK1 << 20)
1121 #define EBI_TFTCTRL_BANKSEL_BANK2 (_EBI_TFTCTRL_BANKSEL_BANK2 << 20)
1122 #define EBI_TFTCTRL_BANKSEL_BANK3 (_EBI_TFTCTRL_BANKSEL_BANK3 << 20)
1123 #define EBI_TFTCTRL_RGBMODE (0x1UL << 24)
1124 #define _EBI_TFTCTRL_RGBMODE_SHIFT 24
1125 #define _EBI_TFTCTRL_RGBMODE_MASK 0x1000000UL
1126 #define _EBI_TFTCTRL_RGBMODE_DEFAULT 0x00000000UL
1127 #define _EBI_TFTCTRL_RGBMODE_RGB565 0x00000000UL
1128 #define _EBI_TFTCTRL_RGBMODE_RGB555 0x00000001UL
1129 #define EBI_TFTCTRL_RGBMODE_DEFAULT (_EBI_TFTCTRL_RGBMODE_DEFAULT << 24)
1130 #define EBI_TFTCTRL_RGBMODE_RGB565 (_EBI_TFTCTRL_RGBMODE_RGB565 << 24)
1131 #define EBI_TFTCTRL_RGBMODE_RGB555 (_EBI_TFTCTRL_RGBMODE_RGB555 << 24)
1133 /* Bit fields for EBI TFTSTATUS */
1134 #define _EBI_TFTSTATUS_RESETVALUE 0x00000000UL
1135 #define _EBI_TFTSTATUS_MASK 0x07FF07FFUL
1136 #define _EBI_TFTSTATUS_HCNT_SHIFT 0
1137 #define _EBI_TFTSTATUS_HCNT_MASK 0x7FFUL
1138 #define _EBI_TFTSTATUS_HCNT_DEFAULT 0x00000000UL
1139 #define EBI_TFTSTATUS_HCNT_DEFAULT (_EBI_TFTSTATUS_HCNT_DEFAULT << 0)
1140 #define _EBI_TFTSTATUS_VCNT_SHIFT 16
1141 #define _EBI_TFTSTATUS_VCNT_MASK 0x7FF0000UL
1142 #define _EBI_TFTSTATUS_VCNT_DEFAULT 0x00000000UL
1143 #define EBI_TFTSTATUS_VCNT_DEFAULT (_EBI_TFTSTATUS_VCNT_DEFAULT << 16)
1145 /* Bit fields for EBI TFTFRAMEBASE */
1146 #define _EBI_TFTFRAMEBASE_RESETVALUE 0x00000000UL
1147 #define _EBI_TFTFRAMEBASE_MASK 0x0FFFFFFFUL
1148 #define _EBI_TFTFRAMEBASE_FRAMEBASE_SHIFT 0
1149 #define _EBI_TFTFRAMEBASE_FRAMEBASE_MASK 0xFFFFFFFUL
1150 #define _EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT 0x00000000UL
1151 #define EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT (_EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT << 0)
1153 /* Bit fields for EBI TFTSTRIDE */
1154 #define _EBI_TFTSTRIDE_RESETVALUE 0x00000000UL
1155 #define _EBI_TFTSTRIDE_MASK 0x00000FFFUL
1156 #define _EBI_TFTSTRIDE_HSTRIDE_SHIFT 0
1157 #define _EBI_TFTSTRIDE_HSTRIDE_MASK 0xFFFUL
1158 #define _EBI_TFTSTRIDE_HSTRIDE_DEFAULT 0x00000000UL
1159 #define EBI_TFTSTRIDE_HSTRIDE_DEFAULT (_EBI_TFTSTRIDE_HSTRIDE_DEFAULT << 0)
1161 /* Bit fields for EBI TFTSIZE */
1162 #define _EBI_TFTSIZE_RESETVALUE 0x00000000UL
1163 #define _EBI_TFTSIZE_MASK 0x03FF03FFUL
1164 #define _EBI_TFTSIZE_HSZ_SHIFT 0
1165 #define _EBI_TFTSIZE_HSZ_MASK 0x3FFUL
1166 #define _EBI_TFTSIZE_HSZ_DEFAULT 0x00000000UL
1167 #define EBI_TFTSIZE_HSZ_DEFAULT (_EBI_TFTSIZE_HSZ_DEFAULT << 0)
1168 #define _EBI_TFTSIZE_VSZ_SHIFT 16
1169 #define _EBI_TFTSIZE_VSZ_MASK 0x3FF0000UL
1170 #define _EBI_TFTSIZE_VSZ_DEFAULT 0x00000000UL
1171 #define EBI_TFTSIZE_VSZ_DEFAULT (_EBI_TFTSIZE_VSZ_DEFAULT << 16)
1173 /* Bit fields for EBI TFTHPORCH */
1174 #define _EBI_TFTHPORCH_RESETVALUE 0x00000000UL
1175 #define _EBI_TFTHPORCH_MASK 0x33FCFF7FUL
1176 #define _EBI_TFTHPORCH_HSYNC_SHIFT 0
1177 #define _EBI_TFTHPORCH_HSYNC_MASK 0x7FUL
1178 #define _EBI_TFTHPORCH_HSYNC_DEFAULT 0x00000000UL
1179 #define EBI_TFTHPORCH_HSYNC_DEFAULT (_EBI_TFTHPORCH_HSYNC_DEFAULT << 0)
1180 #define _EBI_TFTHPORCH_HFPORCH_SHIFT 8
1181 #define _EBI_TFTHPORCH_HFPORCH_MASK 0xFF00UL
1182 #define _EBI_TFTHPORCH_HFPORCH_DEFAULT 0x00000000UL
1183 #define EBI_TFTHPORCH_HFPORCH_DEFAULT (_EBI_TFTHPORCH_HFPORCH_DEFAULT << 8)
1184 #define _EBI_TFTHPORCH_HBPORCH_SHIFT 18
1185 #define _EBI_TFTHPORCH_HBPORCH_MASK 0x3FC0000UL
1186 #define _EBI_TFTHPORCH_HBPORCH_DEFAULT 0x00000000UL
1187 #define EBI_TFTHPORCH_HBPORCH_DEFAULT (_EBI_TFTHPORCH_HBPORCH_DEFAULT << 18)
1188 #define _EBI_TFTHPORCH_HSYNCSTART_SHIFT 28
1189 #define _EBI_TFTHPORCH_HSYNCSTART_MASK 0x30000000UL
1190 #define _EBI_TFTHPORCH_HSYNCSTART_DEFAULT 0x00000000UL
1191 #define EBI_TFTHPORCH_HSYNCSTART_DEFAULT (_EBI_TFTHPORCH_HSYNCSTART_DEFAULT << 28)
1193 /* Bit fields for EBI TFTVPORCH */
1194 #define _EBI_TFTVPORCH_RESETVALUE 0x00000000UL
1195 #define _EBI_TFTVPORCH_MASK 0x03FCFF7FUL
1196 #define _EBI_TFTVPORCH_VSYNC_SHIFT 0
1197 #define _EBI_TFTVPORCH_VSYNC_MASK 0x7FUL
1198 #define _EBI_TFTVPORCH_VSYNC_DEFAULT 0x00000000UL
1199 #define EBI_TFTVPORCH_VSYNC_DEFAULT (_EBI_TFTVPORCH_VSYNC_DEFAULT << 0)
1200 #define _EBI_TFTVPORCH_VFPORCH_SHIFT 8
1201 #define _EBI_TFTVPORCH_VFPORCH_MASK 0xFF00UL
1202 #define _EBI_TFTVPORCH_VFPORCH_DEFAULT 0x00000000UL
1203 #define EBI_TFTVPORCH_VFPORCH_DEFAULT (_EBI_TFTVPORCH_VFPORCH_DEFAULT << 8)
1204 #define _EBI_TFTVPORCH_VBPORCH_SHIFT 18
1205 #define _EBI_TFTVPORCH_VBPORCH_MASK 0x3FC0000UL
1206 #define _EBI_TFTVPORCH_VBPORCH_DEFAULT 0x00000000UL
1207 #define EBI_TFTVPORCH_VBPORCH_DEFAULT (_EBI_TFTVPORCH_VBPORCH_DEFAULT << 18)
1209 /* Bit fields for EBI TFTTIMING */
1210 #define _EBI_TFTTIMING_RESETVALUE 0x00000000UL
1211 #define _EBI_TFTTIMING_MASK 0x337FF7FFUL
1212 #define _EBI_TFTTIMING_DCLKPERIOD_SHIFT 0
1213 #define _EBI_TFTTIMING_DCLKPERIOD_MASK 0x7FFUL
1214 #define _EBI_TFTTIMING_DCLKPERIOD_DEFAULT 0x00000000UL
1215 #define EBI_TFTTIMING_DCLKPERIOD_DEFAULT (_EBI_TFTTIMING_DCLKPERIOD_DEFAULT << 0)
1216 #define _EBI_TFTTIMING_TFTSTART_SHIFT 12
1217 #define _EBI_TFTTIMING_TFTSTART_MASK 0x7FF000UL
1218 #define _EBI_TFTTIMING_TFTSTART_DEFAULT 0x00000000UL
1219 #define EBI_TFTTIMING_TFTSTART_DEFAULT (_EBI_TFTTIMING_TFTSTART_DEFAULT << 12)
1220 #define _EBI_TFTTIMING_TFTSETUP_SHIFT 24
1221 #define _EBI_TFTTIMING_TFTSETUP_MASK 0x3000000UL
1222 #define _EBI_TFTTIMING_TFTSETUP_DEFAULT 0x00000000UL
1223 #define EBI_TFTTIMING_TFTSETUP_DEFAULT (_EBI_TFTTIMING_TFTSETUP_DEFAULT << 24)
1224 #define _EBI_TFTTIMING_TFTHOLD_SHIFT 28
1225 #define _EBI_TFTTIMING_TFTHOLD_MASK 0x30000000UL
1226 #define _EBI_TFTTIMING_TFTHOLD_DEFAULT 0x00000000UL
1227 #define EBI_TFTTIMING_TFTHOLD_DEFAULT (_EBI_TFTTIMING_TFTHOLD_DEFAULT << 28)
1229 /* Bit fields for EBI TFTPOLARITY */
1230 #define _EBI_TFTPOLARITY_RESETVALUE 0x00000000UL
1231 #define _EBI_TFTPOLARITY_MASK 0x0000001FUL
1232 #define EBI_TFTPOLARITY_CSPOL (0x1UL << 0)
1233 #define _EBI_TFTPOLARITY_CSPOL_SHIFT 0
1234 #define _EBI_TFTPOLARITY_CSPOL_MASK 0x1UL
1235 #define _EBI_TFTPOLARITY_CSPOL_DEFAULT 0x00000000UL
1236 #define _EBI_TFTPOLARITY_CSPOL_ACTIVELOW 0x00000000UL
1237 #define _EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH 0x00000001UL
1238 #define EBI_TFTPOLARITY_CSPOL_DEFAULT (_EBI_TFTPOLARITY_CSPOL_DEFAULT << 0)
1239 #define EBI_TFTPOLARITY_CSPOL_ACTIVELOW (_EBI_TFTPOLARITY_CSPOL_ACTIVELOW << 0)
1240 #define EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH << 0)
1241 #define EBI_TFTPOLARITY_DCLKPOL (0x1UL << 1)
1242 #define _EBI_TFTPOLARITY_DCLKPOL_SHIFT 1
1243 #define _EBI_TFTPOLARITY_DCLKPOL_MASK 0x2UL
1244 #define _EBI_TFTPOLARITY_DCLKPOL_DEFAULT 0x00000000UL
1245 #define _EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING 0x00000000UL
1246 #define _EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING 0x00000001UL
1247 #define EBI_TFTPOLARITY_DCLKPOL_DEFAULT (_EBI_TFTPOLARITY_DCLKPOL_DEFAULT << 1)
1248 #define EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING (_EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING << 1)
1249 #define EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING (_EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING << 1)
1250 #define EBI_TFTPOLARITY_DATAENPOL (0x1UL << 2)
1251 #define _EBI_TFTPOLARITY_DATAENPOL_SHIFT 2
1252 #define _EBI_TFTPOLARITY_DATAENPOL_MASK 0x4UL
1253 #define _EBI_TFTPOLARITY_DATAENPOL_DEFAULT 0x00000000UL
1254 #define _EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW 0x00000000UL
1255 #define _EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH 0x00000001UL
1256 #define EBI_TFTPOLARITY_DATAENPOL_DEFAULT (_EBI_TFTPOLARITY_DATAENPOL_DEFAULT << 2)
1257 #define EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW (_EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW << 2)
1258 #define EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH << 2)
1259 #define EBI_TFTPOLARITY_HSYNCPOL (0x1UL << 3)
1260 #define _EBI_TFTPOLARITY_HSYNCPOL_SHIFT 3
1261 #define _EBI_TFTPOLARITY_HSYNCPOL_MASK 0x8UL
1262 #define _EBI_TFTPOLARITY_HSYNCPOL_DEFAULT 0x00000000UL
1263 #define _EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW 0x00000000UL
1264 #define _EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH 0x00000001UL
1265 #define EBI_TFTPOLARITY_HSYNCPOL_DEFAULT (_EBI_TFTPOLARITY_HSYNCPOL_DEFAULT << 3)
1266 #define EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW (_EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW << 3)
1267 #define EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH << 3)
1268 #define EBI_TFTPOLARITY_VSYNCPOL (0x1UL << 4)
1269 #define _EBI_TFTPOLARITY_VSYNCPOL_SHIFT 4
1270 #define _EBI_TFTPOLARITY_VSYNCPOL_MASK 0x10UL
1271 #define _EBI_TFTPOLARITY_VSYNCPOL_DEFAULT 0x00000000UL
1272 #define _EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW 0x00000000UL
1273 #define _EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH 0x00000001UL
1274 #define EBI_TFTPOLARITY_VSYNCPOL_DEFAULT (_EBI_TFTPOLARITY_VSYNCPOL_DEFAULT << 4)
1275 #define EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW (_EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW << 4)
1276 #define EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH << 4)
1278 /* Bit fields for EBI TFTDD */
1279 #define _EBI_TFTDD_RESETVALUE 0x00000000UL
1280 #define _EBI_TFTDD_MASK 0x0000FFFFUL
1281 #define _EBI_TFTDD_DATA_SHIFT 0
1282 #define _EBI_TFTDD_DATA_MASK 0xFFFFUL
1283 #define _EBI_TFTDD_DATA_DEFAULT 0x00000000UL
1284 #define EBI_TFTDD_DATA_DEFAULT (_EBI_TFTDD_DATA_DEFAULT << 0)
1286 /* Bit fields for EBI TFTALPHA */
1287 #define _EBI_TFTALPHA_RESETVALUE 0x00000000UL
1288 #define _EBI_TFTALPHA_MASK 0x000001FFUL
1289 #define _EBI_TFTALPHA_ALPHA_SHIFT 0
1290 #define _EBI_TFTALPHA_ALPHA_MASK 0x1FFUL
1291 #define _EBI_TFTALPHA_ALPHA_DEFAULT 0x00000000UL
1292 #define EBI_TFTALPHA_ALPHA_DEFAULT (_EBI_TFTALPHA_ALPHA_DEFAULT << 0)
1294 /* Bit fields for EBI TFTPIXEL0 */
1295 #define _EBI_TFTPIXEL0_RESETVALUE 0x00000000UL
1296 #define _EBI_TFTPIXEL0_MASK 0x0000FFFFUL
1297 #define _EBI_TFTPIXEL0_DATA_SHIFT 0
1298 #define _EBI_TFTPIXEL0_DATA_MASK 0xFFFFUL
1299 #define _EBI_TFTPIXEL0_DATA_DEFAULT 0x00000000UL
1300 #define EBI_TFTPIXEL0_DATA_DEFAULT (_EBI_TFTPIXEL0_DATA_DEFAULT << 0)
1302 /* Bit fields for EBI TFTPIXEL1 */
1303 #define _EBI_TFTPIXEL1_RESETVALUE 0x00000000UL
1304 #define _EBI_TFTPIXEL1_MASK 0x0000FFFFUL
1305 #define _EBI_TFTPIXEL1_DATA_SHIFT 0
1306 #define _EBI_TFTPIXEL1_DATA_MASK 0xFFFFUL
1307 #define _EBI_TFTPIXEL1_DATA_DEFAULT 0x00000000UL
1308 #define EBI_TFTPIXEL1_DATA_DEFAULT (_EBI_TFTPIXEL1_DATA_DEFAULT << 0)
1310 /* Bit fields for EBI TFTPIXEL */
1311 #define _EBI_TFTPIXEL_RESETVALUE 0x00000000UL
1312 #define _EBI_TFTPIXEL_MASK 0x0000FFFFUL
1313 #define _EBI_TFTPIXEL_DATA_SHIFT 0
1314 #define _EBI_TFTPIXEL_DATA_MASK 0xFFFFUL
1315 #define _EBI_TFTPIXEL_DATA_DEFAULT 0x00000000UL
1316 #define EBI_TFTPIXEL_DATA_DEFAULT (_EBI_TFTPIXEL_DATA_DEFAULT << 0)
1318 /* Bit fields for EBI TFTMASK */
1319 #define _EBI_TFTMASK_RESETVALUE 0x00000000UL
1320 #define _EBI_TFTMASK_MASK 0x0000FFFFUL
1321 #define _EBI_TFTMASK_TFTMASK_SHIFT 0
1322 #define _EBI_TFTMASK_TFTMASK_MASK 0xFFFFUL
1323 #define _EBI_TFTMASK_TFTMASK_DEFAULT 0x00000000UL
1324 #define EBI_TFTMASK_TFTMASK_DEFAULT (_EBI_TFTMASK_TFTMASK_DEFAULT << 0)
1326 /* Bit fields for EBI IF */
1327 #define _EBI_IF_RESETVALUE 0x00000000UL
1328 #define _EBI_IF_MASK 0x0000003FUL
1329 #define EBI_IF_VSYNC (0x1UL << 0)
1330 #define _EBI_IF_VSYNC_SHIFT 0
1331 #define _EBI_IF_VSYNC_MASK 0x1UL
1332 #define _EBI_IF_VSYNC_DEFAULT 0x00000000UL
1333 #define EBI_IF_VSYNC_DEFAULT (_EBI_IF_VSYNC_DEFAULT << 0)
1334 #define EBI_IF_HSYNC (0x1UL << 1)
1335 #define _EBI_IF_HSYNC_SHIFT 1
1336 #define _EBI_IF_HSYNC_MASK 0x2UL
1337 #define _EBI_IF_HSYNC_DEFAULT 0x00000000UL
1338 #define EBI_IF_HSYNC_DEFAULT (_EBI_IF_HSYNC_DEFAULT << 1)
1339 #define EBI_IF_VBPORCH (0x1UL << 2)
1340 #define _EBI_IF_VBPORCH_SHIFT 2
1341 #define _EBI_IF_VBPORCH_MASK 0x4UL
1342 #define _EBI_IF_VBPORCH_DEFAULT 0x00000000UL
1343 #define EBI_IF_VBPORCH_DEFAULT (_EBI_IF_VBPORCH_DEFAULT << 2)
1344 #define EBI_IF_VFPORCH (0x1UL << 3)
1345 #define _EBI_IF_VFPORCH_SHIFT 3
1346 #define _EBI_IF_VFPORCH_MASK 0x8UL
1347 #define _EBI_IF_VFPORCH_DEFAULT 0x00000000UL
1348 #define EBI_IF_VFPORCH_DEFAULT (_EBI_IF_VFPORCH_DEFAULT << 3)
1349 #define EBI_IF_DDEMPTY (0x1UL << 4)
1350 #define _EBI_IF_DDEMPTY_SHIFT 4
1351 #define _EBI_IF_DDEMPTY_MASK 0x10UL
1352 #define _EBI_IF_DDEMPTY_DEFAULT 0x00000000UL
1353 #define EBI_IF_DDEMPTY_DEFAULT (_EBI_IF_DDEMPTY_DEFAULT << 4)
1354 #define EBI_IF_DDJIT (0x1UL << 5)
1355 #define _EBI_IF_DDJIT_SHIFT 5
1356 #define _EBI_IF_DDJIT_MASK 0x20UL
1357 #define _EBI_IF_DDJIT_DEFAULT 0x00000000UL
1358 #define EBI_IF_DDJIT_DEFAULT (_EBI_IF_DDJIT_DEFAULT << 5)
1360 /* Bit fields for EBI IFS */
1361 #define _EBI_IFS_RESETVALUE 0x00000000UL
1362 #define _EBI_IFS_MASK 0x0000003FUL
1363 #define EBI_IFS_VSYNC (0x1UL << 0)
1364 #define _EBI_IFS_VSYNC_SHIFT 0
1365 #define _EBI_IFS_VSYNC_MASK 0x1UL
1366 #define _EBI_IFS_VSYNC_DEFAULT 0x00000000UL
1367 #define EBI_IFS_VSYNC_DEFAULT (_EBI_IFS_VSYNC_DEFAULT << 0)
1368 #define EBI_IFS_HSYNC (0x1UL << 1)
1369 #define _EBI_IFS_HSYNC_SHIFT 1
1370 #define _EBI_IFS_HSYNC_MASK 0x2UL
1371 #define _EBI_IFS_HSYNC_DEFAULT 0x00000000UL
1372 #define EBI_IFS_HSYNC_DEFAULT (_EBI_IFS_HSYNC_DEFAULT << 1)
1373 #define EBI_IFS_VBPORCH (0x1UL << 2)
1374 #define _EBI_IFS_VBPORCH_SHIFT 2
1375 #define _EBI_IFS_VBPORCH_MASK 0x4UL
1376 #define _EBI_IFS_VBPORCH_DEFAULT 0x00000000UL
1377 #define EBI_IFS_VBPORCH_DEFAULT (_EBI_IFS_VBPORCH_DEFAULT << 2)
1378 #define EBI_IFS_VFPORCH (0x1UL << 3)
1379 #define _EBI_IFS_VFPORCH_SHIFT 3
1380 #define _EBI_IFS_VFPORCH_MASK 0x8UL
1381 #define _EBI_IFS_VFPORCH_DEFAULT 0x00000000UL
1382 #define EBI_IFS_VFPORCH_DEFAULT (_EBI_IFS_VFPORCH_DEFAULT << 3)
1383 #define EBI_IFS_DDEMPTY (0x1UL << 4)
1384 #define _EBI_IFS_DDEMPTY_SHIFT 4
1385 #define _EBI_IFS_DDEMPTY_MASK 0x10UL
1386 #define _EBI_IFS_DDEMPTY_DEFAULT 0x00000000UL
1387 #define EBI_IFS_DDEMPTY_DEFAULT (_EBI_IFS_DDEMPTY_DEFAULT << 4)
1388 #define EBI_IFS_DDJIT (0x1UL << 5)
1389 #define _EBI_IFS_DDJIT_SHIFT 5
1390 #define _EBI_IFS_DDJIT_MASK 0x20UL
1391 #define _EBI_IFS_DDJIT_DEFAULT 0x00000000UL
1392 #define EBI_IFS_DDJIT_DEFAULT (_EBI_IFS_DDJIT_DEFAULT << 5)
1394 /* Bit fields for EBI IFC */
1395 #define _EBI_IFC_RESETVALUE 0x00000000UL
1396 #define _EBI_IFC_MASK 0x0000003FUL
1397 #define EBI_IFC_VSYNC (0x1UL << 0)
1398 #define _EBI_IFC_VSYNC_SHIFT 0
1399 #define _EBI_IFC_VSYNC_MASK 0x1UL
1400 #define _EBI_IFC_VSYNC_DEFAULT 0x00000000UL
1401 #define EBI_IFC_VSYNC_DEFAULT (_EBI_IFC_VSYNC_DEFAULT << 0)
1402 #define EBI_IFC_HSYNC (0x1UL << 1)
1403 #define _EBI_IFC_HSYNC_SHIFT 1
1404 #define _EBI_IFC_HSYNC_MASK 0x2UL
1405 #define _EBI_IFC_HSYNC_DEFAULT 0x00000000UL
1406 #define EBI_IFC_HSYNC_DEFAULT (_EBI_IFC_HSYNC_DEFAULT << 1)
1407 #define EBI_IFC_VBPORCH (0x1UL << 2)
1408 #define _EBI_IFC_VBPORCH_SHIFT 2
1409 #define _EBI_IFC_VBPORCH_MASK 0x4UL
1410 #define _EBI_IFC_VBPORCH_DEFAULT 0x00000000UL
1411 #define EBI_IFC_VBPORCH_DEFAULT (_EBI_IFC_VBPORCH_DEFAULT << 2)
1412 #define EBI_IFC_VFPORCH (0x1UL << 3)
1413 #define _EBI_IFC_VFPORCH_SHIFT 3
1414 #define _EBI_IFC_VFPORCH_MASK 0x8UL
1415 #define _EBI_IFC_VFPORCH_DEFAULT 0x00000000UL
1416 #define EBI_IFC_VFPORCH_DEFAULT (_EBI_IFC_VFPORCH_DEFAULT << 3)
1417 #define EBI_IFC_DDEMPTY (0x1UL << 4)
1418 #define _EBI_IFC_DDEMPTY_SHIFT 4
1419 #define _EBI_IFC_DDEMPTY_MASK 0x10UL
1420 #define _EBI_IFC_DDEMPTY_DEFAULT 0x00000000UL
1421 #define EBI_IFC_DDEMPTY_DEFAULT (_EBI_IFC_DDEMPTY_DEFAULT << 4)
1422 #define EBI_IFC_DDJIT (0x1UL << 5)
1423 #define _EBI_IFC_DDJIT_SHIFT 5
1424 #define _EBI_IFC_DDJIT_MASK 0x20UL
1425 #define _EBI_IFC_DDJIT_DEFAULT 0x00000000UL
1426 #define EBI_IFC_DDJIT_DEFAULT (_EBI_IFC_DDJIT_DEFAULT << 5)
1428 /* Bit fields for EBI IEN */
1429 #define _EBI_IEN_RESETVALUE 0x00000000UL
1430 #define _EBI_IEN_MASK 0x0000003FUL
1431 #define EBI_IEN_VSYNC (0x1UL << 0)
1432 #define _EBI_IEN_VSYNC_SHIFT 0
1433 #define _EBI_IEN_VSYNC_MASK 0x1UL
1434 #define _EBI_IEN_VSYNC_DEFAULT 0x00000000UL
1435 #define EBI_IEN_VSYNC_DEFAULT (_EBI_IEN_VSYNC_DEFAULT << 0)
1436 #define EBI_IEN_HSYNC (0x1UL << 1)
1437 #define _EBI_IEN_HSYNC_SHIFT 1
1438 #define _EBI_IEN_HSYNC_MASK 0x2UL
1439 #define _EBI_IEN_HSYNC_DEFAULT 0x00000000UL
1440 #define EBI_IEN_HSYNC_DEFAULT (_EBI_IEN_HSYNC_DEFAULT << 1)
1441 #define EBI_IEN_VBPORCH (0x1UL << 2)
1442 #define _EBI_IEN_VBPORCH_SHIFT 2
1443 #define _EBI_IEN_VBPORCH_MASK 0x4UL
1444 #define _EBI_IEN_VBPORCH_DEFAULT 0x00000000UL
1445 #define EBI_IEN_VBPORCH_DEFAULT (_EBI_IEN_VBPORCH_DEFAULT << 2)
1446 #define EBI_IEN_VFPORCH (0x1UL << 3)
1447 #define _EBI_IEN_VFPORCH_SHIFT 3
1448 #define _EBI_IEN_VFPORCH_MASK 0x8UL
1449 #define _EBI_IEN_VFPORCH_DEFAULT 0x00000000UL
1450 #define EBI_IEN_VFPORCH_DEFAULT (_EBI_IEN_VFPORCH_DEFAULT << 3)
1451 #define EBI_IEN_DDEMPTY (0x1UL << 4)
1452 #define _EBI_IEN_DDEMPTY_SHIFT 4
1453 #define _EBI_IEN_DDEMPTY_MASK 0x10UL
1454 #define _EBI_IEN_DDEMPTY_DEFAULT 0x00000000UL
1455 #define EBI_IEN_DDEMPTY_DEFAULT (_EBI_IEN_DDEMPTY_DEFAULT << 4)
1456 #define EBI_IEN_DDJIT (0x1UL << 5)
1457 #define _EBI_IEN_DDJIT_SHIFT 5
1458 #define _EBI_IEN_DDJIT_MASK 0x20UL
1459 #define _EBI_IEN_DDJIT_DEFAULT 0x00000000UL
1460 #define EBI_IEN_DDJIT_DEFAULT (_EBI_IEN_DDJIT_DEFAULT << 5)
__IOM uint32_t POLARITY1
Definition: efm32gg_ebi.h:52
__IOM uint32_t WRTIMING1
Definition: efm32gg_ebi.h:51
__IOM uint32_t TFTSTRIDE
Definition: efm32gg_ebi.h:69
__IOM uint32_t POLARITY
Definition: efm32gg_ebi.h:47
__IOM uint32_t TFTTIMING
Definition: efm32gg_ebi.h:73
__IM uint32_t ECCPARITY
Definition: efm32gg_ebi.h:65
__IOM uint32_t TFTDD
Definition: efm32gg_ebi.h:75
__IOM uint32_t POLARITY3
Definition: efm32gg_ebi.h:60
__IOM uint32_t TFTPIXEL0
Definition: efm32gg_ebi.h:77
__IOM uint32_t IEN
Definition: efm32gg_ebi.h:84
__IOM uint32_t WRTIMING
Definition: efm32gg_ebi.h:46
__IOM uint32_t NANDCTRL
Definition: efm32gg_ebi.h:62
__IOM uint32_t RDTIMING2
Definition: efm32gg_ebi.h:54
__IM uint32_t STATUS
Definition: efm32gg_ebi.h:64
__IOM uint32_t PAGECTRL
Definition: efm32gg_ebi.h:61
__IOM uint32_t TFTPOLARITY
Definition: efm32gg_ebi.h:74
__IOM uint32_t ADDRTIMING1
Definition: efm32gg_ebi.h:49
__IOM uint32_t TFTCTRL
Definition: efm32gg_ebi.h:66
__IOM uint32_t TFTSIZE
Definition: efm32gg_ebi.h:70
__IM uint32_t TFTSTATUS
Definition: efm32gg_ebi.h:67
__IOM uint32_t TFTVPORCH
Definition: efm32gg_ebi.h:72
__IOM uint32_t POLARITY2
Definition: efm32gg_ebi.h:56
__IOM uint32_t ADDRTIMING2
Definition: efm32gg_ebi.h:53
__IOM uint32_t RDTIMING3
Definition: efm32gg_ebi.h:58
__IOM uint32_t CTRL
Definition: efm32gg_ebi.h:43
__IOM uint32_t TFTMASK
Definition: efm32gg_ebi.h:80
__IOM uint32_t TFTPIXEL1
Definition: efm32gg_ebi.h:78
__IOM uint32_t RDTIMING1
Definition: efm32gg_ebi.h:50
__IOM uint32_t ADDRTIMING3
Definition: efm32gg_ebi.h:57
__IOM uint32_t WRTIMING3
Definition: efm32gg_ebi.h:59
__IM uint32_t TFTPIXEL
Definition: efm32gg_ebi.h:79
__IOM uint32_t WRTIMING2
Definition: efm32gg_ebi.h:55
__IOM uint32_t RDTIMING
Definition: efm32gg_ebi.h:45
__IOM uint32_t TFTHPORCH
Definition: efm32gg_ebi.h:71
__IOM uint32_t ROUTE
Definition: efm32gg_ebi.h:48
__IM uint32_t IF
Definition: efm32gg_ebi.h:81
__IOM uint32_t TFTFRAMEBASE
Definition: efm32gg_ebi.h:68
__IOM uint32_t CMD
Definition: efm32gg_ebi.h:63
__IOM uint32_t TFTALPHA
Definition: efm32gg_ebi.h:76
__IOM uint32_t ADDRTIMING
Definition: efm32gg_ebi.h:44
__IOM uint32_t IFC
Definition: efm32gg_ebi.h:83
__IOM uint32_t IFS
Definition: efm32gg_ebi.h:82