em_vdac.h

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/***************************************************************************/
#ifndef EM_VDAC_H
#define EM_VDAC_H

#include "em_device.h"

#if defined(VDAC_COUNT) && (VDAC_COUNT > 0)

#include "em_assert.h"
#include <stdbool.h>

#ifdef __cplusplus
extern "C" {
#endif


/***************************************************************************/
/***************************************************************************/
#define VDAC_REF_VALID(ref)   ((ref) == VDAC0)

/*******************************************************************************
 ********************************   ENUMS   ************************************
 ******************************************************************************/

typedef enum
{
  vdacRefresh8  = _VDAC_CTRL_REFRESHPERIOD_8CYCLES,  
  vdacRefresh16 = _VDAC_CTRL_REFRESHPERIOD_16CYCLES, 
  vdacRefresh32 = _VDAC_CTRL_REFRESHPERIOD_32CYCLES, 
  vdacRefresh64 = _VDAC_CTRL_REFRESHPERIOD_64CYCLES, 
} VDAC_Refresh_TypeDef;

typedef enum
{
  vdacRef1V25Ln = _VDAC_CTRL_REFSEL_1V25LN, 
  vdacRef2V5Ln  = _VDAC_CTRL_REFSEL_2V5LN,  
  vdacRef1V25   = _VDAC_CTRL_REFSEL_1V25,   
  vdacRef2V5    = _VDAC_CTRL_REFSEL_2V5,    
  vdacRefAvdd   = _VDAC_CTRL_REFSEL_VDD,    
  vdacRefExtPin = _VDAC_CTRL_REFSEL_EXT,    
} VDAC_Ref_TypeDef;

typedef enum
{
  vdacPrsSelCh0 =  _VDAC_CH0CTRL_PRSSEL_PRSCH0 , 
  vdacPrsSelCh1 =  _VDAC_CH0CTRL_PRSSEL_PRSCH1 , 
  vdacPrsSelCh2 =  _VDAC_CH0CTRL_PRSSEL_PRSCH2 , 
  vdacPrsSelCh3 =  _VDAC_CH0CTRL_PRSSEL_PRSCH3 , 
  vdacPrsSelCh4 =  _VDAC_CH0CTRL_PRSSEL_PRSCH4 , 
  vdacPrsSelCh5 =  _VDAC_CH0CTRL_PRSSEL_PRSCH5 , 
  vdacPrsSelCh6 =  _VDAC_CH0CTRL_PRSSEL_PRSCH6 , 
  vdacPrsSelCh7 =  _VDAC_CH0CTRL_PRSSEL_PRSCH7 , 
  vdacPrsSelCh8 =  _VDAC_CH0CTRL_PRSSEL_PRSCH8 , 
  vdacPrsSelCh9 =  _VDAC_CH0CTRL_PRSSEL_PRSCH9 , 
  vdacPrsSelCh10 = _VDAC_CH0CTRL_PRSSEL_PRSCH10, 
  vdacPrsSelCh11 = _VDAC_CH0CTRL_PRSSEL_PRSCH11, 
} VDAC_PrsSel_TypeDef;

typedef enum
{
  vdacTrigModeSw        = _VDAC_CH0CTRL_TRIGMODE_SW,        
  vdacTrigModePrs       = _VDAC_CH0CTRL_TRIGMODE_PRS,       
  vdacTrigModeRefresh   = _VDAC_CH0CTRL_TRIGMODE_REFRESH,   
  vdacTrigModeSwPrs     = _VDAC_CH0CTRL_TRIGMODE_SWPRS,     
  vdacTrigModeSwRefresh = _VDAC_CH0CTRL_TRIGMODE_SWREFRESH, 
  vdacTrigModeLesense   = _VDAC_CH0CTRL_TRIGMODE_LESENSE,   
} VDAC_TrigMode_TypeDef;

/*******************************************************************************
 *******************************   STRUCTS   ***********************************
 ******************************************************************************/

typedef struct
{
  bool                  mainCalibration;

  bool                  asyncClockMode;

  bool                  warmupKeepOn;

  VDAC_Refresh_TypeDef  refresh;

  uint32_t              prescaler;

  VDAC_Ref_TypeDef      reference;

  bool                 ch0ResetPre;

  bool                 outEnablePRS;

  bool                 sineEnable;

  bool                 diff;
} VDAC_Init_TypeDef;

#define VDAC_INIT_DEFAULT                                                 \
{                                                                         \
  true,                   /* Use main output path calibration values. */  \
  false,                  /* Use synchronous clock mode. */               \
  false,                  /* Turn off between sample off conversions.*/   \
  vdacRefresh8,           /* Refresh every 8th cycle. */                  \
  0,                      /* No prescaling. */                            \
  vdacRef1V25Ln,          /* 1.25V internal low noise reference. */       \
  false,                  /* Do not reset prescaler on CH 0 start. */     \
  false,                  /* VDAC output enable always on. */             \
  false,                  /* Disable sine mode. */                        \
  false                   /* Single ended mode. */                        \
}

typedef struct
{
  bool                  enable;

  VDAC_PrsSel_TypeDef   prsSel;

  bool                  prsAsync;

  VDAC_TrigMode_TypeDef trigMode;

  bool                  sampleOffMode;
} VDAC_InitChannel_TypeDef;

#define VDAC_INITCHANNEL_DEFAULT                                              \
{                                                                             \
  false,              /* Leave channel disabled when init done. */            \
  vdacPrsSelCh0,      /* PRS CH 0 triggers conversion. */                     \
  false,              /* Treat PRS channel as a synchronous signal. */        \
  vdacTrigModeSw,     /* Conversion trigged by CH0DATA or COMBDATA write. */  \
  false,              /* Channel conversion set to continous. */              \
}

/*******************************************************************************
 *****************************   PROTOTYPES   **********************************
 ******************************************************************************/

void VDAC_ChannelOutputSet(VDAC_TypeDef *vdac,
                           unsigned int channel,
                           uint32_t     value);
void VDAC_Enable(VDAC_TypeDef *vdac, unsigned int ch, bool enable);
void VDAC_Init(VDAC_TypeDef *vdac, const VDAC_Init_TypeDef *init);
void VDAC_InitChannel(VDAC_TypeDef *vdac,
                      const VDAC_InitChannel_TypeDef *init,
                      unsigned int ch);

/***************************************************************************/
__STATIC_INLINE void VDAC_Channel0OutputSet(VDAC_TypeDef *vdac,
                                            uint32_t value)
{
  EFM_ASSERT(value<=_VDAC_CH0DATA_MASK);
  vdac->CH0DATA = value;
}

/***************************************************************************/
__STATIC_INLINE void VDAC_Channel1OutputSet(VDAC_TypeDef *vdac,
                                            uint32_t value)
{
  EFM_ASSERT(value<=_VDAC_CH1DATA_MASK);
  vdac->CH1DATA = value;
}

/***************************************************************************/
__STATIC_INLINE void VDAC_IntClear(VDAC_TypeDef *vdac, uint32_t flags)
{
  vdac->IFC = flags;
}

/***************************************************************************/
__STATIC_INLINE void VDAC_IntDisable(VDAC_TypeDef *vdac, uint32_t flags)
{
  vdac->IEN &= ~flags;
}

/***************************************************************************/
__STATIC_INLINE void VDAC_IntEnable(VDAC_TypeDef *vdac, uint32_t flags)
{
  vdac->IEN |= flags;
}

/***************************************************************************/
__STATIC_INLINE uint32_t VDAC_IntGet(VDAC_TypeDef *vdac)
{
  return vdac->IF;
}

/***************************************************************************/
__STATIC_INLINE uint32_t VDAC_IntGetEnabled(VDAC_TypeDef *vdac)
{
  uint32_t ien = vdac->IEN;

  /* Bitwise AND of pending and enabled interrupts */
  return vdac->IF & ien;
}

/***************************************************************************/
__STATIC_INLINE void VDAC_IntSet(VDAC_TypeDef *vdac, uint32_t flags)
{
  vdac->IFS = flags;
}

uint32_t VDAC_PrescaleCalc(uint32_t vdacFreq, bool syncMode, uint32_t hfperFreq);
void VDAC_Reset(VDAC_TypeDef *vdac);

#ifdef __cplusplus
}
#endif

#endif /* defined(VDAC_COUNT) && (VDAC_COUNT > 0) */
#endif /* EM_VDAC_H */