37 #if defined(BURTC_PRESENT)
62 #define burtcClkDiv_1 1
63 #define burtcClkDiv_2 2
64 #define burtcClkDiv_4 4
65 #define burtcClkDiv_8 8
66 #define burtcClkDiv_16 16
67 #define burtcClkDiv_32 32
68 #define burtcClkDiv_64 64
69 #define burtcClkDiv_128 128
79 burtcClkSelULFRCO = BURTC_CTRL_CLKSEL_ULFRCO,
81 burtcClkSelLFRCO = BURTC_CTRL_CLKSEL_LFRCO,
83 burtcClkSelLFXO = BURTC_CTRL_CLKSEL_LFXO
84 } BURTC_ClkSel_TypeDef;
91 burtcModeDisable = BURTC_CTRL_MODE_DISABLE,
93 burtcModeEM2 = BURTC_CTRL_MODE_EM2EN,
95 burtcModeEM3 = BURTC_CTRL_MODE_EM3EN,
97 burtcModeEM4 = BURTC_CTRL_MODE_EM4EN,
104 burtcLPDisable = BURTC_LPMODE_LPMODE_DISABLE,
106 burtcLPEnable = BURTC_LPMODE_LPMODE_ENABLE,
108 burtcLPBU = BURTC_LPMODE_LPMODE_BUEN
120 BURTC_Mode_TypeDef mode;
122 BURTC_ClkSel_TypeDef clkSel;
125 uint32_t lowPowerComp;
130 BURTC_LP_TypeDef lowPowerMode;
131 } BURTC_Init_TypeDef;
134 #define BURTC_INIT_DEFAULT \
160 __STATIC_INLINE
void BURTC_IntClear(uint32_t flags)
175 __STATIC_INLINE
void BURTC_IntDisable(uint32_t flags)
177 BURTC->IEN &= ~(flags);
195 __STATIC_INLINE
void BURTC_IntEnable(uint32_t flags)
212 __STATIC_INLINE uint32_t BURTC_IntGet(
void)
230 __STATIC_INLINE uint32_t BURTC_IntGetEnabled(
void)
238 return BURTC->IF & tmp;
251 __STATIC_INLINE
void BURTC_IntSet(uint32_t flags)
263 __STATIC_INLINE uint32_t BURTC_Status(
void)
265 return BURTC->STATUS;
273 __STATIC_INLINE
void BURTC_StatusClear(
void)
275 BURTC->CMD = BURTC_CMD_CLRSTATUS;
285 __STATIC_INLINE
void BURTC_Enable(
bool enable)
288 EFM_ASSERT(((enable ==
true)
289 && ((BURTC->CTRL & _BURTC_CTRL_MODE_MASK)
290 != BURTC_CTRL_MODE_DISABLE))
291 || (enable ==
false));
309 __STATIC_INLINE uint32_t BURTC_CounterGet(
void)
321 __STATIC_INLINE uint32_t BURTC_TimestampGet(
void)
323 return BURTC->TIMESTAMP;
331 __STATIC_INLINE
void BURTC_FreezeEnable(
bool enable)
333 BUS_RegBitWrite(&BURTC->FREEZE, _BURTC_FREEZE_REGFREEZE_SHIFT, enable);
345 __STATIC_INLINE
void BURTC_Powerdown(
bool enable)
347 BUS_RegBitWrite(&BURTC->POWERDOWN, _BURTC_POWERDOWN_RAM_SHIFT, enable);
360 __STATIC_INLINE
void BURTC_RetRegSet(uint32_t num, uint32_t data)
362 EFM_ASSERT(num <= 127);
364 BURTC->RET[num].REG = data;
375 __STATIC_INLINE uint32_t BURTC_RetRegGet(uint32_t num)
377 EFM_ASSERT(num <= 127);
379 return BURTC->RET[num].REG;
387 __STATIC_INLINE
void BURTC_Lock(
void)
389 BURTC->LOCK = BURTC_LOCK_LOCKKEY_LOCK;
397 __STATIC_INLINE
void BURTC_Unlock(
void)
399 BURTC->LOCK = BURTC_LOCK_LOCKKEY_UNLOCK;
403 void BURTC_Reset(
void);
404 void BURTC_Init(
const BURTC_Init_TypeDef *burtcInit);
405 void BURTC_CounterReset(
void);
406 void BURTC_CompareSet(
unsigned int comp, uint32_t value);
407 uint32_t BURTC_CompareGet(
unsigned int comp);
408 uint32_t BURTC_ClockFreqGet(
void);
Emlib peripheral API "assert" implementation.
RAM and peripheral bit-field set and clear API.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.