EFM32 Gecko Software Documentation  efm32g-doc-5.1.2
efm32g_timer.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CMD;
45  __IM uint32_t STATUS;
46  __IOM uint32_t IEN;
47  __IM uint32_t IF;
48  __IOM uint32_t IFS;
49  __IOM uint32_t IFC;
50  __IOM uint32_t TOP;
51  __IOM uint32_t TOPB;
52  __IOM uint32_t CNT;
53  __IOM uint32_t ROUTE;
55  uint32_t RESERVED0[1];
59  uint32_t RESERVED1[4];
60  __IOM uint32_t DTCTRL;
61  __IOM uint32_t DTTIME;
62  __IOM uint32_t DTFC;
63  __IOM uint32_t DTOGEN;
64  __IM uint32_t DTFAULT;
65  __OM uint32_t DTFAULTC;
66  __IOM uint32_t DTLOCK;
67 } TIMER_TypeDef;
69 /**************************************************************************/
74 /* Bit fields for TIMER CTRL */
75 #define _TIMER_CTRL_RESETVALUE 0x00000000UL
76 #define _TIMER_CTRL_MASK 0x0F030FFBUL
77 #define _TIMER_CTRL_MODE_SHIFT 0
78 #define _TIMER_CTRL_MODE_MASK 0x3UL
79 #define _TIMER_CTRL_MODE_DEFAULT 0x00000000UL
80 #define _TIMER_CTRL_MODE_UP 0x00000000UL
81 #define _TIMER_CTRL_MODE_DOWN 0x00000001UL
82 #define _TIMER_CTRL_MODE_UPDOWN 0x00000002UL
83 #define _TIMER_CTRL_MODE_QDEC 0x00000003UL
84 #define TIMER_CTRL_MODE_DEFAULT (_TIMER_CTRL_MODE_DEFAULT << 0)
85 #define TIMER_CTRL_MODE_UP (_TIMER_CTRL_MODE_UP << 0)
86 #define TIMER_CTRL_MODE_DOWN (_TIMER_CTRL_MODE_DOWN << 0)
87 #define TIMER_CTRL_MODE_UPDOWN (_TIMER_CTRL_MODE_UPDOWN << 0)
88 #define TIMER_CTRL_MODE_QDEC (_TIMER_CTRL_MODE_QDEC << 0)
89 #define TIMER_CTRL_SYNC (0x1UL << 3)
90 #define _TIMER_CTRL_SYNC_SHIFT 3
91 #define _TIMER_CTRL_SYNC_MASK 0x8UL
92 #define _TIMER_CTRL_SYNC_DEFAULT 0x00000000UL
93 #define TIMER_CTRL_SYNC_DEFAULT (_TIMER_CTRL_SYNC_DEFAULT << 3)
94 #define TIMER_CTRL_OSMEN (0x1UL << 4)
95 #define _TIMER_CTRL_OSMEN_SHIFT 4
96 #define _TIMER_CTRL_OSMEN_MASK 0x10UL
97 #define _TIMER_CTRL_OSMEN_DEFAULT 0x00000000UL
98 #define TIMER_CTRL_OSMEN_DEFAULT (_TIMER_CTRL_OSMEN_DEFAULT << 4)
99 #define TIMER_CTRL_QDM (0x1UL << 5)
100 #define _TIMER_CTRL_QDM_SHIFT 5
101 #define _TIMER_CTRL_QDM_MASK 0x20UL
102 #define _TIMER_CTRL_QDM_DEFAULT 0x00000000UL
103 #define _TIMER_CTRL_QDM_X2 0x00000000UL
104 #define _TIMER_CTRL_QDM_X4 0x00000001UL
105 #define TIMER_CTRL_QDM_DEFAULT (_TIMER_CTRL_QDM_DEFAULT << 5)
106 #define TIMER_CTRL_QDM_X2 (_TIMER_CTRL_QDM_X2 << 5)
107 #define TIMER_CTRL_QDM_X4 (_TIMER_CTRL_QDM_X4 << 5)
108 #define TIMER_CTRL_DEBUGRUN (0x1UL << 6)
109 #define _TIMER_CTRL_DEBUGRUN_SHIFT 6
110 #define _TIMER_CTRL_DEBUGRUN_MASK 0x40UL
111 #define _TIMER_CTRL_DEBUGRUN_DEFAULT 0x00000000UL
112 #define TIMER_CTRL_DEBUGRUN_DEFAULT (_TIMER_CTRL_DEBUGRUN_DEFAULT << 6)
113 #define TIMER_CTRL_DMACLRACT (0x1UL << 7)
114 #define _TIMER_CTRL_DMACLRACT_SHIFT 7
115 #define _TIMER_CTRL_DMACLRACT_MASK 0x80UL
116 #define _TIMER_CTRL_DMACLRACT_DEFAULT 0x00000000UL
117 #define TIMER_CTRL_DMACLRACT_DEFAULT (_TIMER_CTRL_DMACLRACT_DEFAULT << 7)
118 #define _TIMER_CTRL_RISEA_SHIFT 8
119 #define _TIMER_CTRL_RISEA_MASK 0x300UL
120 #define _TIMER_CTRL_RISEA_DEFAULT 0x00000000UL
121 #define _TIMER_CTRL_RISEA_NONE 0x00000000UL
122 #define _TIMER_CTRL_RISEA_START 0x00000001UL
123 #define _TIMER_CTRL_RISEA_STOP 0x00000002UL
124 #define _TIMER_CTRL_RISEA_RELOADSTART 0x00000003UL
125 #define TIMER_CTRL_RISEA_DEFAULT (_TIMER_CTRL_RISEA_DEFAULT << 8)
126 #define TIMER_CTRL_RISEA_NONE (_TIMER_CTRL_RISEA_NONE << 8)
127 #define TIMER_CTRL_RISEA_START (_TIMER_CTRL_RISEA_START << 8)
128 #define TIMER_CTRL_RISEA_STOP (_TIMER_CTRL_RISEA_STOP << 8)
129 #define TIMER_CTRL_RISEA_RELOADSTART (_TIMER_CTRL_RISEA_RELOADSTART << 8)
130 #define _TIMER_CTRL_FALLA_SHIFT 10
131 #define _TIMER_CTRL_FALLA_MASK 0xC00UL
132 #define _TIMER_CTRL_FALLA_DEFAULT 0x00000000UL
133 #define _TIMER_CTRL_FALLA_NONE 0x00000000UL
134 #define _TIMER_CTRL_FALLA_START 0x00000001UL
135 #define _TIMER_CTRL_FALLA_STOP 0x00000002UL
136 #define _TIMER_CTRL_FALLA_RELOADSTART 0x00000003UL
137 #define TIMER_CTRL_FALLA_DEFAULT (_TIMER_CTRL_FALLA_DEFAULT << 10)
138 #define TIMER_CTRL_FALLA_NONE (_TIMER_CTRL_FALLA_NONE << 10)
139 #define TIMER_CTRL_FALLA_START (_TIMER_CTRL_FALLA_START << 10)
140 #define TIMER_CTRL_FALLA_STOP (_TIMER_CTRL_FALLA_STOP << 10)
141 #define TIMER_CTRL_FALLA_RELOADSTART (_TIMER_CTRL_FALLA_RELOADSTART << 10)
142 #define _TIMER_CTRL_CLKSEL_SHIFT 16
143 #define _TIMER_CTRL_CLKSEL_MASK 0x30000UL
144 #define _TIMER_CTRL_CLKSEL_DEFAULT 0x00000000UL
145 #define _TIMER_CTRL_CLKSEL_PRESCHFPERCLK 0x00000000UL
146 #define _TIMER_CTRL_CLKSEL_CC1 0x00000001UL
147 #define _TIMER_CTRL_CLKSEL_TIMEROUF 0x00000002UL
148 #define TIMER_CTRL_CLKSEL_DEFAULT (_TIMER_CTRL_CLKSEL_DEFAULT << 16)
149 #define TIMER_CTRL_CLKSEL_PRESCHFPERCLK (_TIMER_CTRL_CLKSEL_PRESCHFPERCLK << 16)
150 #define TIMER_CTRL_CLKSEL_CC1 (_TIMER_CTRL_CLKSEL_CC1 << 16)
151 #define TIMER_CTRL_CLKSEL_TIMEROUF (_TIMER_CTRL_CLKSEL_TIMEROUF << 16)
152 #define _TIMER_CTRL_PRESC_SHIFT 24
153 #define _TIMER_CTRL_PRESC_MASK 0xF000000UL
154 #define _TIMER_CTRL_PRESC_DEFAULT 0x00000000UL
155 #define _TIMER_CTRL_PRESC_DIV1 0x00000000UL
156 #define _TIMER_CTRL_PRESC_DIV2 0x00000001UL
157 #define _TIMER_CTRL_PRESC_DIV4 0x00000002UL
158 #define _TIMER_CTRL_PRESC_DIV8 0x00000003UL
159 #define _TIMER_CTRL_PRESC_DIV16 0x00000004UL
160 #define _TIMER_CTRL_PRESC_DIV32 0x00000005UL
161 #define _TIMER_CTRL_PRESC_DIV64 0x00000006UL
162 #define _TIMER_CTRL_PRESC_DIV128 0x00000007UL
163 #define _TIMER_CTRL_PRESC_DIV256 0x00000008UL
164 #define _TIMER_CTRL_PRESC_DIV512 0x00000009UL
165 #define _TIMER_CTRL_PRESC_DIV1024 0x0000000AUL
166 #define TIMER_CTRL_PRESC_DEFAULT (_TIMER_CTRL_PRESC_DEFAULT << 24)
167 #define TIMER_CTRL_PRESC_DIV1 (_TIMER_CTRL_PRESC_DIV1 << 24)
168 #define TIMER_CTRL_PRESC_DIV2 (_TIMER_CTRL_PRESC_DIV2 << 24)
169 #define TIMER_CTRL_PRESC_DIV4 (_TIMER_CTRL_PRESC_DIV4 << 24)
170 #define TIMER_CTRL_PRESC_DIV8 (_TIMER_CTRL_PRESC_DIV8 << 24)
171 #define TIMER_CTRL_PRESC_DIV16 (_TIMER_CTRL_PRESC_DIV16 << 24)
172 #define TIMER_CTRL_PRESC_DIV32 (_TIMER_CTRL_PRESC_DIV32 << 24)
173 #define TIMER_CTRL_PRESC_DIV64 (_TIMER_CTRL_PRESC_DIV64 << 24)
174 #define TIMER_CTRL_PRESC_DIV128 (_TIMER_CTRL_PRESC_DIV128 << 24)
175 #define TIMER_CTRL_PRESC_DIV256 (_TIMER_CTRL_PRESC_DIV256 << 24)
176 #define TIMER_CTRL_PRESC_DIV512 (_TIMER_CTRL_PRESC_DIV512 << 24)
177 #define TIMER_CTRL_PRESC_DIV1024 (_TIMER_CTRL_PRESC_DIV1024 << 24)
179 /* Bit fields for TIMER CMD */
180 #define _TIMER_CMD_RESETVALUE 0x00000000UL
181 #define _TIMER_CMD_MASK 0x00000003UL
182 #define TIMER_CMD_START (0x1UL << 0)
183 #define _TIMER_CMD_START_SHIFT 0
184 #define _TIMER_CMD_START_MASK 0x1UL
185 #define _TIMER_CMD_START_DEFAULT 0x00000000UL
186 #define TIMER_CMD_START_DEFAULT (_TIMER_CMD_START_DEFAULT << 0)
187 #define TIMER_CMD_STOP (0x1UL << 1)
188 #define _TIMER_CMD_STOP_SHIFT 1
189 #define _TIMER_CMD_STOP_MASK 0x2UL
190 #define _TIMER_CMD_STOP_DEFAULT 0x00000000UL
191 #define TIMER_CMD_STOP_DEFAULT (_TIMER_CMD_STOP_DEFAULT << 1)
193 /* Bit fields for TIMER STATUS */
194 #define _TIMER_STATUS_RESETVALUE 0x00000000UL
195 #define _TIMER_STATUS_MASK 0x07070707UL
196 #define TIMER_STATUS_RUNNING (0x1UL << 0)
197 #define _TIMER_STATUS_RUNNING_SHIFT 0
198 #define _TIMER_STATUS_RUNNING_MASK 0x1UL
199 #define _TIMER_STATUS_RUNNING_DEFAULT 0x00000000UL
200 #define TIMER_STATUS_RUNNING_DEFAULT (_TIMER_STATUS_RUNNING_DEFAULT << 0)
201 #define TIMER_STATUS_DIR (0x1UL << 1)
202 #define _TIMER_STATUS_DIR_SHIFT 1
203 #define _TIMER_STATUS_DIR_MASK 0x2UL
204 #define _TIMER_STATUS_DIR_DEFAULT 0x00000000UL
205 #define _TIMER_STATUS_DIR_UP 0x00000000UL
206 #define _TIMER_STATUS_DIR_DOWN 0x00000001UL
207 #define TIMER_STATUS_DIR_DEFAULT (_TIMER_STATUS_DIR_DEFAULT << 1)
208 #define TIMER_STATUS_DIR_UP (_TIMER_STATUS_DIR_UP << 1)
209 #define TIMER_STATUS_DIR_DOWN (_TIMER_STATUS_DIR_DOWN << 1)
210 #define TIMER_STATUS_TOPBV (0x1UL << 2)
211 #define _TIMER_STATUS_TOPBV_SHIFT 2
212 #define _TIMER_STATUS_TOPBV_MASK 0x4UL
213 #define _TIMER_STATUS_TOPBV_DEFAULT 0x00000000UL
214 #define TIMER_STATUS_TOPBV_DEFAULT (_TIMER_STATUS_TOPBV_DEFAULT << 2)
215 #define TIMER_STATUS_CCVBV0 (0x1UL << 8)
216 #define _TIMER_STATUS_CCVBV0_SHIFT 8
217 #define _TIMER_STATUS_CCVBV0_MASK 0x100UL
218 #define _TIMER_STATUS_CCVBV0_DEFAULT 0x00000000UL
219 #define TIMER_STATUS_CCVBV0_DEFAULT (_TIMER_STATUS_CCVBV0_DEFAULT << 8)
220 #define TIMER_STATUS_CCVBV1 (0x1UL << 9)
221 #define _TIMER_STATUS_CCVBV1_SHIFT 9
222 #define _TIMER_STATUS_CCVBV1_MASK 0x200UL
223 #define _TIMER_STATUS_CCVBV1_DEFAULT 0x00000000UL
224 #define TIMER_STATUS_CCVBV1_DEFAULT (_TIMER_STATUS_CCVBV1_DEFAULT << 9)
225 #define TIMER_STATUS_CCVBV2 (0x1UL << 10)
226 #define _TIMER_STATUS_CCVBV2_SHIFT 10
227 #define _TIMER_STATUS_CCVBV2_MASK 0x400UL
228 #define _TIMER_STATUS_CCVBV2_DEFAULT 0x00000000UL
229 #define TIMER_STATUS_CCVBV2_DEFAULT (_TIMER_STATUS_CCVBV2_DEFAULT << 10)
230 #define TIMER_STATUS_ICV0 (0x1UL << 16)
231 #define _TIMER_STATUS_ICV0_SHIFT 16
232 #define _TIMER_STATUS_ICV0_MASK 0x10000UL
233 #define _TIMER_STATUS_ICV0_DEFAULT 0x00000000UL
234 #define TIMER_STATUS_ICV0_DEFAULT (_TIMER_STATUS_ICV0_DEFAULT << 16)
235 #define TIMER_STATUS_ICV1 (0x1UL << 17)
236 #define _TIMER_STATUS_ICV1_SHIFT 17
237 #define _TIMER_STATUS_ICV1_MASK 0x20000UL
238 #define _TIMER_STATUS_ICV1_DEFAULT 0x00000000UL
239 #define TIMER_STATUS_ICV1_DEFAULT (_TIMER_STATUS_ICV1_DEFAULT << 17)
240 #define TIMER_STATUS_ICV2 (0x1UL << 18)
241 #define _TIMER_STATUS_ICV2_SHIFT 18
242 #define _TIMER_STATUS_ICV2_MASK 0x40000UL
243 #define _TIMER_STATUS_ICV2_DEFAULT 0x00000000UL
244 #define TIMER_STATUS_ICV2_DEFAULT (_TIMER_STATUS_ICV2_DEFAULT << 18)
245 #define TIMER_STATUS_CCPOL0 (0x1UL << 24)
246 #define _TIMER_STATUS_CCPOL0_SHIFT 24
247 #define _TIMER_STATUS_CCPOL0_MASK 0x1000000UL
248 #define _TIMER_STATUS_CCPOL0_DEFAULT 0x00000000UL
249 #define _TIMER_STATUS_CCPOL0_LOWRISE 0x00000000UL
250 #define _TIMER_STATUS_CCPOL0_HIGHFALL 0x00000001UL
251 #define TIMER_STATUS_CCPOL0_DEFAULT (_TIMER_STATUS_CCPOL0_DEFAULT << 24)
252 #define TIMER_STATUS_CCPOL0_LOWRISE (_TIMER_STATUS_CCPOL0_LOWRISE << 24)
253 #define TIMER_STATUS_CCPOL0_HIGHFALL (_TIMER_STATUS_CCPOL0_HIGHFALL << 24)
254 #define TIMER_STATUS_CCPOL1 (0x1UL << 25)
255 #define _TIMER_STATUS_CCPOL1_SHIFT 25
256 #define _TIMER_STATUS_CCPOL1_MASK 0x2000000UL
257 #define _TIMER_STATUS_CCPOL1_DEFAULT 0x00000000UL
258 #define _TIMER_STATUS_CCPOL1_LOWRISE 0x00000000UL
259 #define _TIMER_STATUS_CCPOL1_HIGHFALL 0x00000001UL
260 #define TIMER_STATUS_CCPOL1_DEFAULT (_TIMER_STATUS_CCPOL1_DEFAULT << 25)
261 #define TIMER_STATUS_CCPOL1_LOWRISE (_TIMER_STATUS_CCPOL1_LOWRISE << 25)
262 #define TIMER_STATUS_CCPOL1_HIGHFALL (_TIMER_STATUS_CCPOL1_HIGHFALL << 25)
263 #define TIMER_STATUS_CCPOL2 (0x1UL << 26)
264 #define _TIMER_STATUS_CCPOL2_SHIFT 26
265 #define _TIMER_STATUS_CCPOL2_MASK 0x4000000UL
266 #define _TIMER_STATUS_CCPOL2_DEFAULT 0x00000000UL
267 #define _TIMER_STATUS_CCPOL2_LOWRISE 0x00000000UL
268 #define _TIMER_STATUS_CCPOL2_HIGHFALL 0x00000001UL
269 #define TIMER_STATUS_CCPOL2_DEFAULT (_TIMER_STATUS_CCPOL2_DEFAULT << 26)
270 #define TIMER_STATUS_CCPOL2_LOWRISE (_TIMER_STATUS_CCPOL2_LOWRISE << 26)
271 #define TIMER_STATUS_CCPOL2_HIGHFALL (_TIMER_STATUS_CCPOL2_HIGHFALL << 26)
273 /* Bit fields for TIMER IEN */
274 #define _TIMER_IEN_RESETVALUE 0x00000000UL
275 #define _TIMER_IEN_MASK 0x00000773UL
276 #define TIMER_IEN_OF (0x1UL << 0)
277 #define _TIMER_IEN_OF_SHIFT 0
278 #define _TIMER_IEN_OF_MASK 0x1UL
279 #define _TIMER_IEN_OF_DEFAULT 0x00000000UL
280 #define TIMER_IEN_OF_DEFAULT (_TIMER_IEN_OF_DEFAULT << 0)
281 #define TIMER_IEN_UF (0x1UL << 1)
282 #define _TIMER_IEN_UF_SHIFT 1
283 #define _TIMER_IEN_UF_MASK 0x2UL
284 #define _TIMER_IEN_UF_DEFAULT 0x00000000UL
285 #define TIMER_IEN_UF_DEFAULT (_TIMER_IEN_UF_DEFAULT << 1)
286 #define TIMER_IEN_CC0 (0x1UL << 4)
287 #define _TIMER_IEN_CC0_SHIFT 4
288 #define _TIMER_IEN_CC0_MASK 0x10UL
289 #define _TIMER_IEN_CC0_DEFAULT 0x00000000UL
290 #define TIMER_IEN_CC0_DEFAULT (_TIMER_IEN_CC0_DEFAULT << 4)
291 #define TIMER_IEN_CC1 (0x1UL << 5)
292 #define _TIMER_IEN_CC1_SHIFT 5
293 #define _TIMER_IEN_CC1_MASK 0x20UL
294 #define _TIMER_IEN_CC1_DEFAULT 0x00000000UL
295 #define TIMER_IEN_CC1_DEFAULT (_TIMER_IEN_CC1_DEFAULT << 5)
296 #define TIMER_IEN_CC2 (0x1UL << 6)
297 #define _TIMER_IEN_CC2_SHIFT 6
298 #define _TIMER_IEN_CC2_MASK 0x40UL
299 #define _TIMER_IEN_CC2_DEFAULT 0x00000000UL
300 #define TIMER_IEN_CC2_DEFAULT (_TIMER_IEN_CC2_DEFAULT << 6)
301 #define TIMER_IEN_ICBOF0 (0x1UL << 8)
302 #define _TIMER_IEN_ICBOF0_SHIFT 8
303 #define _TIMER_IEN_ICBOF0_MASK 0x100UL
304 #define _TIMER_IEN_ICBOF0_DEFAULT 0x00000000UL
305 #define TIMER_IEN_ICBOF0_DEFAULT (_TIMER_IEN_ICBOF0_DEFAULT << 8)
306 #define TIMER_IEN_ICBOF1 (0x1UL << 9)
307 #define _TIMER_IEN_ICBOF1_SHIFT 9
308 #define _TIMER_IEN_ICBOF1_MASK 0x200UL
309 #define _TIMER_IEN_ICBOF1_DEFAULT 0x00000000UL
310 #define TIMER_IEN_ICBOF1_DEFAULT (_TIMER_IEN_ICBOF1_DEFAULT << 9)
311 #define TIMER_IEN_ICBOF2 (0x1UL << 10)
312 #define _TIMER_IEN_ICBOF2_SHIFT 10
313 #define _TIMER_IEN_ICBOF2_MASK 0x400UL
314 #define _TIMER_IEN_ICBOF2_DEFAULT 0x00000000UL
315 #define TIMER_IEN_ICBOF2_DEFAULT (_TIMER_IEN_ICBOF2_DEFAULT << 10)
317 /* Bit fields for TIMER IF */
318 #define _TIMER_IF_RESETVALUE 0x00000000UL
319 #define _TIMER_IF_MASK 0x00000773UL
320 #define TIMER_IF_OF (0x1UL << 0)
321 #define _TIMER_IF_OF_SHIFT 0
322 #define _TIMER_IF_OF_MASK 0x1UL
323 #define _TIMER_IF_OF_DEFAULT 0x00000000UL
324 #define TIMER_IF_OF_DEFAULT (_TIMER_IF_OF_DEFAULT << 0)
325 #define TIMER_IF_UF (0x1UL << 1)
326 #define _TIMER_IF_UF_SHIFT 1
327 #define _TIMER_IF_UF_MASK 0x2UL
328 #define _TIMER_IF_UF_DEFAULT 0x00000000UL
329 #define TIMER_IF_UF_DEFAULT (_TIMER_IF_UF_DEFAULT << 1)
330 #define TIMER_IF_CC0 (0x1UL << 4)
331 #define _TIMER_IF_CC0_SHIFT 4
332 #define _TIMER_IF_CC0_MASK 0x10UL
333 #define _TIMER_IF_CC0_DEFAULT 0x00000000UL
334 #define TIMER_IF_CC0_DEFAULT (_TIMER_IF_CC0_DEFAULT << 4)
335 #define TIMER_IF_CC1 (0x1UL << 5)
336 #define _TIMER_IF_CC1_SHIFT 5
337 #define _TIMER_IF_CC1_MASK 0x20UL
338 #define _TIMER_IF_CC1_DEFAULT 0x00000000UL
339 #define TIMER_IF_CC1_DEFAULT (_TIMER_IF_CC1_DEFAULT << 5)
340 #define TIMER_IF_CC2 (0x1UL << 6)
341 #define _TIMER_IF_CC2_SHIFT 6
342 #define _TIMER_IF_CC2_MASK 0x40UL
343 #define _TIMER_IF_CC2_DEFAULT 0x00000000UL
344 #define TIMER_IF_CC2_DEFAULT (_TIMER_IF_CC2_DEFAULT << 6)
345 #define TIMER_IF_ICBOF0 (0x1UL << 8)
346 #define _TIMER_IF_ICBOF0_SHIFT 8
347 #define _TIMER_IF_ICBOF0_MASK 0x100UL
348 #define _TIMER_IF_ICBOF0_DEFAULT 0x00000000UL
349 #define TIMER_IF_ICBOF0_DEFAULT (_TIMER_IF_ICBOF0_DEFAULT << 8)
350 #define TIMER_IF_ICBOF1 (0x1UL << 9)
351 #define _TIMER_IF_ICBOF1_SHIFT 9
352 #define _TIMER_IF_ICBOF1_MASK 0x200UL
353 #define _TIMER_IF_ICBOF1_DEFAULT 0x00000000UL
354 #define TIMER_IF_ICBOF1_DEFAULT (_TIMER_IF_ICBOF1_DEFAULT << 9)
355 #define TIMER_IF_ICBOF2 (0x1UL << 10)
356 #define _TIMER_IF_ICBOF2_SHIFT 10
357 #define _TIMER_IF_ICBOF2_MASK 0x400UL
358 #define _TIMER_IF_ICBOF2_DEFAULT 0x00000000UL
359 #define TIMER_IF_ICBOF2_DEFAULT (_TIMER_IF_ICBOF2_DEFAULT << 10)
361 /* Bit fields for TIMER IFS */
362 #define _TIMER_IFS_RESETVALUE 0x00000000UL
363 #define _TIMER_IFS_MASK 0x00000773UL
364 #define TIMER_IFS_OF (0x1UL << 0)
365 #define _TIMER_IFS_OF_SHIFT 0
366 #define _TIMER_IFS_OF_MASK 0x1UL
367 #define _TIMER_IFS_OF_DEFAULT 0x00000000UL
368 #define TIMER_IFS_OF_DEFAULT (_TIMER_IFS_OF_DEFAULT << 0)
369 #define TIMER_IFS_UF (0x1UL << 1)
370 #define _TIMER_IFS_UF_SHIFT 1
371 #define _TIMER_IFS_UF_MASK 0x2UL
372 #define _TIMER_IFS_UF_DEFAULT 0x00000000UL
373 #define TIMER_IFS_UF_DEFAULT (_TIMER_IFS_UF_DEFAULT << 1)
374 #define TIMER_IFS_CC0 (0x1UL << 4)
375 #define _TIMER_IFS_CC0_SHIFT 4
376 #define _TIMER_IFS_CC0_MASK 0x10UL
377 #define _TIMER_IFS_CC0_DEFAULT 0x00000000UL
378 #define TIMER_IFS_CC0_DEFAULT (_TIMER_IFS_CC0_DEFAULT << 4)
379 #define TIMER_IFS_CC1 (0x1UL << 5)
380 #define _TIMER_IFS_CC1_SHIFT 5
381 #define _TIMER_IFS_CC1_MASK 0x20UL
382 #define _TIMER_IFS_CC1_DEFAULT 0x00000000UL
383 #define TIMER_IFS_CC1_DEFAULT (_TIMER_IFS_CC1_DEFAULT << 5)
384 #define TIMER_IFS_CC2 (0x1UL << 6)
385 #define _TIMER_IFS_CC2_SHIFT 6
386 #define _TIMER_IFS_CC2_MASK 0x40UL
387 #define _TIMER_IFS_CC2_DEFAULT 0x00000000UL
388 #define TIMER_IFS_CC2_DEFAULT (_TIMER_IFS_CC2_DEFAULT << 6)
389 #define TIMER_IFS_ICBOF0 (0x1UL << 8)
390 #define _TIMER_IFS_ICBOF0_SHIFT 8
391 #define _TIMER_IFS_ICBOF0_MASK 0x100UL
392 #define _TIMER_IFS_ICBOF0_DEFAULT 0x00000000UL
393 #define TIMER_IFS_ICBOF0_DEFAULT (_TIMER_IFS_ICBOF0_DEFAULT << 8)
394 #define TIMER_IFS_ICBOF1 (0x1UL << 9)
395 #define _TIMER_IFS_ICBOF1_SHIFT 9
396 #define _TIMER_IFS_ICBOF1_MASK 0x200UL
397 #define _TIMER_IFS_ICBOF1_DEFAULT 0x00000000UL
398 #define TIMER_IFS_ICBOF1_DEFAULT (_TIMER_IFS_ICBOF1_DEFAULT << 9)
399 #define TIMER_IFS_ICBOF2 (0x1UL << 10)
400 #define _TIMER_IFS_ICBOF2_SHIFT 10
401 #define _TIMER_IFS_ICBOF2_MASK 0x400UL
402 #define _TIMER_IFS_ICBOF2_DEFAULT 0x00000000UL
403 #define TIMER_IFS_ICBOF2_DEFAULT (_TIMER_IFS_ICBOF2_DEFAULT << 10)
405 /* Bit fields for TIMER IFC */
406 #define _TIMER_IFC_RESETVALUE 0x00000000UL
407 #define _TIMER_IFC_MASK 0x00000773UL
408 #define TIMER_IFC_OF (0x1UL << 0)
409 #define _TIMER_IFC_OF_SHIFT 0
410 #define _TIMER_IFC_OF_MASK 0x1UL
411 #define _TIMER_IFC_OF_DEFAULT 0x00000000UL
412 #define TIMER_IFC_OF_DEFAULT (_TIMER_IFC_OF_DEFAULT << 0)
413 #define TIMER_IFC_UF (0x1UL << 1)
414 #define _TIMER_IFC_UF_SHIFT 1
415 #define _TIMER_IFC_UF_MASK 0x2UL
416 #define _TIMER_IFC_UF_DEFAULT 0x00000000UL
417 #define TIMER_IFC_UF_DEFAULT (_TIMER_IFC_UF_DEFAULT << 1)
418 #define TIMER_IFC_CC0 (0x1UL << 4)
419 #define _TIMER_IFC_CC0_SHIFT 4
420 #define _TIMER_IFC_CC0_MASK 0x10UL
421 #define _TIMER_IFC_CC0_DEFAULT 0x00000000UL
422 #define TIMER_IFC_CC0_DEFAULT (_TIMER_IFC_CC0_DEFAULT << 4)
423 #define TIMER_IFC_CC1 (0x1UL << 5)
424 #define _TIMER_IFC_CC1_SHIFT 5
425 #define _TIMER_IFC_CC1_MASK 0x20UL
426 #define _TIMER_IFC_CC1_DEFAULT 0x00000000UL
427 #define TIMER_IFC_CC1_DEFAULT (_TIMER_IFC_CC1_DEFAULT << 5)
428 #define TIMER_IFC_CC2 (0x1UL << 6)
429 #define _TIMER_IFC_CC2_SHIFT 6
430 #define _TIMER_IFC_CC2_MASK 0x40UL
431 #define _TIMER_IFC_CC2_DEFAULT 0x00000000UL
432 #define TIMER_IFC_CC2_DEFAULT (_TIMER_IFC_CC2_DEFAULT << 6)
433 #define TIMER_IFC_ICBOF0 (0x1UL << 8)
434 #define _TIMER_IFC_ICBOF0_SHIFT 8
435 #define _TIMER_IFC_ICBOF0_MASK 0x100UL
436 #define _TIMER_IFC_ICBOF0_DEFAULT 0x00000000UL
437 #define TIMER_IFC_ICBOF0_DEFAULT (_TIMER_IFC_ICBOF0_DEFAULT << 8)
438 #define TIMER_IFC_ICBOF1 (0x1UL << 9)
439 #define _TIMER_IFC_ICBOF1_SHIFT 9
440 #define _TIMER_IFC_ICBOF1_MASK 0x200UL
441 #define _TIMER_IFC_ICBOF1_DEFAULT 0x00000000UL
442 #define TIMER_IFC_ICBOF1_DEFAULT (_TIMER_IFC_ICBOF1_DEFAULT << 9)
443 #define TIMER_IFC_ICBOF2 (0x1UL << 10)
444 #define _TIMER_IFC_ICBOF2_SHIFT 10
445 #define _TIMER_IFC_ICBOF2_MASK 0x400UL
446 #define _TIMER_IFC_ICBOF2_DEFAULT 0x00000000UL
447 #define TIMER_IFC_ICBOF2_DEFAULT (_TIMER_IFC_ICBOF2_DEFAULT << 10)
449 /* Bit fields for TIMER TOP */
450 #define _TIMER_TOP_RESETVALUE 0x0000FFFFUL
451 #define _TIMER_TOP_MASK 0x0000FFFFUL
452 #define _TIMER_TOP_TOP_SHIFT 0
453 #define _TIMER_TOP_TOP_MASK 0xFFFFUL
454 #define _TIMER_TOP_TOP_DEFAULT 0x0000FFFFUL
455 #define TIMER_TOP_TOP_DEFAULT (_TIMER_TOP_TOP_DEFAULT << 0)
457 /* Bit fields for TIMER TOPB */
458 #define _TIMER_TOPB_RESETVALUE 0x00000000UL
459 #define _TIMER_TOPB_MASK 0x0000FFFFUL
460 #define _TIMER_TOPB_TOPB_SHIFT 0
461 #define _TIMER_TOPB_TOPB_MASK 0xFFFFUL
462 #define _TIMER_TOPB_TOPB_DEFAULT 0x00000000UL
463 #define TIMER_TOPB_TOPB_DEFAULT (_TIMER_TOPB_TOPB_DEFAULT << 0)
465 /* Bit fields for TIMER CNT */
466 #define _TIMER_CNT_RESETVALUE 0x00000000UL
467 #define _TIMER_CNT_MASK 0x0000FFFFUL
468 #define _TIMER_CNT_CNT_SHIFT 0
469 #define _TIMER_CNT_CNT_MASK 0xFFFFUL
470 #define _TIMER_CNT_CNT_DEFAULT 0x00000000UL
471 #define TIMER_CNT_CNT_DEFAULT (_TIMER_CNT_CNT_DEFAULT << 0)
473 /* Bit fields for TIMER ROUTE */
474 #define _TIMER_ROUTE_RESETVALUE 0x00000000UL
475 #define _TIMER_ROUTE_MASK 0x00030707UL
476 #define TIMER_ROUTE_CC0PEN (0x1UL << 0)
477 #define _TIMER_ROUTE_CC0PEN_SHIFT 0
478 #define _TIMER_ROUTE_CC0PEN_MASK 0x1UL
479 #define _TIMER_ROUTE_CC0PEN_DEFAULT 0x00000000UL
480 #define TIMER_ROUTE_CC0PEN_DEFAULT (_TIMER_ROUTE_CC0PEN_DEFAULT << 0)
481 #define TIMER_ROUTE_CC1PEN (0x1UL << 1)
482 #define _TIMER_ROUTE_CC1PEN_SHIFT 1
483 #define _TIMER_ROUTE_CC1PEN_MASK 0x2UL
484 #define _TIMER_ROUTE_CC1PEN_DEFAULT 0x00000000UL
485 #define TIMER_ROUTE_CC1PEN_DEFAULT (_TIMER_ROUTE_CC1PEN_DEFAULT << 1)
486 #define TIMER_ROUTE_CC2PEN (0x1UL << 2)
487 #define _TIMER_ROUTE_CC2PEN_SHIFT 2
488 #define _TIMER_ROUTE_CC2PEN_MASK 0x4UL
489 #define _TIMER_ROUTE_CC2PEN_DEFAULT 0x00000000UL
490 #define TIMER_ROUTE_CC2PEN_DEFAULT (_TIMER_ROUTE_CC2PEN_DEFAULT << 2)
491 #define TIMER_ROUTE_CDTI0PEN (0x1UL << 8)
492 #define _TIMER_ROUTE_CDTI0PEN_SHIFT 8
493 #define _TIMER_ROUTE_CDTI0PEN_MASK 0x100UL
494 #define _TIMER_ROUTE_CDTI0PEN_DEFAULT 0x00000000UL
495 #define TIMER_ROUTE_CDTI0PEN_DEFAULT (_TIMER_ROUTE_CDTI0PEN_DEFAULT << 8)
496 #define TIMER_ROUTE_CDTI1PEN (0x1UL << 9)
497 #define _TIMER_ROUTE_CDTI1PEN_SHIFT 9
498 #define _TIMER_ROUTE_CDTI1PEN_MASK 0x200UL
499 #define _TIMER_ROUTE_CDTI1PEN_DEFAULT 0x00000000UL
500 #define TIMER_ROUTE_CDTI1PEN_DEFAULT (_TIMER_ROUTE_CDTI1PEN_DEFAULT << 9)
501 #define TIMER_ROUTE_CDTI2PEN (0x1UL << 10)
502 #define _TIMER_ROUTE_CDTI2PEN_SHIFT 10
503 #define _TIMER_ROUTE_CDTI2PEN_MASK 0x400UL
504 #define _TIMER_ROUTE_CDTI2PEN_DEFAULT 0x00000000UL
505 #define TIMER_ROUTE_CDTI2PEN_DEFAULT (_TIMER_ROUTE_CDTI2PEN_DEFAULT << 10)
506 #define _TIMER_ROUTE_LOCATION_SHIFT 16
507 #define _TIMER_ROUTE_LOCATION_MASK 0x30000UL
508 #define _TIMER_ROUTE_LOCATION_LOC0 0x00000000UL
509 #define _TIMER_ROUTE_LOCATION_DEFAULT 0x00000000UL
510 #define _TIMER_ROUTE_LOCATION_LOC1 0x00000001UL
511 #define _TIMER_ROUTE_LOCATION_LOC2 0x00000002UL
512 #define _TIMER_ROUTE_LOCATION_LOC3 0x00000003UL
513 #define TIMER_ROUTE_LOCATION_LOC0 (_TIMER_ROUTE_LOCATION_LOC0 << 16)
514 #define TIMER_ROUTE_LOCATION_DEFAULT (_TIMER_ROUTE_LOCATION_DEFAULT << 16)
515 #define TIMER_ROUTE_LOCATION_LOC1 (_TIMER_ROUTE_LOCATION_LOC1 << 16)
516 #define TIMER_ROUTE_LOCATION_LOC2 (_TIMER_ROUTE_LOCATION_LOC2 << 16)
517 #define TIMER_ROUTE_LOCATION_LOC3 (_TIMER_ROUTE_LOCATION_LOC3 << 16)
519 /* Bit fields for TIMER CC_CTRL */
520 #define _TIMER_CC_CTRL_RESETVALUE 0x00000000UL
521 #define _TIMER_CC_CTRL_MASK 0x0F373F17UL
522 #define _TIMER_CC_CTRL_MODE_SHIFT 0
523 #define _TIMER_CC_CTRL_MODE_MASK 0x3UL
524 #define _TIMER_CC_CTRL_MODE_DEFAULT 0x00000000UL
525 #define _TIMER_CC_CTRL_MODE_OFF 0x00000000UL
526 #define _TIMER_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL
527 #define _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL
528 #define _TIMER_CC_CTRL_MODE_PWM 0x00000003UL
529 #define TIMER_CC_CTRL_MODE_DEFAULT (_TIMER_CC_CTRL_MODE_DEFAULT << 0)
530 #define TIMER_CC_CTRL_MODE_OFF (_TIMER_CC_CTRL_MODE_OFF << 0)
531 #define TIMER_CC_CTRL_MODE_INPUTCAPTURE (_TIMER_CC_CTRL_MODE_INPUTCAPTURE << 0)
532 #define TIMER_CC_CTRL_MODE_OUTPUTCOMPARE (_TIMER_CC_CTRL_MODE_OUTPUTCOMPARE << 0)
533 #define TIMER_CC_CTRL_MODE_PWM (_TIMER_CC_CTRL_MODE_PWM << 0)
534 #define TIMER_CC_CTRL_OUTINV (0x1UL << 2)
535 #define _TIMER_CC_CTRL_OUTINV_SHIFT 2
536 #define _TIMER_CC_CTRL_OUTINV_MASK 0x4UL
537 #define _TIMER_CC_CTRL_OUTINV_DEFAULT 0x00000000UL
538 #define TIMER_CC_CTRL_OUTINV_DEFAULT (_TIMER_CC_CTRL_OUTINV_DEFAULT << 2)
539 #define TIMER_CC_CTRL_COIST (0x1UL << 4)
540 #define _TIMER_CC_CTRL_COIST_SHIFT 4
541 #define _TIMER_CC_CTRL_COIST_MASK 0x10UL
542 #define _TIMER_CC_CTRL_COIST_DEFAULT 0x00000000UL
543 #define TIMER_CC_CTRL_COIST_DEFAULT (_TIMER_CC_CTRL_COIST_DEFAULT << 4)
544 #define _TIMER_CC_CTRL_CMOA_SHIFT 8
545 #define _TIMER_CC_CTRL_CMOA_MASK 0x300UL
546 #define _TIMER_CC_CTRL_CMOA_DEFAULT 0x00000000UL
547 #define _TIMER_CC_CTRL_CMOA_NONE 0x00000000UL
548 #define _TIMER_CC_CTRL_CMOA_TOGGLE 0x00000001UL
549 #define _TIMER_CC_CTRL_CMOA_CLEAR 0x00000002UL
550 #define _TIMER_CC_CTRL_CMOA_SET 0x00000003UL
551 #define TIMER_CC_CTRL_CMOA_DEFAULT (_TIMER_CC_CTRL_CMOA_DEFAULT << 8)
552 #define TIMER_CC_CTRL_CMOA_NONE (_TIMER_CC_CTRL_CMOA_NONE << 8)
553 #define TIMER_CC_CTRL_CMOA_TOGGLE (_TIMER_CC_CTRL_CMOA_TOGGLE << 8)
554 #define TIMER_CC_CTRL_CMOA_CLEAR (_TIMER_CC_CTRL_CMOA_CLEAR << 8)
555 #define TIMER_CC_CTRL_CMOA_SET (_TIMER_CC_CTRL_CMOA_SET << 8)
556 #define _TIMER_CC_CTRL_COFOA_SHIFT 10
557 #define _TIMER_CC_CTRL_COFOA_MASK 0xC00UL
558 #define _TIMER_CC_CTRL_COFOA_DEFAULT 0x00000000UL
559 #define _TIMER_CC_CTRL_COFOA_NONE 0x00000000UL
560 #define _TIMER_CC_CTRL_COFOA_TOGGLE 0x00000001UL
561 #define _TIMER_CC_CTRL_COFOA_CLEAR 0x00000002UL
562 #define _TIMER_CC_CTRL_COFOA_SET 0x00000003UL
563 #define TIMER_CC_CTRL_COFOA_DEFAULT (_TIMER_CC_CTRL_COFOA_DEFAULT << 10)
564 #define TIMER_CC_CTRL_COFOA_NONE (_TIMER_CC_CTRL_COFOA_NONE << 10)
565 #define TIMER_CC_CTRL_COFOA_TOGGLE (_TIMER_CC_CTRL_COFOA_TOGGLE << 10)
566 #define TIMER_CC_CTRL_COFOA_CLEAR (_TIMER_CC_CTRL_COFOA_CLEAR << 10)
567 #define TIMER_CC_CTRL_COFOA_SET (_TIMER_CC_CTRL_COFOA_SET << 10)
568 #define _TIMER_CC_CTRL_CUFOA_SHIFT 12
569 #define _TIMER_CC_CTRL_CUFOA_MASK 0x3000UL
570 #define _TIMER_CC_CTRL_CUFOA_DEFAULT 0x00000000UL
571 #define _TIMER_CC_CTRL_CUFOA_NONE 0x00000000UL
572 #define _TIMER_CC_CTRL_CUFOA_TOGGLE 0x00000001UL
573 #define _TIMER_CC_CTRL_CUFOA_CLEAR 0x00000002UL
574 #define _TIMER_CC_CTRL_CUFOA_SET 0x00000003UL
575 #define TIMER_CC_CTRL_CUFOA_DEFAULT (_TIMER_CC_CTRL_CUFOA_DEFAULT << 12)
576 #define TIMER_CC_CTRL_CUFOA_NONE (_TIMER_CC_CTRL_CUFOA_NONE << 12)
577 #define TIMER_CC_CTRL_CUFOA_TOGGLE (_TIMER_CC_CTRL_CUFOA_TOGGLE << 12)
578 #define TIMER_CC_CTRL_CUFOA_CLEAR (_TIMER_CC_CTRL_CUFOA_CLEAR << 12)
579 #define TIMER_CC_CTRL_CUFOA_SET (_TIMER_CC_CTRL_CUFOA_SET << 12)
580 #define _TIMER_CC_CTRL_PRSSEL_SHIFT 16
581 #define _TIMER_CC_CTRL_PRSSEL_MASK 0x70000UL
582 #define _TIMER_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL
583 #define _TIMER_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL
584 #define _TIMER_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL
585 #define _TIMER_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL
586 #define _TIMER_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL
587 #define _TIMER_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL
588 #define _TIMER_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL
589 #define _TIMER_CC_CTRL_PRSSEL_PRSCH6 0x00000006UL
590 #define _TIMER_CC_CTRL_PRSSEL_PRSCH7 0x00000007UL
591 #define TIMER_CC_CTRL_PRSSEL_DEFAULT (_TIMER_CC_CTRL_PRSSEL_DEFAULT << 16)
592 #define TIMER_CC_CTRL_PRSSEL_PRSCH0 (_TIMER_CC_CTRL_PRSSEL_PRSCH0 << 16)
593 #define TIMER_CC_CTRL_PRSSEL_PRSCH1 (_TIMER_CC_CTRL_PRSSEL_PRSCH1 << 16)
594 #define TIMER_CC_CTRL_PRSSEL_PRSCH2 (_TIMER_CC_CTRL_PRSSEL_PRSCH2 << 16)
595 #define TIMER_CC_CTRL_PRSSEL_PRSCH3 (_TIMER_CC_CTRL_PRSSEL_PRSCH3 << 16)
596 #define TIMER_CC_CTRL_PRSSEL_PRSCH4 (_TIMER_CC_CTRL_PRSSEL_PRSCH4 << 16)
597 #define TIMER_CC_CTRL_PRSSEL_PRSCH5 (_TIMER_CC_CTRL_PRSSEL_PRSCH5 << 16)
598 #define TIMER_CC_CTRL_PRSSEL_PRSCH6 (_TIMER_CC_CTRL_PRSSEL_PRSCH6 << 16)
599 #define TIMER_CC_CTRL_PRSSEL_PRSCH7 (_TIMER_CC_CTRL_PRSSEL_PRSCH7 << 16)
600 #define TIMER_CC_CTRL_INSEL (0x1UL << 20)
601 #define _TIMER_CC_CTRL_INSEL_SHIFT 20
602 #define _TIMER_CC_CTRL_INSEL_MASK 0x100000UL
603 #define _TIMER_CC_CTRL_INSEL_DEFAULT 0x00000000UL
604 #define _TIMER_CC_CTRL_INSEL_PIN 0x00000000UL
605 #define _TIMER_CC_CTRL_INSEL_PRS 0x00000001UL
606 #define TIMER_CC_CTRL_INSEL_DEFAULT (_TIMER_CC_CTRL_INSEL_DEFAULT << 20)
607 #define TIMER_CC_CTRL_INSEL_PIN (_TIMER_CC_CTRL_INSEL_PIN << 20)
608 #define TIMER_CC_CTRL_INSEL_PRS (_TIMER_CC_CTRL_INSEL_PRS << 20)
609 #define TIMER_CC_CTRL_FILT (0x1UL << 21)
610 #define _TIMER_CC_CTRL_FILT_SHIFT 21
611 #define _TIMER_CC_CTRL_FILT_MASK 0x200000UL
612 #define _TIMER_CC_CTRL_FILT_DEFAULT 0x00000000UL
613 #define _TIMER_CC_CTRL_FILT_DISABLE 0x00000000UL
614 #define _TIMER_CC_CTRL_FILT_ENABLE 0x00000001UL
615 #define TIMER_CC_CTRL_FILT_DEFAULT (_TIMER_CC_CTRL_FILT_DEFAULT << 21)
616 #define TIMER_CC_CTRL_FILT_DISABLE (_TIMER_CC_CTRL_FILT_DISABLE << 21)
617 #define TIMER_CC_CTRL_FILT_ENABLE (_TIMER_CC_CTRL_FILT_ENABLE << 21)
618 #define _TIMER_CC_CTRL_ICEDGE_SHIFT 24
619 #define _TIMER_CC_CTRL_ICEDGE_MASK 0x3000000UL
620 #define _TIMER_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL
621 #define _TIMER_CC_CTRL_ICEDGE_RISING 0x00000000UL
622 #define _TIMER_CC_CTRL_ICEDGE_FALLING 0x00000001UL
623 #define _TIMER_CC_CTRL_ICEDGE_BOTH 0x00000002UL
624 #define _TIMER_CC_CTRL_ICEDGE_NONE 0x00000003UL
625 #define TIMER_CC_CTRL_ICEDGE_DEFAULT (_TIMER_CC_CTRL_ICEDGE_DEFAULT << 24)
626 #define TIMER_CC_CTRL_ICEDGE_RISING (_TIMER_CC_CTRL_ICEDGE_RISING << 24)
627 #define TIMER_CC_CTRL_ICEDGE_FALLING (_TIMER_CC_CTRL_ICEDGE_FALLING << 24)
628 #define TIMER_CC_CTRL_ICEDGE_BOTH (_TIMER_CC_CTRL_ICEDGE_BOTH << 24)
629 #define TIMER_CC_CTRL_ICEDGE_NONE (_TIMER_CC_CTRL_ICEDGE_NONE << 24)
630 #define _TIMER_CC_CTRL_ICEVCTRL_SHIFT 26
631 #define _TIMER_CC_CTRL_ICEVCTRL_MASK 0xC000000UL
632 #define _TIMER_CC_CTRL_ICEVCTRL_DEFAULT 0x00000000UL
633 #define _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE 0x00000000UL
634 #define _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE 0x00000001UL
635 #define _TIMER_CC_CTRL_ICEVCTRL_RISING 0x00000002UL
636 #define _TIMER_CC_CTRL_ICEVCTRL_FALLING 0x00000003UL
637 #define TIMER_CC_CTRL_ICEVCTRL_DEFAULT (_TIMER_CC_CTRL_ICEVCTRL_DEFAULT << 26)
638 #define TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE << 26)
639 #define TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE << 26)
640 #define TIMER_CC_CTRL_ICEVCTRL_RISING (_TIMER_CC_CTRL_ICEVCTRL_RISING << 26)
641 #define TIMER_CC_CTRL_ICEVCTRL_FALLING (_TIMER_CC_CTRL_ICEVCTRL_FALLING << 26)
643 /* Bit fields for TIMER CC_CCV */
644 #define _TIMER_CC_CCV_RESETVALUE 0x00000000UL
645 #define _TIMER_CC_CCV_MASK 0x0000FFFFUL
646 #define _TIMER_CC_CCV_CCV_SHIFT 0
647 #define _TIMER_CC_CCV_CCV_MASK 0xFFFFUL
648 #define _TIMER_CC_CCV_CCV_DEFAULT 0x00000000UL
649 #define TIMER_CC_CCV_CCV_DEFAULT (_TIMER_CC_CCV_CCV_DEFAULT << 0)
651 /* Bit fields for TIMER CC_CCVP */
652 #define _TIMER_CC_CCVP_RESETVALUE 0x00000000UL
653 #define _TIMER_CC_CCVP_MASK 0x0000FFFFUL
654 #define _TIMER_CC_CCVP_CCVP_SHIFT 0
655 #define _TIMER_CC_CCVP_CCVP_MASK 0xFFFFUL
656 #define _TIMER_CC_CCVP_CCVP_DEFAULT 0x00000000UL
657 #define TIMER_CC_CCVP_CCVP_DEFAULT (_TIMER_CC_CCVP_CCVP_DEFAULT << 0)
659 /* Bit fields for TIMER CC_CCVB */
660 #define _TIMER_CC_CCVB_RESETVALUE 0x00000000UL
661 #define _TIMER_CC_CCVB_MASK 0x0000FFFFUL
662 #define _TIMER_CC_CCVB_CCVB_SHIFT 0
663 #define _TIMER_CC_CCVB_CCVB_MASK 0xFFFFUL
664 #define _TIMER_CC_CCVB_CCVB_DEFAULT 0x00000000UL
665 #define TIMER_CC_CCVB_CCVB_DEFAULT (_TIMER_CC_CCVB_CCVB_DEFAULT << 0)
667 /* Bit fields for TIMER DTCTRL */
668 #define _TIMER_DTCTRL_RESETVALUE 0x00000000UL
669 #define _TIMER_DTCTRL_MASK 0x0100007FUL
670 #define TIMER_DTCTRL_DTEN (0x1UL << 0)
671 #define _TIMER_DTCTRL_DTEN_SHIFT 0
672 #define _TIMER_DTCTRL_DTEN_MASK 0x1UL
673 #define _TIMER_DTCTRL_DTEN_DEFAULT 0x00000000UL
674 #define TIMER_DTCTRL_DTEN_DEFAULT (_TIMER_DTCTRL_DTEN_DEFAULT << 0)
675 #define TIMER_DTCTRL_DTDAS (0x1UL << 1)
676 #define _TIMER_DTCTRL_DTDAS_SHIFT 1
677 #define _TIMER_DTCTRL_DTDAS_MASK 0x2UL
678 #define _TIMER_DTCTRL_DTDAS_DEFAULT 0x00000000UL
679 #define _TIMER_DTCTRL_DTDAS_NORESTART 0x00000000UL
680 #define _TIMER_DTCTRL_DTDAS_RESTART 0x00000001UL
681 #define TIMER_DTCTRL_DTDAS_DEFAULT (_TIMER_DTCTRL_DTDAS_DEFAULT << 1)
682 #define TIMER_DTCTRL_DTDAS_NORESTART (_TIMER_DTCTRL_DTDAS_NORESTART << 1)
683 #define TIMER_DTCTRL_DTDAS_RESTART (_TIMER_DTCTRL_DTDAS_RESTART << 1)
684 #define TIMER_DTCTRL_DTIPOL (0x1UL << 2)
685 #define _TIMER_DTCTRL_DTIPOL_SHIFT 2
686 #define _TIMER_DTCTRL_DTIPOL_MASK 0x4UL
687 #define _TIMER_DTCTRL_DTIPOL_DEFAULT 0x00000000UL
688 #define TIMER_DTCTRL_DTIPOL_DEFAULT (_TIMER_DTCTRL_DTIPOL_DEFAULT << 2)
689 #define TIMER_DTCTRL_DTCINV (0x1UL << 3)
690 #define _TIMER_DTCTRL_DTCINV_SHIFT 3
691 #define _TIMER_DTCTRL_DTCINV_MASK 0x8UL
692 #define _TIMER_DTCTRL_DTCINV_DEFAULT 0x00000000UL
693 #define TIMER_DTCTRL_DTCINV_DEFAULT (_TIMER_DTCTRL_DTCINV_DEFAULT << 3)
694 #define _TIMER_DTCTRL_DTPRSSEL_SHIFT 4
695 #define _TIMER_DTCTRL_DTPRSSEL_MASK 0x70UL
696 #define _TIMER_DTCTRL_DTPRSSEL_DEFAULT 0x00000000UL
697 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH0 0x00000000UL
698 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH1 0x00000001UL
699 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH2 0x00000002UL
700 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH3 0x00000003UL
701 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH4 0x00000004UL
702 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH5 0x00000005UL
703 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH6 0x00000006UL
704 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH7 0x00000007UL
705 #define TIMER_DTCTRL_DTPRSSEL_DEFAULT (_TIMER_DTCTRL_DTPRSSEL_DEFAULT << 4)
706 #define TIMER_DTCTRL_DTPRSSEL_PRSCH0 (_TIMER_DTCTRL_DTPRSSEL_PRSCH0 << 4)
707 #define TIMER_DTCTRL_DTPRSSEL_PRSCH1 (_TIMER_DTCTRL_DTPRSSEL_PRSCH1 << 4)
708 #define TIMER_DTCTRL_DTPRSSEL_PRSCH2 (_TIMER_DTCTRL_DTPRSSEL_PRSCH2 << 4)
709 #define TIMER_DTCTRL_DTPRSSEL_PRSCH3 (_TIMER_DTCTRL_DTPRSSEL_PRSCH3 << 4)
710 #define TIMER_DTCTRL_DTPRSSEL_PRSCH4 (_TIMER_DTCTRL_DTPRSSEL_PRSCH4 << 4)
711 #define TIMER_DTCTRL_DTPRSSEL_PRSCH5 (_TIMER_DTCTRL_DTPRSSEL_PRSCH5 << 4)
712 #define TIMER_DTCTRL_DTPRSSEL_PRSCH6 (_TIMER_DTCTRL_DTPRSSEL_PRSCH6 << 4)
713 #define TIMER_DTCTRL_DTPRSSEL_PRSCH7 (_TIMER_DTCTRL_DTPRSSEL_PRSCH7 << 4)
714 #define TIMER_DTCTRL_DTPRSEN (0x1UL << 24)
715 #define _TIMER_DTCTRL_DTPRSEN_SHIFT 24
716 #define _TIMER_DTCTRL_DTPRSEN_MASK 0x1000000UL
717 #define _TIMER_DTCTRL_DTPRSEN_DEFAULT 0x00000000UL
718 #define TIMER_DTCTRL_DTPRSEN_DEFAULT (_TIMER_DTCTRL_DTPRSEN_DEFAULT << 24)
720 /* Bit fields for TIMER DTTIME */
721 #define _TIMER_DTTIME_RESETVALUE 0x00000000UL
722 #define _TIMER_DTTIME_MASK 0x003F3F0FUL
723 #define _TIMER_DTTIME_DTPRESC_SHIFT 0
724 #define _TIMER_DTTIME_DTPRESC_MASK 0xFUL
725 #define _TIMER_DTTIME_DTPRESC_DEFAULT 0x00000000UL
726 #define _TIMER_DTTIME_DTPRESC_DIV1 0x00000000UL
727 #define _TIMER_DTTIME_DTPRESC_DIV2 0x00000001UL
728 #define _TIMER_DTTIME_DTPRESC_DIV4 0x00000002UL
729 #define _TIMER_DTTIME_DTPRESC_DIV8 0x00000003UL
730 #define _TIMER_DTTIME_DTPRESC_DIV16 0x00000004UL
731 #define _TIMER_DTTIME_DTPRESC_DIV32 0x00000005UL
732 #define _TIMER_DTTIME_DTPRESC_DIV64 0x00000006UL
733 #define _TIMER_DTTIME_DTPRESC_DIV128 0x00000007UL
734 #define _TIMER_DTTIME_DTPRESC_DIV256 0x00000008UL
735 #define _TIMER_DTTIME_DTPRESC_DIV512 0x00000009UL
736 #define _TIMER_DTTIME_DTPRESC_DIV1024 0x0000000AUL
737 #define TIMER_DTTIME_DTPRESC_DEFAULT (_TIMER_DTTIME_DTPRESC_DEFAULT << 0)
738 #define TIMER_DTTIME_DTPRESC_DIV1 (_TIMER_DTTIME_DTPRESC_DIV1 << 0)
739 #define TIMER_DTTIME_DTPRESC_DIV2 (_TIMER_DTTIME_DTPRESC_DIV2 << 0)
740 #define TIMER_DTTIME_DTPRESC_DIV4 (_TIMER_DTTIME_DTPRESC_DIV4 << 0)
741 #define TIMER_DTTIME_DTPRESC_DIV8 (_TIMER_DTTIME_DTPRESC_DIV8 << 0)
742 #define TIMER_DTTIME_DTPRESC_DIV16 (_TIMER_DTTIME_DTPRESC_DIV16 << 0)
743 #define TIMER_DTTIME_DTPRESC_DIV32 (_TIMER_DTTIME_DTPRESC_DIV32 << 0)
744 #define TIMER_DTTIME_DTPRESC_DIV64 (_TIMER_DTTIME_DTPRESC_DIV64 << 0)
745 #define TIMER_DTTIME_DTPRESC_DIV128 (_TIMER_DTTIME_DTPRESC_DIV128 << 0)
746 #define TIMER_DTTIME_DTPRESC_DIV256 (_TIMER_DTTIME_DTPRESC_DIV256 << 0)
747 #define TIMER_DTTIME_DTPRESC_DIV512 (_TIMER_DTTIME_DTPRESC_DIV512 << 0)
748 #define TIMER_DTTIME_DTPRESC_DIV1024 (_TIMER_DTTIME_DTPRESC_DIV1024 << 0)
749 #define _TIMER_DTTIME_DTRISET_SHIFT 8
750 #define _TIMER_DTTIME_DTRISET_MASK 0x3F00UL
751 #define _TIMER_DTTIME_DTRISET_DEFAULT 0x00000000UL
752 #define TIMER_DTTIME_DTRISET_DEFAULT (_TIMER_DTTIME_DTRISET_DEFAULT << 8)
753 #define _TIMER_DTTIME_DTFALLT_SHIFT 16
754 #define _TIMER_DTTIME_DTFALLT_MASK 0x3F0000UL
755 #define _TIMER_DTTIME_DTFALLT_DEFAULT 0x00000000UL
756 #define TIMER_DTTIME_DTFALLT_DEFAULT (_TIMER_DTTIME_DTFALLT_DEFAULT << 16)
758 /* Bit fields for TIMER DTFC */
759 #define _TIMER_DTFC_RESETVALUE 0x00000000UL
760 #define _TIMER_DTFC_MASK 0x0F030707UL
761 #define _TIMER_DTFC_DTPRS0FSEL_SHIFT 0
762 #define _TIMER_DTFC_DTPRS0FSEL_MASK 0x7UL
763 #define _TIMER_DTFC_DTPRS0FSEL_DEFAULT 0x00000000UL
764 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH0 0x00000000UL
765 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH1 0x00000001UL
766 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH2 0x00000002UL
767 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH3 0x00000003UL
768 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH4 0x00000004UL
769 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH5 0x00000005UL
770 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH6 0x00000006UL
771 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH7 0x00000007UL
772 #define TIMER_DTFC_DTPRS0FSEL_DEFAULT (_TIMER_DTFC_DTPRS0FSEL_DEFAULT << 0)
773 #define TIMER_DTFC_DTPRS0FSEL_PRSCH0 (_TIMER_DTFC_DTPRS0FSEL_PRSCH0 << 0)
774 #define TIMER_DTFC_DTPRS0FSEL_PRSCH1 (_TIMER_DTFC_DTPRS0FSEL_PRSCH1 << 0)
775 #define TIMER_DTFC_DTPRS0FSEL_PRSCH2 (_TIMER_DTFC_DTPRS0FSEL_PRSCH2 << 0)
776 #define TIMER_DTFC_DTPRS0FSEL_PRSCH3 (_TIMER_DTFC_DTPRS0FSEL_PRSCH3 << 0)
777 #define TIMER_DTFC_DTPRS0FSEL_PRSCH4 (_TIMER_DTFC_DTPRS0FSEL_PRSCH4 << 0)
778 #define TIMER_DTFC_DTPRS0FSEL_PRSCH5 (_TIMER_DTFC_DTPRS0FSEL_PRSCH5 << 0)
779 #define TIMER_DTFC_DTPRS0FSEL_PRSCH6 (_TIMER_DTFC_DTPRS0FSEL_PRSCH6 << 0)
780 #define TIMER_DTFC_DTPRS0FSEL_PRSCH7 (_TIMER_DTFC_DTPRS0FSEL_PRSCH7 << 0)
781 #define _TIMER_DTFC_DTPRS1FSEL_SHIFT 8
782 #define _TIMER_DTFC_DTPRS1FSEL_MASK 0x700UL
783 #define _TIMER_DTFC_DTPRS1FSEL_DEFAULT 0x00000000UL
784 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH0 0x00000000UL
785 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH1 0x00000001UL
786 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH2 0x00000002UL
787 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH3 0x00000003UL
788 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH4 0x00000004UL
789 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH5 0x00000005UL
790 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH6 0x00000006UL
791 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH7 0x00000007UL
792 #define TIMER_DTFC_DTPRS1FSEL_DEFAULT (_TIMER_DTFC_DTPRS1FSEL_DEFAULT << 8)
793 #define TIMER_DTFC_DTPRS1FSEL_PRSCH0 (_TIMER_DTFC_DTPRS1FSEL_PRSCH0 << 8)
794 #define TIMER_DTFC_DTPRS1FSEL_PRSCH1 (_TIMER_DTFC_DTPRS1FSEL_PRSCH1 << 8)
795 #define TIMER_DTFC_DTPRS1FSEL_PRSCH2 (_TIMER_DTFC_DTPRS1FSEL_PRSCH2 << 8)
796 #define TIMER_DTFC_DTPRS1FSEL_PRSCH3 (_TIMER_DTFC_DTPRS1FSEL_PRSCH3 << 8)
797 #define TIMER_DTFC_DTPRS1FSEL_PRSCH4 (_TIMER_DTFC_DTPRS1FSEL_PRSCH4 << 8)
798 #define TIMER_DTFC_DTPRS1FSEL_PRSCH5 (_TIMER_DTFC_DTPRS1FSEL_PRSCH5 << 8)
799 #define TIMER_DTFC_DTPRS1FSEL_PRSCH6 (_TIMER_DTFC_DTPRS1FSEL_PRSCH6 << 8)
800 #define TIMER_DTFC_DTPRS1FSEL_PRSCH7 (_TIMER_DTFC_DTPRS1FSEL_PRSCH7 << 8)
801 #define _TIMER_DTFC_DTFA_SHIFT 16
802 #define _TIMER_DTFC_DTFA_MASK 0x30000UL
803 #define _TIMER_DTFC_DTFA_DEFAULT 0x00000000UL
804 #define _TIMER_DTFC_DTFA_NONE 0x00000000UL
805 #define _TIMER_DTFC_DTFA_INACTIVE 0x00000001UL
806 #define _TIMER_DTFC_DTFA_CLEAR 0x00000002UL
807 #define _TIMER_DTFC_DTFA_TRISTATE 0x00000003UL
808 #define TIMER_DTFC_DTFA_DEFAULT (_TIMER_DTFC_DTFA_DEFAULT << 16)
809 #define TIMER_DTFC_DTFA_NONE (_TIMER_DTFC_DTFA_NONE << 16)
810 #define TIMER_DTFC_DTFA_INACTIVE (_TIMER_DTFC_DTFA_INACTIVE << 16)
811 #define TIMER_DTFC_DTFA_CLEAR (_TIMER_DTFC_DTFA_CLEAR << 16)
812 #define TIMER_DTFC_DTFA_TRISTATE (_TIMER_DTFC_DTFA_TRISTATE << 16)
813 #define TIMER_DTFC_DTPRS0FEN (0x1UL << 24)
814 #define _TIMER_DTFC_DTPRS0FEN_SHIFT 24
815 #define _TIMER_DTFC_DTPRS0FEN_MASK 0x1000000UL
816 #define _TIMER_DTFC_DTPRS0FEN_DEFAULT 0x00000000UL
817 #define TIMER_DTFC_DTPRS0FEN_DEFAULT (_TIMER_DTFC_DTPRS0FEN_DEFAULT << 24)
818 #define TIMER_DTFC_DTPRS1FEN (0x1UL << 25)
819 #define _TIMER_DTFC_DTPRS1FEN_SHIFT 25
820 #define _TIMER_DTFC_DTPRS1FEN_MASK 0x2000000UL
821 #define _TIMER_DTFC_DTPRS1FEN_DEFAULT 0x00000000UL
822 #define TIMER_DTFC_DTPRS1FEN_DEFAULT (_TIMER_DTFC_DTPRS1FEN_DEFAULT << 25)
823 #define TIMER_DTFC_DTDBGFEN (0x1UL << 26)
824 #define _TIMER_DTFC_DTDBGFEN_SHIFT 26
825 #define _TIMER_DTFC_DTDBGFEN_MASK 0x4000000UL
826 #define _TIMER_DTFC_DTDBGFEN_DEFAULT 0x00000000UL
827 #define TIMER_DTFC_DTDBGFEN_DEFAULT (_TIMER_DTFC_DTDBGFEN_DEFAULT << 26)
828 #define TIMER_DTFC_DTLOCKUPFEN (0x1UL << 27)
829 #define _TIMER_DTFC_DTLOCKUPFEN_SHIFT 27
830 #define _TIMER_DTFC_DTLOCKUPFEN_MASK 0x8000000UL
831 #define _TIMER_DTFC_DTLOCKUPFEN_DEFAULT 0x00000000UL
832 #define TIMER_DTFC_DTLOCKUPFEN_DEFAULT (_TIMER_DTFC_DTLOCKUPFEN_DEFAULT << 27)
834 /* Bit fields for TIMER DTOGEN */
835 #define _TIMER_DTOGEN_RESETVALUE 0x00000000UL
836 #define _TIMER_DTOGEN_MASK 0x0000003FUL
837 #define TIMER_DTOGEN_DTOGCC0EN (0x1UL << 0)
838 #define _TIMER_DTOGEN_DTOGCC0EN_SHIFT 0
839 #define _TIMER_DTOGEN_DTOGCC0EN_MASK 0x1UL
840 #define _TIMER_DTOGEN_DTOGCC0EN_DEFAULT 0x00000000UL
841 #define TIMER_DTOGEN_DTOGCC0EN_DEFAULT (_TIMER_DTOGEN_DTOGCC0EN_DEFAULT << 0)
842 #define TIMER_DTOGEN_DTOGCC1EN (0x1UL << 1)
843 #define _TIMER_DTOGEN_DTOGCC1EN_SHIFT 1
844 #define _TIMER_DTOGEN_DTOGCC1EN_MASK 0x2UL
845 #define _TIMER_DTOGEN_DTOGCC1EN_DEFAULT 0x00000000UL
846 #define TIMER_DTOGEN_DTOGCC1EN_DEFAULT (_TIMER_DTOGEN_DTOGCC1EN_DEFAULT << 1)
847 #define TIMER_DTOGEN_DTOGCC2EN (0x1UL << 2)
848 #define _TIMER_DTOGEN_DTOGCC2EN_SHIFT 2
849 #define _TIMER_DTOGEN_DTOGCC2EN_MASK 0x4UL
850 #define _TIMER_DTOGEN_DTOGCC2EN_DEFAULT 0x00000000UL
851 #define TIMER_DTOGEN_DTOGCC2EN_DEFAULT (_TIMER_DTOGEN_DTOGCC2EN_DEFAULT << 2)
852 #define TIMER_DTOGEN_DTOGCDTI0EN (0x1UL << 3)
853 #define _TIMER_DTOGEN_DTOGCDTI0EN_SHIFT 3
854 #define _TIMER_DTOGEN_DTOGCDTI0EN_MASK 0x8UL
855 #define _TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT 0x00000000UL
856 #define TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT << 3)
857 #define TIMER_DTOGEN_DTOGCDTI1EN (0x1UL << 4)
858 #define _TIMER_DTOGEN_DTOGCDTI1EN_SHIFT 4
859 #define _TIMER_DTOGEN_DTOGCDTI1EN_MASK 0x10UL
860 #define _TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT 0x00000000UL
861 #define TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT << 4)
862 #define TIMER_DTOGEN_DTOGCDTI2EN (0x1UL << 5)
863 #define _TIMER_DTOGEN_DTOGCDTI2EN_SHIFT 5
864 #define _TIMER_DTOGEN_DTOGCDTI2EN_MASK 0x20UL
865 #define _TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT 0x00000000UL
866 #define TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT << 5)
868 /* Bit fields for TIMER DTFAULT */
869 #define _TIMER_DTFAULT_RESETVALUE 0x00000000UL
870 #define _TIMER_DTFAULT_MASK 0x0000000FUL
871 #define TIMER_DTFAULT_DTPRS0F (0x1UL << 0)
872 #define _TIMER_DTFAULT_DTPRS0F_SHIFT 0
873 #define _TIMER_DTFAULT_DTPRS0F_MASK 0x1UL
874 #define _TIMER_DTFAULT_DTPRS0F_DEFAULT 0x00000000UL
875 #define TIMER_DTFAULT_DTPRS0F_DEFAULT (_TIMER_DTFAULT_DTPRS0F_DEFAULT << 0)
876 #define TIMER_DTFAULT_DTPRS1F (0x1UL << 1)
877 #define _TIMER_DTFAULT_DTPRS1F_SHIFT 1
878 #define _TIMER_DTFAULT_DTPRS1F_MASK 0x2UL
879 #define _TIMER_DTFAULT_DTPRS1F_DEFAULT 0x00000000UL
880 #define TIMER_DTFAULT_DTPRS1F_DEFAULT (_TIMER_DTFAULT_DTPRS1F_DEFAULT << 1)
881 #define TIMER_DTFAULT_DTDBGF (0x1UL << 2)
882 #define _TIMER_DTFAULT_DTDBGF_SHIFT 2
883 #define _TIMER_DTFAULT_DTDBGF_MASK 0x4UL
884 #define _TIMER_DTFAULT_DTDBGF_DEFAULT 0x00000000UL
885 #define TIMER_DTFAULT_DTDBGF_DEFAULT (_TIMER_DTFAULT_DTDBGF_DEFAULT << 2)
886 #define TIMER_DTFAULT_DTLOCKUPF (0x1UL << 3)
887 #define _TIMER_DTFAULT_DTLOCKUPF_SHIFT 3
888 #define _TIMER_DTFAULT_DTLOCKUPF_MASK 0x8UL
889 #define _TIMER_DTFAULT_DTLOCKUPF_DEFAULT 0x00000000UL
890 #define TIMER_DTFAULT_DTLOCKUPF_DEFAULT (_TIMER_DTFAULT_DTLOCKUPF_DEFAULT << 3)
892 /* Bit fields for TIMER DTFAULTC */
893 #define _TIMER_DTFAULTC_RESETVALUE 0x00000000UL
894 #define _TIMER_DTFAULTC_MASK 0x0000000FUL
895 #define TIMER_DTFAULTC_DTPRS0FC (0x1UL << 0)
896 #define _TIMER_DTFAULTC_DTPRS0FC_SHIFT 0
897 #define _TIMER_DTFAULTC_DTPRS0FC_MASK 0x1UL
898 #define _TIMER_DTFAULTC_DTPRS0FC_DEFAULT 0x00000000UL
899 #define TIMER_DTFAULTC_DTPRS0FC_DEFAULT (_TIMER_DTFAULTC_DTPRS0FC_DEFAULT << 0)
900 #define TIMER_DTFAULTC_DTPRS1FC (0x1UL << 1)
901 #define _TIMER_DTFAULTC_DTPRS1FC_SHIFT 1
902 #define _TIMER_DTFAULTC_DTPRS1FC_MASK 0x2UL
903 #define _TIMER_DTFAULTC_DTPRS1FC_DEFAULT 0x00000000UL
904 #define TIMER_DTFAULTC_DTPRS1FC_DEFAULT (_TIMER_DTFAULTC_DTPRS1FC_DEFAULT << 1)
905 #define TIMER_DTFAULTC_DTDBGFC (0x1UL << 2)
906 #define _TIMER_DTFAULTC_DTDBGFC_SHIFT 2
907 #define _TIMER_DTFAULTC_DTDBGFC_MASK 0x4UL
908 #define _TIMER_DTFAULTC_DTDBGFC_DEFAULT 0x00000000UL
909 #define TIMER_DTFAULTC_DTDBGFC_DEFAULT (_TIMER_DTFAULTC_DTDBGFC_DEFAULT << 2)
910 #define TIMER_DTFAULTC_TLOCKUPFC (0x1UL << 3)
911 #define _TIMER_DTFAULTC_TLOCKUPFC_SHIFT 3
912 #define _TIMER_DTFAULTC_TLOCKUPFC_MASK 0x8UL
913 #define _TIMER_DTFAULTC_TLOCKUPFC_DEFAULT 0x00000000UL
914 #define TIMER_DTFAULTC_TLOCKUPFC_DEFAULT (_TIMER_DTFAULTC_TLOCKUPFC_DEFAULT << 3)
916 /* Bit fields for TIMER DTLOCK */
917 #define _TIMER_DTLOCK_RESETVALUE 0x00000000UL
918 #define _TIMER_DTLOCK_MASK 0x0000FFFFUL
919 #define _TIMER_DTLOCK_LOCKKEY_SHIFT 0
920 #define _TIMER_DTLOCK_LOCKKEY_MASK 0xFFFFUL
921 #define _TIMER_DTLOCK_LOCKKEY_DEFAULT 0x00000000UL
922 #define _TIMER_DTLOCK_LOCKKEY_LOCK 0x00000000UL
923 #define _TIMER_DTLOCK_LOCKKEY_UNLOCKED 0x00000000UL
924 #define _TIMER_DTLOCK_LOCKKEY_LOCKED 0x00000001UL
925 #define _TIMER_DTLOCK_LOCKKEY_UNLOCK 0x0000CE80UL
926 #define TIMER_DTLOCK_LOCKKEY_DEFAULT (_TIMER_DTLOCK_LOCKKEY_DEFAULT << 0)
927 #define TIMER_DTLOCK_LOCKKEY_LOCK (_TIMER_DTLOCK_LOCKKEY_LOCK << 0)
928 #define TIMER_DTLOCK_LOCKKEY_UNLOCKED (_TIMER_DTLOCK_LOCKKEY_UNLOCKED << 0)
929 #define TIMER_DTLOCK_LOCKKEY_LOCKED (_TIMER_DTLOCK_LOCKKEY_LOCKED << 0)
930 #define TIMER_DTLOCK_LOCKKEY_UNLOCK (_TIMER_DTLOCK_LOCKKEY_UNLOCK << 0)
__IM uint32_t STATUS
Definition: efm32g_timer.h:45
__IOM uint32_t TOP
Definition: efm32g_timer.h:50
__IM uint32_t IF
Definition: efm32g_timer.h:47
__IOM uint32_t DTTIME
Definition: efm32g_timer.h:61
TIMER_CC EFM32G TIMER CC.
__IOM uint32_t TOPB
Definition: efm32g_timer.h:51
__OM uint32_t DTFAULTC
Definition: efm32g_timer.h:65
__IM uint32_t DTFAULT
Definition: efm32g_timer.h:64
__IOM uint32_t DTOGEN
Definition: efm32g_timer.h:63
__IOM uint32_t DTCTRL
Definition: efm32g_timer.h:60
__IOM uint32_t IFC
Definition: efm32g_timer.h:49
__IOM uint32_t CNT
Definition: efm32g_timer.h:52
__IOM uint32_t ROUTE
Definition: efm32g_timer.h:53
__IOM uint32_t DTLOCK
Definition: efm32g_timer.h:66
__IOM uint32_t CMD
Definition: efm32g_timer.h:44
__IOM uint32_t IFS
Definition: efm32g_timer.h:48
__IOM uint32_t CTRL
Definition: efm32g_timer.h:43
__IOM uint32_t IEN
Definition: efm32g_timer.h:46
__IOM uint32_t DTFC
Definition: efm32g_timer.h:62