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efm32g_dac.h
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1
/**************************************************************************/
32
/**************************************************************************/
36
/**************************************************************************/
41
typedef
struct
42
{
43
__IOM uint32_t
CTRL
;
44
__IM uint32_t
STATUS
;
45
__IOM uint32_t
CH0CTRL
;
46
__IOM uint32_t
CH1CTRL
;
47
__IOM uint32_t
IEN
;
48
__IM uint32_t
IF
;
49
__IOM uint32_t
IFS
;
50
__IOM uint32_t
IFC
;
51
__IOM uint32_t
CH0DATA
;
52
__IOM uint32_t
CH1DATA
;
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__IOM uint32_t
COMBDATA
;
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__IOM uint32_t
CAL
;
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__IOM uint32_t
BIASPROG
;
56
}
DAC_TypeDef
;
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/**************************************************************************/
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/* Bit fields for DAC CTRL */
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#define _DAC_CTRL_RESETVALUE 0x00000010UL
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#define _DAC_CTRL_MASK 0x003703FFUL
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#define DAC_CTRL_DIFF (0x1UL << 0)
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#define _DAC_CTRL_DIFF_SHIFT 0
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#define _DAC_CTRL_DIFF_MASK 0x1UL
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#define _DAC_CTRL_DIFF_DEFAULT 0x00000000UL
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#define DAC_CTRL_DIFF_DEFAULT (_DAC_CTRL_DIFF_DEFAULT << 0)
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#define DAC_CTRL_SINEMODE (0x1UL << 1)
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#define _DAC_CTRL_SINEMODE_SHIFT 1
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#define _DAC_CTRL_SINEMODE_MASK 0x2UL
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#define _DAC_CTRL_SINEMODE_DEFAULT 0x00000000UL
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#define DAC_CTRL_SINEMODE_DEFAULT (_DAC_CTRL_SINEMODE_DEFAULT << 1)
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#define _DAC_CTRL_CONVMODE_SHIFT 2
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#define _DAC_CTRL_CONVMODE_MASK 0xCUL
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#define _DAC_CTRL_CONVMODE_DEFAULT 0x00000000UL
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#define _DAC_CTRL_CONVMODE_CONTINUOUS 0x00000000UL
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#define _DAC_CTRL_CONVMODE_SAMPLEHOLD 0x00000001UL
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#define _DAC_CTRL_CONVMODE_SAMPLEOFF 0x00000002UL
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#define DAC_CTRL_CONVMODE_DEFAULT (_DAC_CTRL_CONVMODE_DEFAULT << 2)
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#define DAC_CTRL_CONVMODE_CONTINUOUS (_DAC_CTRL_CONVMODE_CONTINUOUS << 2)
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#define DAC_CTRL_CONVMODE_SAMPLEHOLD (_DAC_CTRL_CONVMODE_SAMPLEHOLD << 2)
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#define DAC_CTRL_CONVMODE_SAMPLEOFF (_DAC_CTRL_CONVMODE_SAMPLEOFF << 2)
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#define _DAC_CTRL_OUTMODE_SHIFT 4
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#define _DAC_CTRL_OUTMODE_MASK 0x30UL
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#define _DAC_CTRL_OUTMODE_DISABLE 0x00000000UL
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#define _DAC_CTRL_OUTMODE_DEFAULT 0x00000001UL
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#define _DAC_CTRL_OUTMODE_PIN 0x00000001UL
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#define _DAC_CTRL_OUTMODE_ADC 0x00000002UL
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#define _DAC_CTRL_OUTMODE_PINADC 0x00000003UL
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#define DAC_CTRL_OUTMODE_DISABLE (_DAC_CTRL_OUTMODE_DISABLE << 4)
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#define DAC_CTRL_OUTMODE_DEFAULT (_DAC_CTRL_OUTMODE_DEFAULT << 4)
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#define DAC_CTRL_OUTMODE_PIN (_DAC_CTRL_OUTMODE_PIN << 4)
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#define DAC_CTRL_OUTMODE_ADC (_DAC_CTRL_OUTMODE_ADC << 4)
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#define DAC_CTRL_OUTMODE_PINADC (_DAC_CTRL_OUTMODE_PINADC << 4)
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#define DAC_CTRL_OUTENPRS (0x1UL << 6)
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#define _DAC_CTRL_OUTENPRS_SHIFT 6
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#define _DAC_CTRL_OUTENPRS_MASK 0x40UL
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#define _DAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL
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#define DAC_CTRL_OUTENPRS_DEFAULT (_DAC_CTRL_OUTENPRS_DEFAULT << 6)
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#define DAC_CTRL_CH0PRESCRST (0x1UL << 7)
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#define _DAC_CTRL_CH0PRESCRST_SHIFT 7
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#define _DAC_CTRL_CH0PRESCRST_MASK 0x80UL
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#define _DAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL
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#define DAC_CTRL_CH0PRESCRST_DEFAULT (_DAC_CTRL_CH0PRESCRST_DEFAULT << 7)
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#define _DAC_CTRL_REFSEL_SHIFT 8
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#define _DAC_CTRL_REFSEL_MASK 0x300UL
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#define _DAC_CTRL_REFSEL_DEFAULT 0x00000000UL
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#define _DAC_CTRL_REFSEL_1V25 0x00000000UL
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#define _DAC_CTRL_REFSEL_2V5 0x00000001UL
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#define _DAC_CTRL_REFSEL_VDD 0x00000002UL
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#define DAC_CTRL_REFSEL_DEFAULT (_DAC_CTRL_REFSEL_DEFAULT << 8)
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#define DAC_CTRL_REFSEL_1V25 (_DAC_CTRL_REFSEL_1V25 << 8)
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#define DAC_CTRL_REFSEL_2V5 (_DAC_CTRL_REFSEL_2V5 << 8)
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#define DAC_CTRL_REFSEL_VDD (_DAC_CTRL_REFSEL_VDD << 8)
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#define _DAC_CTRL_PRESC_SHIFT 16
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#define _DAC_CTRL_PRESC_MASK 0x70000UL
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#define _DAC_CTRL_PRESC_DEFAULT 0x00000000UL
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#define _DAC_CTRL_PRESC_NODIVISION 0x00000000UL
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#define DAC_CTRL_PRESC_DEFAULT (_DAC_CTRL_PRESC_DEFAULT << 16)
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#define DAC_CTRL_PRESC_NODIVISION (_DAC_CTRL_PRESC_NODIVISION << 16)
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#define _DAC_CTRL_REFRSEL_SHIFT 20
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#define _DAC_CTRL_REFRSEL_MASK 0x300000UL
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#define _DAC_CTRL_REFRSEL_DEFAULT 0x00000000UL
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#define _DAC_CTRL_REFRSEL_8CYCLES 0x00000000UL
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#define _DAC_CTRL_REFRSEL_16CYCLES 0x00000001UL
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#define _DAC_CTRL_REFRSEL_32CYCLES 0x00000002UL
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#define _DAC_CTRL_REFRSEL_64CYCLES 0x00000003UL
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#define DAC_CTRL_REFRSEL_DEFAULT (_DAC_CTRL_REFRSEL_DEFAULT << 20)
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#define DAC_CTRL_REFRSEL_8CYCLES (_DAC_CTRL_REFRSEL_8CYCLES << 20)
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#define DAC_CTRL_REFRSEL_16CYCLES (_DAC_CTRL_REFRSEL_16CYCLES << 20)
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#define DAC_CTRL_REFRSEL_32CYCLES (_DAC_CTRL_REFRSEL_32CYCLES << 20)
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#define DAC_CTRL_REFRSEL_64CYCLES (_DAC_CTRL_REFRSEL_64CYCLES << 20)
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/* Bit fields for DAC STATUS */
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#define _DAC_STATUS_RESETVALUE 0x00000000UL
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#define _DAC_STATUS_MASK 0x00000003UL
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#define DAC_STATUS_CH0DV (0x1UL << 0)
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#define _DAC_STATUS_CH0DV_SHIFT 0
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#define _DAC_STATUS_CH0DV_MASK 0x1UL
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#define _DAC_STATUS_CH0DV_DEFAULT 0x00000000UL
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#define DAC_STATUS_CH0DV_DEFAULT (_DAC_STATUS_CH0DV_DEFAULT << 0)
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#define DAC_STATUS_CH1DV (0x1UL << 1)
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#define _DAC_STATUS_CH1DV_SHIFT 1
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#define _DAC_STATUS_CH1DV_MASK 0x2UL
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#define _DAC_STATUS_CH1DV_DEFAULT 0x00000000UL
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#define DAC_STATUS_CH1DV_DEFAULT (_DAC_STATUS_CH1DV_DEFAULT << 1)
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/* Bit fields for DAC CH0CTRL */
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#define _DAC_CH0CTRL_RESETVALUE 0x00000000UL
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#define _DAC_CH0CTRL_MASK 0x00000077UL
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#define DAC_CH0CTRL_EN (0x1UL << 0)
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#define _DAC_CH0CTRL_EN_SHIFT 0
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#define _DAC_CH0CTRL_EN_MASK 0x1UL
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#define _DAC_CH0CTRL_EN_DEFAULT 0x00000000UL
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#define DAC_CH0CTRL_EN_DEFAULT (_DAC_CH0CTRL_EN_DEFAULT << 0)
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#define DAC_CH0CTRL_REFREN (0x1UL << 1)
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#define _DAC_CH0CTRL_REFREN_SHIFT 1
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#define _DAC_CH0CTRL_REFREN_MASK 0x2UL
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#define _DAC_CH0CTRL_REFREN_DEFAULT 0x00000000UL
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#define DAC_CH0CTRL_REFREN_DEFAULT (_DAC_CH0CTRL_REFREN_DEFAULT << 1)
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#define DAC_CH0CTRL_PRSEN (0x1UL << 2)
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#define _DAC_CH0CTRL_PRSEN_SHIFT 2
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#define _DAC_CH0CTRL_PRSEN_MASK 0x4UL
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#define _DAC_CH0CTRL_PRSEN_DEFAULT 0x00000000UL
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#define DAC_CH0CTRL_PRSEN_DEFAULT (_DAC_CH0CTRL_PRSEN_DEFAULT << 2)
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#define _DAC_CH0CTRL_PRSSEL_SHIFT 4
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#define _DAC_CH0CTRL_PRSSEL_MASK 0x70UL
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#define _DAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL
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#define _DAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL
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#define DAC_CH0CTRL_PRSSEL_DEFAULT (_DAC_CH0CTRL_PRSSEL_DEFAULT << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH0 (_DAC_CH0CTRL_PRSSEL_PRSCH0 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH1 (_DAC_CH0CTRL_PRSSEL_PRSCH1 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH2 (_DAC_CH0CTRL_PRSSEL_PRSCH2 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH3 (_DAC_CH0CTRL_PRSSEL_PRSCH3 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH4 (_DAC_CH0CTRL_PRSSEL_PRSCH4 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH5 (_DAC_CH0CTRL_PRSSEL_PRSCH5 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH6 (_DAC_CH0CTRL_PRSSEL_PRSCH6 << 4)
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#define DAC_CH0CTRL_PRSSEL_PRSCH7 (_DAC_CH0CTRL_PRSSEL_PRSCH7 << 4)
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/* Bit fields for DAC CH1CTRL */
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#define _DAC_CH1CTRL_RESETVALUE 0x00000000UL
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#define _DAC_CH1CTRL_MASK 0x00000077UL
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#define DAC_CH1CTRL_EN (0x1UL << 0)
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#define _DAC_CH1CTRL_EN_SHIFT 0
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#define _DAC_CH1CTRL_EN_MASK 0x1UL
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#define _DAC_CH1CTRL_EN_DEFAULT 0x00000000UL
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#define DAC_CH1CTRL_EN_DEFAULT (_DAC_CH1CTRL_EN_DEFAULT << 0)
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#define DAC_CH1CTRL_REFREN (0x1UL << 1)
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#define _DAC_CH1CTRL_REFREN_SHIFT 1
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#define _DAC_CH1CTRL_REFREN_MASK 0x2UL
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#define _DAC_CH1CTRL_REFREN_DEFAULT 0x00000000UL
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#define DAC_CH1CTRL_REFREN_DEFAULT (_DAC_CH1CTRL_REFREN_DEFAULT << 1)
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#define DAC_CH1CTRL_PRSEN (0x1UL << 2)
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#define _DAC_CH1CTRL_PRSEN_SHIFT 2
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#define _DAC_CH1CTRL_PRSEN_MASK 0x4UL
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#define _DAC_CH1CTRL_PRSEN_DEFAULT 0x00000000UL
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#define DAC_CH1CTRL_PRSEN_DEFAULT (_DAC_CH1CTRL_PRSEN_DEFAULT << 2)
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#define _DAC_CH1CTRL_PRSSEL_SHIFT 4
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#define _DAC_CH1CTRL_PRSSEL_MASK 0x70UL
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#define _DAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL
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#define _DAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL
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#define DAC_CH1CTRL_PRSSEL_DEFAULT (_DAC_CH1CTRL_PRSSEL_DEFAULT << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH0 (_DAC_CH1CTRL_PRSSEL_PRSCH0 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH1 (_DAC_CH1CTRL_PRSSEL_PRSCH1 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH2 (_DAC_CH1CTRL_PRSSEL_PRSCH2 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH3 (_DAC_CH1CTRL_PRSSEL_PRSCH3 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH4 (_DAC_CH1CTRL_PRSSEL_PRSCH4 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH5 (_DAC_CH1CTRL_PRSSEL_PRSCH5 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH6 (_DAC_CH1CTRL_PRSSEL_PRSCH6 << 4)
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#define DAC_CH1CTRL_PRSSEL_PRSCH7 (_DAC_CH1CTRL_PRSSEL_PRSCH7 << 4)
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/* Bit fields for DAC IEN */
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#define _DAC_IEN_RESETVALUE 0x00000000UL
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#define _DAC_IEN_MASK 0x00000033UL
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#define DAC_IEN_CH0 (0x1UL << 0)
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#define _DAC_IEN_CH0_SHIFT 0
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#define _DAC_IEN_CH0_MASK 0x1UL
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#define _DAC_IEN_CH0_DEFAULT 0x00000000UL
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#define DAC_IEN_CH0_DEFAULT (_DAC_IEN_CH0_DEFAULT << 0)
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#define DAC_IEN_CH1 (0x1UL << 1)
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#define _DAC_IEN_CH1_SHIFT 1
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#define _DAC_IEN_CH1_MASK 0x2UL
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#define _DAC_IEN_CH1_DEFAULT 0x00000000UL
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#define DAC_IEN_CH1_DEFAULT (_DAC_IEN_CH1_DEFAULT << 1)
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#define DAC_IEN_CH0UF (0x1UL << 4)
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#define _DAC_IEN_CH0UF_SHIFT 4
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#define _DAC_IEN_CH0UF_MASK 0x10UL
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#define _DAC_IEN_CH0UF_DEFAULT 0x00000000UL
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#define DAC_IEN_CH0UF_DEFAULT (_DAC_IEN_CH0UF_DEFAULT << 4)
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#define DAC_IEN_CH1UF (0x1UL << 5)
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#define _DAC_IEN_CH1UF_SHIFT 5
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#define _DAC_IEN_CH1UF_MASK 0x20UL
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#define _DAC_IEN_CH1UF_DEFAULT 0x00000000UL
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#define DAC_IEN_CH1UF_DEFAULT (_DAC_IEN_CH1UF_DEFAULT << 5)
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/* Bit fields for DAC IF */
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#define _DAC_IF_RESETVALUE 0x00000000UL
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#define _DAC_IF_MASK 0x00000033UL
256
#define DAC_IF_CH0 (0x1UL << 0)
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#define _DAC_IF_CH0_SHIFT 0
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#define _DAC_IF_CH0_MASK 0x1UL
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#define _DAC_IF_CH0_DEFAULT 0x00000000UL
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#define DAC_IF_CH0_DEFAULT (_DAC_IF_CH0_DEFAULT << 0)
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#define DAC_IF_CH1 (0x1UL << 1)
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#define _DAC_IF_CH1_SHIFT 1
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#define _DAC_IF_CH1_MASK 0x2UL
264
#define _DAC_IF_CH1_DEFAULT 0x00000000UL
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#define DAC_IF_CH1_DEFAULT (_DAC_IF_CH1_DEFAULT << 1)
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#define DAC_IF_CH0UF (0x1UL << 4)
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#define _DAC_IF_CH0UF_SHIFT 4
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#define _DAC_IF_CH0UF_MASK 0x10UL
269
#define _DAC_IF_CH0UF_DEFAULT 0x00000000UL
270
#define DAC_IF_CH0UF_DEFAULT (_DAC_IF_CH0UF_DEFAULT << 4)
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#define DAC_IF_CH1UF (0x1UL << 5)
272
#define _DAC_IF_CH1UF_SHIFT 5
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#define _DAC_IF_CH1UF_MASK 0x20UL
274
#define _DAC_IF_CH1UF_DEFAULT 0x00000000UL
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#define DAC_IF_CH1UF_DEFAULT (_DAC_IF_CH1UF_DEFAULT << 5)
277
/* Bit fields for DAC IFS */
278
#define _DAC_IFS_RESETVALUE 0x00000000UL
279
#define _DAC_IFS_MASK 0x00000033UL
280
#define DAC_IFS_CH0 (0x1UL << 0)
281
#define _DAC_IFS_CH0_SHIFT 0
282
#define _DAC_IFS_CH0_MASK 0x1UL
283
#define _DAC_IFS_CH0_DEFAULT 0x00000000UL
284
#define DAC_IFS_CH0_DEFAULT (_DAC_IFS_CH0_DEFAULT << 0)
285
#define DAC_IFS_CH1 (0x1UL << 1)
286
#define _DAC_IFS_CH1_SHIFT 1
287
#define _DAC_IFS_CH1_MASK 0x2UL
288
#define _DAC_IFS_CH1_DEFAULT 0x00000000UL
289
#define DAC_IFS_CH1_DEFAULT (_DAC_IFS_CH1_DEFAULT << 1)
290
#define DAC_IFS_CH0UF (0x1UL << 4)
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#define _DAC_IFS_CH0UF_SHIFT 4
292
#define _DAC_IFS_CH0UF_MASK 0x10UL
293
#define _DAC_IFS_CH0UF_DEFAULT 0x00000000UL
294
#define DAC_IFS_CH0UF_DEFAULT (_DAC_IFS_CH0UF_DEFAULT << 4)
295
#define DAC_IFS_CH1UF (0x1UL << 5)
296
#define _DAC_IFS_CH1UF_SHIFT 5
297
#define _DAC_IFS_CH1UF_MASK 0x20UL
298
#define _DAC_IFS_CH1UF_DEFAULT 0x00000000UL
299
#define DAC_IFS_CH1UF_DEFAULT (_DAC_IFS_CH1UF_DEFAULT << 5)
301
/* Bit fields for DAC IFC */
302
#define _DAC_IFC_RESETVALUE 0x00000000UL
303
#define _DAC_IFC_MASK 0x00000033UL
304
#define DAC_IFC_CH0 (0x1UL << 0)
305
#define _DAC_IFC_CH0_SHIFT 0
306
#define _DAC_IFC_CH0_MASK 0x1UL
307
#define _DAC_IFC_CH0_DEFAULT 0x00000000UL
308
#define DAC_IFC_CH0_DEFAULT (_DAC_IFC_CH0_DEFAULT << 0)
309
#define DAC_IFC_CH1 (0x1UL << 1)
310
#define _DAC_IFC_CH1_SHIFT 1
311
#define _DAC_IFC_CH1_MASK 0x2UL
312
#define _DAC_IFC_CH1_DEFAULT 0x00000000UL
313
#define DAC_IFC_CH1_DEFAULT (_DAC_IFC_CH1_DEFAULT << 1)
314
#define DAC_IFC_CH0UF (0x1UL << 4)
315
#define _DAC_IFC_CH0UF_SHIFT 4
316
#define _DAC_IFC_CH0UF_MASK 0x10UL
317
#define _DAC_IFC_CH0UF_DEFAULT 0x00000000UL
318
#define DAC_IFC_CH0UF_DEFAULT (_DAC_IFC_CH0UF_DEFAULT << 4)
319
#define DAC_IFC_CH1UF (0x1UL << 5)
320
#define _DAC_IFC_CH1UF_SHIFT 5
321
#define _DAC_IFC_CH1UF_MASK 0x20UL
322
#define _DAC_IFC_CH1UF_DEFAULT 0x00000000UL
323
#define DAC_IFC_CH1UF_DEFAULT (_DAC_IFC_CH1UF_DEFAULT << 5)
325
/* Bit fields for DAC CH0DATA */
326
#define _DAC_CH0DATA_RESETVALUE 0x00000000UL
327
#define _DAC_CH0DATA_MASK 0x00000FFFUL
328
#define _DAC_CH0DATA_DATA_SHIFT 0
329
#define _DAC_CH0DATA_DATA_MASK 0xFFFUL
330
#define _DAC_CH0DATA_DATA_DEFAULT 0x00000000UL
331
#define DAC_CH0DATA_DATA_DEFAULT (_DAC_CH0DATA_DATA_DEFAULT << 0)
333
/* Bit fields for DAC CH1DATA */
334
#define _DAC_CH1DATA_RESETVALUE 0x00000000UL
335
#define _DAC_CH1DATA_MASK 0x00000FFFUL
336
#define _DAC_CH1DATA_DATA_SHIFT 0
337
#define _DAC_CH1DATA_DATA_MASK 0xFFFUL
338
#define _DAC_CH1DATA_DATA_DEFAULT 0x00000000UL
339
#define DAC_CH1DATA_DATA_DEFAULT (_DAC_CH1DATA_DATA_DEFAULT << 0)
341
/* Bit fields for DAC COMBDATA */
342
#define _DAC_COMBDATA_RESETVALUE 0x00000000UL
343
#define _DAC_COMBDATA_MASK 0x0FFF0FFFUL
344
#define _DAC_COMBDATA_CH0DATA_SHIFT 0
345
#define _DAC_COMBDATA_CH0DATA_MASK 0xFFFUL
346
#define _DAC_COMBDATA_CH0DATA_DEFAULT 0x00000000UL
347
#define DAC_COMBDATA_CH0DATA_DEFAULT (_DAC_COMBDATA_CH0DATA_DEFAULT << 0)
348
#define _DAC_COMBDATA_CH1DATA_SHIFT 16
349
#define _DAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL
350
#define _DAC_COMBDATA_CH1DATA_DEFAULT 0x00000000UL
351
#define DAC_COMBDATA_CH1DATA_DEFAULT (_DAC_COMBDATA_CH1DATA_DEFAULT << 16)
353
/* Bit fields for DAC CAL */
354
#define _DAC_CAL_RESETVALUE 0x00400000UL
355
#define _DAC_CAL_MASK 0x007F3F3FUL
356
#define _DAC_CAL_CH0OFFSET_SHIFT 0
357
#define _DAC_CAL_CH0OFFSET_MASK 0x3FUL
358
#define _DAC_CAL_CH0OFFSET_DEFAULT 0x00000000UL
359
#define DAC_CAL_CH0OFFSET_DEFAULT (_DAC_CAL_CH0OFFSET_DEFAULT << 0)
360
#define _DAC_CAL_CH1OFFSET_SHIFT 8
361
#define _DAC_CAL_CH1OFFSET_MASK 0x3F00UL
362
#define _DAC_CAL_CH1OFFSET_DEFAULT 0x00000000UL
363
#define DAC_CAL_CH1OFFSET_DEFAULT (_DAC_CAL_CH1OFFSET_DEFAULT << 8)
364
#define _DAC_CAL_GAIN_SHIFT 16
365
#define _DAC_CAL_GAIN_MASK 0x7F0000UL
366
#define _DAC_CAL_GAIN_DEFAULT 0x00000040UL
367
#define DAC_CAL_GAIN_DEFAULT (_DAC_CAL_GAIN_DEFAULT << 16)
369
/* Bit fields for DAC BIASPROG */
370
#define _DAC_BIASPROG_RESETVALUE 0x00000047UL
371
#define _DAC_BIASPROG_MASK 0x0000004FUL
372
#define _DAC_BIASPROG_BIASPROG_SHIFT 0
373
#define _DAC_BIASPROG_BIASPROG_MASK 0xFUL
374
#define _DAC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL
375
#define DAC_BIASPROG_BIASPROG_DEFAULT (_DAC_BIASPROG_BIASPROG_DEFAULT << 0)
376
#define DAC_BIASPROG_HALFBIAS (0x1UL << 6)
377
#define _DAC_BIASPROG_HALFBIAS_SHIFT 6
378
#define _DAC_BIASPROG_HALFBIAS_MASK 0x40UL
379
#define _DAC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL
380
#define DAC_BIASPROG_HALFBIAS_DEFAULT (_DAC_BIASPROG_HALFBIAS_DEFAULT << 6)
DAC_TypeDef::IEN
__IOM uint32_t IEN
Definition:
efm32g_dac.h:47
DAC_TypeDef::CH0DATA
__IOM uint32_t CH0DATA
Definition:
efm32g_dac.h:51
DAC_TypeDef::CH1CTRL
__IOM uint32_t CH1CTRL
Definition:
efm32g_dac.h:46
DAC_TypeDef
Definition:
efm32g_dac.h:41
DAC_TypeDef::COMBDATA
__IOM uint32_t COMBDATA
Definition:
efm32g_dac.h:53
DAC_TypeDef::IFC
__IOM uint32_t IFC
Definition:
efm32g_dac.h:50
DAC_TypeDef::CAL
__IOM uint32_t CAL
Definition:
efm32g_dac.h:54
DAC_TypeDef::IF
__IM uint32_t IF
Definition:
efm32g_dac.h:48
DAC_TypeDef::CH1DATA
__IOM uint32_t CH1DATA
Definition:
efm32g_dac.h:52
DAC_TypeDef::CTRL
__IOM uint32_t CTRL
Definition:
efm32g_dac.h:43
DAC_TypeDef::IFS
__IOM uint32_t IFS
Definition:
efm32g_dac.h:49
DAC_TypeDef::STATUS
__IM uint32_t STATUS
Definition:
efm32g_dac.h:44
DAC_TypeDef::CH0CTRL
__IOM uint32_t CH0CTRL
Definition:
efm32g_dac.h:45
DAC_TypeDef::BIASPROG
__IOM uint32_t BIASPROG
Definition:
efm32g_dac.h:55
platform
Device
SiliconLabs
EFM32G
Include
efm32g_dac.h
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