EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-5.1.2
em_idac.h
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1 /***************************************************************************/
33 #ifndef EM_IDAC_H
34 #define EM_IDAC_H
35 
36 #include "em_device.h"
37 
38 #if defined(IDAC_COUNT) && (IDAC_COUNT > 0)
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
84 #define IDAC_REF_VALID(ref) ((ref) == IDAC0)
85 
88 /*******************************************************************************
89  ******************************** ENUMS ************************************
90  ******************************************************************************/
91 
93 typedef enum
94 {
95 #if defined( _IDAC_CTRL_OUTMODE_MASK )
96  idacOutputPin = IDAC_CTRL_OUTMODE_PIN,
97  idacOutputADC = IDAC_CTRL_OUTMODE_ADC
98 #elif ( _IDAC_CTRL_APORTOUTSEL_MASK )
99  idacOutputAPORT1XCH0 = IDAC_CTRL_APORTOUTSEL_APORT1XCH0,
100  idacOutputAPORT1YCH1 = IDAC_CTRL_APORTOUTSEL_APORT1YCH1,
101  idacOutputAPORT1XCH2 = IDAC_CTRL_APORTOUTSEL_APORT1XCH2,
102  idacOutputAPORT1YCH3 = IDAC_CTRL_APORTOUTSEL_APORT1YCH3,
103  idacOutputAPORT1XCH4 = IDAC_CTRL_APORTOUTSEL_APORT1XCH4,
104  idacOutputAPORT1YCH5 = IDAC_CTRL_APORTOUTSEL_APORT1YCH5,
105  idacOutputAPORT1XCH6 = IDAC_CTRL_APORTOUTSEL_APORT1XCH6,
106  idacOutputAPORT1YCH7 = IDAC_CTRL_APORTOUTSEL_APORT1YCH7,
107  idacOutputAPORT1XCH8 = IDAC_CTRL_APORTOUTSEL_APORT1XCH8,
108  idacOutputAPORT1YCH9 = IDAC_CTRL_APORTOUTSEL_APORT1YCH9,
109  idacOutputAPORT1XCH10 = IDAC_CTRL_APORTOUTSEL_APORT1XCH10,
110  idacOutputAPORT1YCH11 = IDAC_CTRL_APORTOUTSEL_APORT1YCH11,
111  idacOutputAPORT1XCH12 = IDAC_CTRL_APORTOUTSEL_APORT1XCH12,
112  idacOutputAPORT1YCH13 = IDAC_CTRL_APORTOUTSEL_APORT1YCH13,
113  idacOutputAPORT1XCH14 = IDAC_CTRL_APORTOUTSEL_APORT1XCH14,
114  idacOutputAPORT1YCH15 = IDAC_CTRL_APORTOUTSEL_APORT1YCH15,
115  idacOutputAPORT1XCH16 = IDAC_CTRL_APORTOUTSEL_APORT1XCH16,
116  idacOutputAPORT1YCH17 = IDAC_CTRL_APORTOUTSEL_APORT1YCH17,
117  idacOutputAPORT1XCH18 = IDAC_CTRL_APORTOUTSEL_APORT1XCH18,
118  idacOutputAPORT1YCH19 = IDAC_CTRL_APORTOUTSEL_APORT1YCH19,
119  idacOutputAPORT1XCH20 = IDAC_CTRL_APORTOUTSEL_APORT1XCH20,
120  idacOutputAPORT1YCH21 = IDAC_CTRL_APORTOUTSEL_APORT1YCH21,
121  idacOutputAPORT1XCH22 = IDAC_CTRL_APORTOUTSEL_APORT1XCH22,
122  idacOutputAPORT1YCH23 = IDAC_CTRL_APORTOUTSEL_APORT1YCH23,
123  idacOutputAPORT1XCH24 = IDAC_CTRL_APORTOUTSEL_APORT1XCH24,
124  idacOutputAPORT1YCH25 = IDAC_CTRL_APORTOUTSEL_APORT1YCH25,
125  idacOutputAPORT1XCH26 = IDAC_CTRL_APORTOUTSEL_APORT1XCH26,
126  idacOutputAPORT1YCH27 = IDAC_CTRL_APORTOUTSEL_APORT1YCH27,
127  idacOutputAPORT1XCH28 = IDAC_CTRL_APORTOUTSEL_APORT1XCH28,
128  idacOutputAPORT1YCH29 = IDAC_CTRL_APORTOUTSEL_APORT1YCH29,
129  idacOutputAPORT1XCH30 = IDAC_CTRL_APORTOUTSEL_APORT1XCH30,
130  idacOutputAPORT1YCH31 = IDAC_CTRL_APORTOUTSEL_APORT1YCH31,
131 #endif
132 } IDAC_OutMode_TypeDef;
133 
134 
137 typedef enum
138 {
139  idacPRSSELCh0 = IDAC_CTRL_PRSSEL_PRSCH0,
140  idacPRSSELCh1 = IDAC_CTRL_PRSSEL_PRSCH1,
141  idacPRSSELCh2 = IDAC_CTRL_PRSSEL_PRSCH2,
142  idacPRSSELCh3 = IDAC_CTRL_PRSSEL_PRSCH3,
143 #if defined( IDAC_CTRL_PRSSEL_PRSCH4 )
144  idacPRSSELCh4 = IDAC_CTRL_PRSSEL_PRSCH4,
145  idacPRSSELCh5 = IDAC_CTRL_PRSSEL_PRSCH5,
146 #endif
147 #if defined( IDAC_CTRL_PRSSEL_PRSCH6 )
148  idacPRSSELCh6 = IDAC_CTRL_PRSSEL_PRSCH6,
149  idacPRSSELCh7 = IDAC_CTRL_PRSSEL_PRSCH7,
150  idacPRSSELCh8 = IDAC_CTRL_PRSSEL_PRSCH8,
151  idacPRSSELCh9 = IDAC_CTRL_PRSSEL_PRSCH9,
152  idacPRSSELCh10 = IDAC_CTRL_PRSSEL_PRSCH10,
153  idacPRSSELCh11 = IDAC_CTRL_PRSSEL_PRSCH11,
154 #endif
155 } IDAC_PRSSEL_TypeDef;
156 
157 
159 typedef enum
160 {
161  idacCurrentRange0 = IDAC_CURPROG_RANGESEL_RANGE0,
162  idacCurrentRange1 = IDAC_CURPROG_RANGESEL_RANGE1,
163  idacCurrentRange2 = IDAC_CURPROG_RANGESEL_RANGE2,
164  idacCurrentRange3 = IDAC_CURPROG_RANGESEL_RANGE3,
165 } IDAC_Range_TypeDef;
166 
167 /*******************************************************************************
168  ******************************* STRUCTS ***********************************
169  ******************************************************************************/
170 
172 typedef struct
173 {
175  bool enable;
176 
178  IDAC_OutMode_TypeDef outMode;
179 
185  bool prsEnable;
186 
191  IDAC_PRSSEL_TypeDef prsSel;
192 
194  bool sinkEnable;
195 
196 } IDAC_Init_TypeDef;
197 
199 #if defined( _IDAC_CTRL_OUTMODE_MASK )
200 #define IDAC_INIT_DEFAULT \
201 { \
202  false, \
203  idacOutputPin, \
204  false, \
205  idacPRSSELCh0, \
206  false \
207 }
208 #elif ( _IDAC_CTRL_APORTOUTSEL_MASK )
209 #define IDAC_INIT_DEFAULT \
210 { \
211  false, \
212  idacOutputAPORT1XCH0, \
213  false, \
214  idacPRSSELCh0, \
215  false \
216 }
217 #endif
218 
219 
220 /*******************************************************************************
221  ***************************** PROTOTYPES **********************************
222  ******************************************************************************/
223 
224 
225 void IDAC_Init(IDAC_TypeDef *idac, const IDAC_Init_TypeDef *init);
226 void IDAC_Enable(IDAC_TypeDef *idac, bool enable);
227 void IDAC_Reset(IDAC_TypeDef *idac);
228 void IDAC_MinimalOutputTransitionMode(IDAC_TypeDef *idac, bool enable);
229 void IDAC_RangeSet(IDAC_TypeDef *idac, const IDAC_Range_TypeDef range);
230 void IDAC_StepSet(IDAC_TypeDef *idac, const uint32_t step);
231 void IDAC_OutEnable(IDAC_TypeDef *idac, bool enable);
232 
233 
234 #if defined( _IDAC_IEN_MASK )
235 /***************************************************************************/
246 __STATIC_INLINE void IDAC_IntClear(IDAC_TypeDef *idac, uint32_t flags)
247 {
248  idac->IFC = flags;
249 }
250 
251 
252 /***************************************************************************/
263 __STATIC_INLINE void IDAC_IntDisable(IDAC_TypeDef *idac, uint32_t flags)
264 {
265  idac->IEN &= ~flags;
266 }
267 
268 
269 /***************************************************************************/
285 __STATIC_INLINE void IDAC_IntEnable(IDAC_TypeDef *idac, uint32_t flags)
286 {
287  idac->IEN |= flags;
288 }
289 
290 
291 /***************************************************************************/
305 __STATIC_INLINE uint32_t IDAC_IntGet(IDAC_TypeDef *idac)
306 {
307  return idac->IF;
308 }
309 
310 
311 /***************************************************************************/
330 __STATIC_INLINE uint32_t IDAC_IntGetEnabled(IDAC_TypeDef *idac)
331 {
332  uint32_t ien;
333 
334  /* Store flags in temporary variable in order to define explicit order
335  * of volatile accesses. */
336  ien = idac->IEN;
337 
338  /* Bitwise AND of pending and enabled interrupts */
339  return idac->IF & ien;
340 }
341 
342 
343 /***************************************************************************/
354 __STATIC_INLINE void IDAC_IntSet(IDAC_TypeDef *idac, uint32_t flags)
355 {
356  idac->IFS = flags;
357 }
358 #endif
359 
360 
364 #ifdef __cplusplus
365 }
366 #endif
367 
368 #endif /* defined(IDAC_COUNT) && (IDAC_COUNT > 0) */
369 
370 #endif /* EM_IDAC_H */
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.