37 #if defined( DMA_PRESENT )
66 dmaDataInc1 = _DMA_CTRL_SRC_INC_BYTE,
67 dmaDataInc2 = _DMA_CTRL_SRC_INC_HALFWORD,
68 dmaDataInc4 = _DMA_CTRL_SRC_INC_WORD,
69 dmaDataIncNone = _DMA_CTRL_SRC_INC_NONE
70 } DMA_DataInc_TypeDef;
76 dmaDataSize1 = _DMA_CTRL_SRC_SIZE_BYTE,
77 dmaDataSize2 = _DMA_CTRL_SRC_SIZE_HALFWORD,
78 dmaDataSize4 = _DMA_CTRL_SRC_SIZE_WORD
79 } DMA_DataSize_TypeDef;
86 dmaCycleCtrlBasic = _DMA_CTRL_CYCLE_CTRL_BASIC,
88 dmaCycleCtrlAuto = _DMA_CTRL_CYCLE_CTRL_AUTO,
90 dmaCycleCtrlPingPong = _DMA_CTRL_CYCLE_CTRL_PINGPONG,
92 dmaCycleCtrlMemScatterGather = _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER,
94 dmaCycleCtrlPerScatterGather = _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER
95 } DMA_CycleCtrl_TypeDef;
101 dmaArbitrate1 = _DMA_CTRL_R_POWER_1,
102 dmaArbitrate2 = _DMA_CTRL_R_POWER_2,
103 dmaArbitrate4 = _DMA_CTRL_R_POWER_4,
104 dmaArbitrate8 = _DMA_CTRL_R_POWER_8,
105 dmaArbitrate16 = _DMA_CTRL_R_POWER_16,
106 dmaArbitrate32 = _DMA_CTRL_R_POWER_32,
107 dmaArbitrate64 = _DMA_CTRL_R_POWER_64,
108 dmaArbitrate128 = _DMA_CTRL_R_POWER_128,
109 dmaArbitrate256 = _DMA_CTRL_R_POWER_256,
110 dmaArbitrate512 = _DMA_CTRL_R_POWER_512,
111 dmaArbitrate1024 = _DMA_CTRL_R_POWER_1024
112 } DMA_ArbiterConfig_TypeDef;
135 typedef void (*DMA_FuncPtr_TypeDef)(
unsigned int channel,
bool primary,
void *user);
155 DMA_FuncPtr_TypeDef cbFunc;
209 } DMA_CfgChannel_TypeDef;
219 DMA_DataInc_TypeDef dstInc;
222 DMA_DataInc_TypeDef srcInc;
225 DMA_DataSize_TypeDef size;
231 DMA_ArbiterConfig_TypeDef arbRate;
243 } DMA_CfgDescr_TypeDef;
246 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
256 } DMA_CfgLoop_TypeDef;
260 #if defined( _DMA_RECT0_MASK )
272 } DMA_CfgRect_TypeDef;
286 DMA_DataInc_TypeDef dstInc;
289 DMA_DataInc_TypeDef srcInc;
292 DMA_DataSize_TypeDef size;
298 DMA_ArbiterConfig_TypeDef arbRate;
321 } DMA_CfgDescrSGAlt_TypeDef;
360 void DMA_ActivateAuto(
unsigned int channel,
364 unsigned int nMinus1);
365 void DMA_ActivateBasic(
unsigned int channel,
370 unsigned int nMinus1);
371 void DMA_ActivatePingPong(
unsigned int channel,
375 unsigned int primNMinus1,
378 unsigned int altNMinus1);
379 void DMA_ActivateScatterGather(
unsigned int channel,
383 void DMA_CfgChannel(
unsigned int channel, DMA_CfgChannel_TypeDef *cfg);
384 void DMA_CfgDescr(
unsigned int channel,
386 DMA_CfgDescr_TypeDef *cfg);
387 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
388 void DMA_CfgLoop(
unsigned int channel, DMA_CfgLoop_TypeDef *cfg);
391 #if defined( _DMA_RECT0_MASK )
392 void DMA_CfgRect(
unsigned int channel, DMA_CfgRect_TypeDef *cfg);
395 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
403 __STATIC_INLINE
void DMA_ResetLoop(
unsigned int channel)
409 DMA->LOOP0 = _DMA_LOOP0_RESETVALUE;
412 DMA->LOOP1 = _DMA_LOOP1_RESETVALUE;
421 #if defined( _DMA_RECT0_MASK )
429 __STATIC_INLINE
void DMA_ResetRect(
unsigned int channel)
434 DMA->RECT0 = _DMA_RECT0_RESETVALUE;
439 DMA_CfgDescrSGAlt_TypeDef *cfg);
440 void DMA_ChannelEnable(
unsigned int channel,
bool enable);
441 bool DMA_ChannelEnabled(
unsigned int channel);
442 void DMA_ChannelRequestEnable(
unsigned int channel,
bool enable);
443 void DMA_Init(DMA_Init_TypeDef *init);
444 void DMA_IRQHandler(
void);
445 void DMA_RefreshPingPong(
unsigned int channel,
450 unsigned int nMinus1,
452 void DMA_Reset(
void);
462 __STATIC_INLINE
void DMA_IntClear(uint32_t flags)
476 __STATIC_INLINE
void DMA_IntDisable(uint32_t flags)
495 __STATIC_INLINE
void DMA_IntEnable(uint32_t flags)
512 __STATIC_INLINE uint32_t DMA_IntGet(
void)
532 __STATIC_INLINE uint32_t DMA_IntGetEnabled(
void)
537 return DMA->IF & ien;
549 __STATIC_INLINE
void DMA_IntSet(uint32_t flags)
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.