EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
icm20648.h
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1 /***************************************************************************/
16 #ifndef __ICM20648_H_
17 #define __ICM20648_H_
18 
19 #include <stdint.h>
20 #include "icm20648_config.h"
21 
22 /***************************************************************************/
27 /***************************************************************************/
33 #define ICM20648_OK 0x0000
34 #define ICM20648_ERROR_INVALID_DEVICE_ID 0x0001
38 /***************************************************************************/
44 /* ICM20648 register banks */
45 #define ICM20648_BANK_0 ( 0 << 7 )
46 #define ICM20648_BANK_1 ( 1 << 7 )
47 #define ICM20648_BANK_2 ( 2 << 7 )
48 #define ICM20648_BANK_3 ( 3 << 7 )
50 /* Register and associated bit definitions */
51 /***********************/
52 /* Bank 0 register map */
53 /***********************/
54 #define ICM20648_REG_WHO_AM_I ( ICM20648_BANK_0 | 0x00 )
56 #define ICM20648_REG_USER_CTRL ( ICM20648_BANK_0 | 0x03 )
57 #define ICM20648_BIT_DMP_EN 0x80
58 #define ICM20648_BIT_FIFO_EN 0x40
59 #define ICM20648_BIT_I2C_MST_EN 0x20
60 #define ICM20648_BIT_I2C_IF_DIS 0x10
61 #define ICM20648_BIT_DMP_RST 0x08
62 #define ICM20648_BIT_DIAMOND_DMP_RST 0x04
64 #define ICM20648_REG_LP_CONFIG ( ICM20648_BANK_0 | 0x05 )
65 #define ICM20648_BIT_I2C_MST_CYCLE 0x40
66 #define ICM20648_BIT_ACCEL_CYCLE 0x20
67 #define ICM20648_BIT_GYRO_CYCLE 0x10
69 #define ICM20648_REG_PWR_MGMT_1 ( ICM20648_BANK_0 | 0x06 )
70 #define ICM20648_BIT_H_RESET 0x80
71 #define ICM20648_BIT_SLEEP 0x40
72 #define ICM20648_BIT_LP_EN 0x20
73 #define ICM20648_BIT_TEMP_DIS 0x08
74 #define ICM20648_BIT_CLK_PLL 0x01
76 #define ICM20648_REG_PWR_MGMT_2 ( ICM20648_BANK_0 | 0x07 )
77 #define ICM20648_BIT_PWR_ACCEL_STBY 0x38
78 #define ICM20648_BIT_PWR_GYRO_STBY 0x07
79 #define ICM20648_BIT_PWR_ALL_OFF 0x7F
81 #define ICM20648_REG_INT_PIN_CFG ( ICM20648_BANK_0 | 0x0F )
82 #define ICM20648_BIT_INT_ACTL 0x80
83 #define ICM20648_BIT_INT_OPEN 0x40
84 #define ICM20648_BIT_INT_LATCH_EN 0x20
86 #define ICM20648_REG_INT_ENABLE ( ICM20648_BANK_0 | 0x10 )
87 #define ICM20648_BIT_WOM_INT_EN 0x08
89 #define ICM20648_REG_INT_ENABLE_1 ( ICM20648_BANK_0 | 0x11 )
90 #define ICM20648_BIT_RAW_DATA_0_RDY_EN 0x01
92 #define ICM20648_REG_INT_ENABLE_2 ( ICM20648_BANK_0 | 0x12 )
93 #define ICM20648_BIT_FIFO_OVERFLOW_EN_0 0x01
95 #define ICM20648_REG_INT_ENABLE_3 ( ICM20648_BANK_0 | 0x13 )
97 #define ICM20648_REG_INT_STATUS ( ICM20648_BANK_0 | 0x19 )
98 #define ICM20648_BIT_WOM_INT 0x08
99 #define ICM20648_BIT_PLL_RDY 0x04
101 #define ICM20648_REG_INT_STATUS_1 ( ICM20648_BANK_0 | 0x1A )
102 #define ICM20648_BIT_RAW_DATA_0_RDY_INT 0x01
104 #define ICM20648_REG_INT_STATUS_2 ( ICM20648_BANK_0 | 0x1B )
106 #define ICM20648_REG_ACCEL_XOUT_H_SH ( ICM20648_BANK_0 | 0x2D )
107 #define ICM20648_REG_ACCEL_XOUT_L_SH ( ICM20648_BANK_0 | 0x2E )
108 #define ICM20648_REG_ACCEL_YOUT_H_SH ( ICM20648_BANK_0 | 0x2F )
109 #define ICM20648_REG_ACCEL_YOUT_L_SH ( ICM20648_BANK_0 | 0x30 )
110 #define ICM20648_REG_ACCEL_ZOUT_H_SH ( ICM20648_BANK_0 | 0x31 )
111 #define ICM20648_REG_ACCEL_ZOUT_L_SH ( ICM20648_BANK_0 | 0x32 )
113 #define ICM20648_REG_GYRO_XOUT_H_SH ( ICM20648_BANK_0 | 0x33 )
114 #define ICM20648_REG_GYRO_XOUT_L_SH ( ICM20648_BANK_0 | 0x34 )
115 #define ICM20648_REG_GYRO_YOUT_H_SH ( ICM20648_BANK_0 | 0x35 )
116 #define ICM20648_REG_GYRO_YOUT_L_SH ( ICM20648_BANK_0 | 0x36 )
117 #define ICM20648_REG_GYRO_ZOUT_H_SH ( ICM20648_BANK_0 | 0x37 )
118 #define ICM20648_REG_GYRO_ZOUT_L_SH ( ICM20648_BANK_0 | 0x38 )
120 #define ICM20648_REG_TEMPERATURE_H ( ICM20648_BANK_0 | 0x39 )
121 #define ICM20648_REG_TEMPERATURE_L ( ICM20648_BANK_0 | 0x3A )
122 #define ICM20648_REG_TEMP_CONFIG ( ICM20648_BANK_0 | 0x53 )
124 #define ICM20648_REG_FIFO_EN_1 ( ICM20648_BANK_0 | 0x66 )
126 #define ICM20648_REG_FIFO_EN_2 ( ICM20648_BANK_0 | 0x67 )
127 #define ICM20648_BIT_ACCEL_FIFO_EN 0x10
128 #define ICM20648_BITS_GYRO_FIFO_EN 0x0E
130 #define ICM20648_REG_FIFO_RST ( ICM20648_BANK_0 | 0x68 )
131 #define ICM20648_REG_FIFO_MODE ( ICM20648_BANK_0 | 0x69 )
133 #define ICM20648_REG_FIFO_COUNT_H ( ICM20648_BANK_0 | 0x70 )
134 #define ICM20648_REG_FIFO_COUNT_L ( ICM20648_BANK_0 | 0x71 )
135 #define ICM20648_REG_FIFO_R_W ( ICM20648_BANK_0 | 0x72 )
137 #define ICM20648_REG_DATA_RDY_STATUS ( ICM20648_BANK_0 | 0x74 )
138 #define ICM20648_BIT_RAW_DATA_0_RDY 0x01
140 #define ICM20648_REG_FIFO_CFG ( ICM20648_BANK_0 | 0x76 )
141 #define ICM20648_BIT_MULTI_FIFO_CFG 0x01
142 #define ICM20648_BIT_SINGLE_FIFO_CFG 0x00
144 /***********************/
145 /* Bank 1 register map */
146 /***********************/
147 #define ICM20648_REG_XA_OFFSET_H ( ICM20648_BANK_1 | 0x14 )
148 #define ICM20648_REG_XA_OFFSET_L ( ICM20648_BANK_1 | 0x15 )
149 #define ICM20648_REG_YA_OFFSET_H ( ICM20648_BANK_1 | 0x17 )
150 #define ICM20648_REG_YA_OFFSET_L ( ICM20648_BANK_1 | 0x18 )
151 #define ICM20648_REG_ZA_OFFSET_H ( ICM20648_BANK_1 | 0x1A )
152 #define ICM20648_REG_ZA_OFFSET_L ( ICM20648_BANK_1 | 0x1B )
154 #define ICM20648_REG_TIMEBASE_CORR_PLL ( ICM20648_BANK_1 | 0x28 )
156 /***********************/
157 /* Bank 2 register map */
158 /***********************/
159 #define ICM20648_REG_GYRO_SMPLRT_DIV ( ICM20648_BANK_2 | 0x00 )
161 #define ICM20648_REG_GYRO_CONFIG_1 ( ICM20648_BANK_2 | 0x01 )
162 #define ICM20648_BIT_GYRO_FCHOICE 0x01
163 #define ICM20648_SHIFT_GYRO_FS_SEL 1
164 #define ICM20648_SHIFT_GYRO_DLPCFG 3
165 #define ICM20648_MASK_GYRO_FULLSCALE 0x06
166 #define ICM20648_MASK_GYRO_BW 0x39
167 #define ICM20648_GYRO_FULLSCALE_250DPS ( 0x00 << ICM20648_SHIFT_GYRO_FS_SEL )
168 #define ICM20648_GYRO_FULLSCALE_500DPS ( 0x01 << ICM20648_SHIFT_GYRO_FS_SEL )
169 #define ICM20648_GYRO_FULLSCALE_1000DPS ( 0x02 << ICM20648_SHIFT_GYRO_FS_SEL )
170 #define ICM20648_GYRO_FULLSCALE_2000DPS ( 0x03 << ICM20648_SHIFT_GYRO_FS_SEL )
171 #define ICM20648_GYRO_BW_12100HZ ( 0x00 << ICM20648_SHIFT_GYRO_DLPCFG )
172 #define ICM20648_GYRO_BW_360HZ ( ( 0x07 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
173 #define ICM20648_GYRO_BW_200HZ ( ( 0x00 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
174 #define ICM20648_GYRO_BW_150HZ ( ( 0x01 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
175 #define ICM20648_GYRO_BW_120HZ ( ( 0x02 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
176 #define ICM20648_GYRO_BW_51HZ ( ( 0x03 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
177 #define ICM20648_GYRO_BW_24HZ ( ( 0x04 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
178 #define ICM20648_GYRO_BW_12HZ ( ( 0x05 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
179 #define ICM20648_GYRO_BW_6HZ ( ( 0x06 << ICM20648_SHIFT_GYRO_DLPCFG ) | ICM20648_BIT_GYRO_FCHOICE )
181 #define ICM20648_REG_GYRO_CONFIG_2 ( ICM20648_BANK_2 | 0x02 )
182 #define ICM20648_BIT_GYRO_CTEN 0x38
184 #define ICM20648_REG_XG_OFFS_USRH ( ICM20648_BANK_2 | 0x03 )
185 #define ICM20648_REG_XG_OFFS_USRL ( ICM20648_BANK_2 | 0x04 )
186 #define ICM20648_REG_YG_OFFS_USRH ( ICM20648_BANK_2 | 0x05 )
187 #define ICM20648_REG_YG_OFFS_USRL ( ICM20648_BANK_2 | 0x06 )
188 #define ICM20648_REG_ZG_OFFS_USRH ( ICM20648_BANK_2 | 0x07 )
189 #define ICM20648_REG_ZG_OFFS_USRL ( ICM20648_BANK_2 | 0x08 )
191 #define ICM20648_REG_ODR_ALIGN_EN ( ICM20648_BANK_2 | 0x09 )
193 #define ICM20648_REG_ACCEL_SMPLRT_DIV_1 ( ICM20648_BANK_2 | 0x10 )
194 #define ICM20648_REG_ACCEL_SMPLRT_DIV_2 ( ICM20648_BANK_2 | 0x11 )
196 #define ICM20648_REG_ACCEL_INTEL_CTRL ( ICM20648_BANK_2 | 0x12 )
197 #define ICM20648_BIT_ACCEL_INTEL_EN 0x02
198 #define ICM20648_BIT_ACCEL_INTEL_MODE 0x01
200 #define ICM20648_REG_ACCEL_WOM_THR ( ICM20648_BANK_2 | 0x13 )
202 #define ICM20648_REG_ACCEL_CONFIG ( ICM20648_BANK_2 | 0x14 )
203 #define ICM20648_BIT_ACCEL_FCHOICE 0x01
204 #define ICM20648_SHIFT_ACCEL_FS 1
205 #define ICM20648_SHIFT_ACCEL_DLPCFG 3
206 #define ICM20648_MASK_ACCEL_FULLSCALE 0x06
207 #define ICM20648_MASK_ACCEL_BW 0x39
208 #define ICM20648_ACCEL_FULLSCALE_2G ( 0x00 << ICM20648_SHIFT_ACCEL_FS )
209 #define ICM20648_ACCEL_FULLSCALE_4G ( 0x01 << ICM20648_SHIFT_ACCEL_FS )
210 #define ICM20648_ACCEL_FULLSCALE_8G ( 0x02 << ICM20648_SHIFT_ACCEL_FS )
211 #define ICM20648_ACCEL_FULLSCALE_16G ( 0x03 << ICM20648_SHIFT_ACCEL_FS )
212 #define ICM20648_ACCEL_BW_1210HZ ( 0x00 << ICM20648_SHIFT_ACCEL_DLPCFG )
213 #define ICM20648_ACCEL_BW_470HZ ( ( 0x07 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
214 #define ICM20648_ACCEL_BW_246HZ ( ( 0x00 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
215 #define ICM20648_ACCEL_BW_111HZ ( ( 0x02 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
216 #define ICM20648_ACCEL_BW_50HZ ( ( 0x03 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
217 #define ICM20648_ACCEL_BW_24HZ ( ( 0x04 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
218 #define ICM20648_ACCEL_BW_12HZ ( ( 0x05 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
219 #define ICM20648_ACCEL_BW_6HZ ( ( 0x06 << ICM20648_SHIFT_ACCEL_DLPCFG ) | ICM20648_BIT_ACCEL_FCHOICE )
221 #define ICM20648_REG_ACCEL_CONFIG_2 ( ICM20648_BANK_2 | 0x15 )
222 #define ICM20648_BIT_ACCEL_CTEN 0x1C
224 /***********************/
225 /* Bank 3 register map */
226 /***********************/
227 #define ICM20648_REG_I2C_MST_ODR_CONFIG ( ICM20648_BANK_3 | 0x00 )
229 #define ICM20648_REG_I2C_MST_CTRL ( ICM20648_BANK_3 | 0x01 )
230 #define ICM20648_BIT_I2C_MST_P_NSR 0x10
232 #define ICM20648_REG_I2C_MST_DELAY_CTRL ( ICM20648_BANK_3 | 0x02 )
233 #define ICM20648_BIT_SLV0_DLY_EN 0x01
234 #define ICM20648_BIT_SLV1_DLY_EN 0x02
235 #define ICM20648_BIT_SLV2_DLY_EN 0x04
236 #define ICM20648_BIT_SLV3_DLY_EN 0x08
238 #define ICM20648_REG_I2C_SLV0_ADDR ( ICM20648_BANK_3 | 0x03 )
239 #define ICM20648_REG_I2C_SLV0_REG ( ICM20648_BANK_3 | 0x04 )
240 #define ICM20648_REG_I2C_SLV0_CTRL ( ICM20648_BANK_3 | 0x05 )
241 #define ICM20648_REG_I2C_SLV0_DO ( ICM20648_BANK_3 | 0x06 )
243 #define ICM20648_REG_I2C_SLV1_ADDR ( ICM20648_BANK_3 | 0x07 )
244 #define ICM20648_REG_I2C_SLV1_REG ( ICM20648_BANK_3 | 0x08 )
245 #define ICM20648_REG_I2C_SLV1_CTRL ( ICM20648_BANK_3 | 0x09 )
246 #define ICM20648_REG_I2C_SLV1_DO ( ICM20648_BANK_3 | 0x0A )
248 #define ICM20648_REG_I2C_SLV2_ADDR ( ICM20648_BANK_3 | 0x0B )
249 #define ICM20648_REG_I2C_SLV2_REG ( ICM20648_BANK_3 | 0x0C )
250 #define ICM20648_REG_I2C_SLV2_CTRL ( ICM20648_BANK_3 | 0x0D )
251 #define ICM20648_REG_I2C_SLV2_DO ( ICM20648_BANK_3 | 0x0E )
253 #define ICM20648_REG_I2C_SLV3_ADDR ( ICM20648_BANK_3 | 0x0F )
254 #define ICM20648_REG_I2C_SLV3_REG ( ICM20648_BANK_3 | 0x10 )
255 #define ICM20648_REG_I2C_SLV3_CTRL ( ICM20648_BANK_3 | 0x11 )
256 #define ICM20648_REG_I2C_SLV3_DO ( ICM20648_BANK_3 | 0x12 )
258 #define ICM20648_REG_I2C_SLV4_ADDR ( ICM20648_BANK_3 | 0x13 )
259 #define ICM20648_REG_I2C_SLV4_REG ( ICM20648_BANK_3 | 0x14 )
260 #define ICM20648_REG_I2C_SLV4_CTRL ( ICM20648_BANK_3 | 0x15 )
261 #define ICM20648_REG_I2C_SLV4_DO ( ICM20648_BANK_3 | 0x16 )
262 #define ICM20648_REG_I2C_SLV4_DI ( ICM20648_BANK_3 | 0x17 )
264 #define ICM20648_BIT_I2C_SLV_EN 0x80
265 #define ICM20648_BIT_I2C_BYTE_SW 0x40
266 #define ICM20648_BIT_I2C_REG_DIS 0x20
267 #define ICM20648_BIT_I2C_GRP 0x10
268 #define ICM20648_BIT_I2C_READ 0x80
270 /* Register common for all banks */
271 #define ICM20648_REG_BANK_SEL 0x7F
273 #define ICM20648_DEVICE_ID 0xE0
277 /***************************************************************************/
282 uint32_t ICM20648_spiInit( void );
283 void ICM20648_registerRead(uint16_t addr, int numBytes, uint8_t *data);
284 void ICM20648_registerWrite(uint16_t addr, uint8_t data);
285 void ICM20648_bankSelect( uint8_t bank );
286 uint32_t ICM20648_reset( void );
287 uint32_t ICM20648_sampleRateSet( float sampleRate );
288 float ICM20648_gyroSampleRateSet( float sampleRate );
289 float ICM20648_accelSampleRateSet( float sampleRate );
290 uint32_t ICM20648_gyroBandwidthSet( uint8_t gyroBw );
291 uint32_t ICM20648_accelBandwidthSet( uint8_t accelBw );
292 uint32_t ICM20648_accelDataRead( float *accel );
293 uint32_t ICM20648_gyroDataRead( float *gyro );
294 uint32_t ICM20648_accelResolutionGet( float *accelRes );
295 uint32_t ICM20648_gyroResolutionGet( float *gyroRes );
296 uint32_t ICM20648_accelFullscaleSet( uint8_t accelFs );
297 uint32_t ICM20648_gyroFullscaleSet( uint8_t gyroFs );
298 uint32_t ICM20648_sleepModeEnable( bool enable );
299 uint32_t ICM20648_cycleModeEnable( bool enable );
300 uint32_t ICM20648_sensorEnable( bool accel, bool gyro, bool temp );
301 uint32_t ICM20648_lowPowerModeEnter( bool enAccel, bool enGyro, bool enTemp );
302 uint32_t ICM20648_interruptEnable( bool dataReadyEnable, bool womEnable );
303 uint32_t ICM20648_interruptStatusRead( uint32_t *int_status );
304 bool ICM20648_isDataReady( void );
305 uint32_t ICM20648_wakeOnMotionITEnable( bool enable, uint8_t womThreshold, float sampleRate );
306 uint32_t ICM20648_init( void );
307 uint32_t ICM20648_deInit( void );
308 uint32_t ICM20648_accelGyroCalibrate( float *accelBiasScaled, float *gyroBiasScaled );
309 uint32_t ICM20648_gyroCalibrate( float *gyroBiasScaled );
310 uint32_t ICM20648_temperatureRead( float *temperature );
311 uint32_t ICM20648_getDeviceID( uint8_t *devID );
312 
317 #endif /* __ICM20648_H_ */
318 
uint32_t ICM20648_wakeOnMotionITEnable(bool enable, uint8_t womThreshold, float sampleRate)
Sets up and enables the Wake-up On Motion feature.
Definition: icm20648.c:793
uint32_t ICM20648_sampleRateSet(float sampleRate)
Sets the sample rate both of the accelerometer and the gyroscope.
Definition: icm20648.c:359
uint32_t ICM20648_deInit(void)
De-initializes the ICM20648 sensor by disconnecting the supply and SPI lines.
Definition: icm20648.c:103
uint32_t ICM20648_interruptEnable(bool dataReadyEnable, bool womEnable)
Enables or disables the interrupts in the ICM20648 chip.
Definition: icm20648.c:697
uint32_t ICM20648_temperatureRead(float *temperature)
Reads the temperature sensor raw value and converts to Celsius.
Definition: icm20648.c:1227
void ICM20648_registerWrite(uint16_t addr, uint8_t data)
Writes a register in the ICM20648 device.
Definition: icm20648.c:1368
uint32_t ICM20648_gyroResolutionGet(float *gyroRes)
Gets the actual resolution of the gyroscope.
Definition: icm20648.c:260
uint32_t ICM20648_gyroDataRead(float *gyro)
Reads the raw gyroscope value and converts to deg/sec value based on the actual resolution.
Definition: icm20648.c:182
uint32_t ICM20648_gyroBandwidthSet(uint8_t gyroBw)
Sets the bandwidth of the gyroscope.
Definition: icm20648.c:462
uint32_t ICM20648_lowPowerModeEnter(bool enAccel, bool enGyro, bool enTemp)
Enables or disables the sensors in low power mode in the ICM20648 chip.
Definition: icm20648.c:641
void ICM20648_registerRead(uint16_t addr, int numBytes, uint8_t *data)
Reads register from the ICM20648 device.
Definition: icm20648.c:1323
float ICM20648_gyroSampleRateSet(float sampleRate)
Sets the sample rate of the accelerometer.
Definition: icm20648.c:380
void ICM20648_bankSelect(uint8_t bank)
Select the desired register bank.
Definition: icm20648.c:1407
uint32_t ICM20648_accelGyroCalibrate(float *accelBiasScaled, float *gyroBiasScaled)
Accelerometer and gyroscope calibration function. Reads the gyroscope and accelerometer values while ...
Definition: icm20648.c:863
uint32_t ICM20648_init(void)
Initializes the ICM20648 sensor. Enables the power supply and SPI lines, sets up the host SPI control...
Definition: icm20648.c:53
uint32_t ICM20648_accelDataRead(float *accel)
Reads the raw acceleration value and converts to g value based on the actual resolution.
Definition: icm20648.c:145
uint32_t ICM20648_interruptStatusRead(uint32_t *intStatus)
Reads the interrupt status registers of the ICM20648 chip.
Definition: icm20648.c:737
uint32_t ICM20648_gyroFullscaleSet(uint8_t gyroFs)
Sets the full scale value of the gyroscope.
Definition: icm20648.c:332
float ICM20648_accelSampleRateSet(float sampleRate)
Sets the sample rate of the gyroscope.
Definition: icm20648.c:420
bool ICM20648_isDataReady(void)
Checks if new data is available for read.
Definition: icm20648.c:759
uint32_t ICM20648_sensorEnable(bool accel, bool gyro, bool temp)
Enables or disables the sensors in the ICM20648 chip.
Definition: icm20648.c:584
uint32_t ICM20648_reset(void)
Performs soft reset on the ICM20648 chip.
Definition: icm20648.c:120
uint32_t ICM20648_getDeviceID(uint8_t *devID)
Reads the device ID of the ICM20648.
Definition: icm20648.c:1256
uint32_t ICM20648_accelFullscaleSet(uint8_t accelFs)
Sets the full scale value of the accelerometer.
Definition: icm20648.c:305
uint32_t ICM20648_cycleModeEnable(bool enable)
Enables or disables the cycle mode operation of the accel and gyro.
Definition: icm20648.c:551
uint32_t ICM20648_sleepModeEnable(bool enable)
Enables or disables the sleep mode of the device.
Definition: icm20648.c:518
uint32_t ICM20648_gyroCalibrate(float *gyroBiasScaled)
Gyroscope calibration function. Reads the gyroscope values while the device is at rest and in level...
Definition: icm20648.c:1077
uint32_t ICM20648_accelResolutionGet(float *accelRes)
Gets the actual resolution of the accelerometer.
Definition: icm20648.c:217
uint32_t ICM20648_accelBandwidthSet(uint8_t accelBw)
Sets the bandwidth of the accelerometer.
Definition: icm20648.c:491