EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
em_dma.h
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1 /***************************************************************************/
33 #ifndef EM_DMA_H
34 #define EM_DMA_H
35 
36 #include "em_device.h"
37 #if defined( DMA_PRESENT )
38 
39 #include <stdio.h>
40 #include <stdbool.h>
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 /***************************************************************************/
51 /***************************************************************************/
56 /*******************************************************************************
57  ******************************** ENUMS ************************************
58  ******************************************************************************/
59 
64 typedef enum
65 {
66  dmaDataInc1 = _DMA_CTRL_SRC_INC_BYTE,
67  dmaDataInc2 = _DMA_CTRL_SRC_INC_HALFWORD,
68  dmaDataInc4 = _DMA_CTRL_SRC_INC_WORD,
69  dmaDataIncNone = _DMA_CTRL_SRC_INC_NONE
70 } DMA_DataInc_TypeDef;
71 
72 
74 typedef enum
75 {
76  dmaDataSize1 = _DMA_CTRL_SRC_SIZE_BYTE,
77  dmaDataSize2 = _DMA_CTRL_SRC_SIZE_HALFWORD,
78  dmaDataSize4 = _DMA_CTRL_SRC_SIZE_WORD
79 } DMA_DataSize_TypeDef;
80 
81 
83 typedef enum
84 {
86  dmaCycleCtrlBasic = _DMA_CTRL_CYCLE_CTRL_BASIC,
88  dmaCycleCtrlAuto = _DMA_CTRL_CYCLE_CTRL_AUTO,
90  dmaCycleCtrlPingPong = _DMA_CTRL_CYCLE_CTRL_PINGPONG,
92  dmaCycleCtrlMemScatterGather = _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER,
94  dmaCycleCtrlPerScatterGather = _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER
95 } DMA_CycleCtrl_TypeDef;
96 
97 
99 typedef enum
100 {
101  dmaArbitrate1 = _DMA_CTRL_R_POWER_1,
102  dmaArbitrate2 = _DMA_CTRL_R_POWER_2,
103  dmaArbitrate4 = _DMA_CTRL_R_POWER_4,
104  dmaArbitrate8 = _DMA_CTRL_R_POWER_8,
105  dmaArbitrate16 = _DMA_CTRL_R_POWER_16,
106  dmaArbitrate32 = _DMA_CTRL_R_POWER_32,
107  dmaArbitrate64 = _DMA_CTRL_R_POWER_64,
108  dmaArbitrate128 = _DMA_CTRL_R_POWER_128,
109  dmaArbitrate256 = _DMA_CTRL_R_POWER_256,
110  dmaArbitrate512 = _DMA_CTRL_R_POWER_512,
111  dmaArbitrate1024 = _DMA_CTRL_R_POWER_1024
112 } DMA_ArbiterConfig_TypeDef;
113 
114 
115 /*******************************************************************************
116  ******************************* STRUCTS ***********************************
117  ******************************************************************************/
118 
135 typedef void (*DMA_FuncPtr_TypeDef)(unsigned int channel, bool primary, void *user);
136 
137 
148 typedef struct
149 {
155  DMA_FuncPtr_TypeDef cbFunc;
156 
158  void *userPtr;
159 
165  uint8_t primary;
166 } DMA_CB_TypeDef;
167 
168 
170 typedef struct
171 {
177  bool highPri;
178 
185  bool enableInt;
186 
192  uint32_t select;
193 
208  DMA_CB_TypeDef *cb;
209 } DMA_CfgChannel_TypeDef;
210 
211 
216 typedef struct
217 {
219  DMA_DataInc_TypeDef dstInc;
220 
222  DMA_DataInc_TypeDef srcInc;
223 
225  DMA_DataSize_TypeDef size;
226 
231  DMA_ArbiterConfig_TypeDef arbRate;
232 
242  uint8_t hprot;
243 } DMA_CfgDescr_TypeDef;
244 
245 
246 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
247 
250 typedef struct
251 {
253  bool enable;
255  uint16_t nMinus1;
256 } DMA_CfgLoop_TypeDef;
257 #endif
258 
259 
260 #if defined( _DMA_RECT0_MASK )
261 
264 typedef struct
265 {
267  uint16_t dstStride;
269  uint16_t srcStride;
271  uint16_t height;
272 } DMA_CfgRect_TypeDef;
273 #endif
274 
275 
277 typedef struct
278 {
280  void *src;
281 
283  void *dst;
284 
286  DMA_DataInc_TypeDef dstInc;
287 
289  DMA_DataInc_TypeDef srcInc;
290 
292  DMA_DataSize_TypeDef size;
293 
298  DMA_ArbiterConfig_TypeDef arbRate;
299 
301  uint16_t nMinus1;
302 
312  uint8_t hprot;
313 
320  bool peripheral;
321 } DMA_CfgDescrSGAlt_TypeDef;
322 
323 
325 typedef struct
326 {
335  uint8_t hprot;
336 
352  DMA_DESCRIPTOR_TypeDef *controlBlock;
353 } DMA_Init_TypeDef;
354 
355 
356 /*******************************************************************************
357  ***************************** PROTOTYPES **********************************
358  ******************************************************************************/
359 
360 void DMA_ActivateAuto(unsigned int channel,
361  bool primary,
362  void *dst,
363  const void *src,
364  unsigned int nMinus1);
365 void DMA_ActivateBasic(unsigned int channel,
366  bool primary,
367  bool useBurst,
368  void *dst,
369  const void *src,
370  unsigned int nMinus1);
371 void DMA_ActivatePingPong(unsigned int channel,
372  bool useBurst,
373  void *primDst,
374  const void *primSrc,
375  unsigned int primNMinus1,
376  void *altDst,
377  const void *altSrc,
378  unsigned int altNMinus1);
379 void DMA_ActivateScatterGather(unsigned int channel,
380  bool useBurst,
381  DMA_DESCRIPTOR_TypeDef *altDescr,
382  unsigned int count);
383 void DMA_CfgChannel(unsigned int channel, DMA_CfgChannel_TypeDef *cfg);
384 void DMA_CfgDescr(unsigned int channel,
385  bool primary,
386  DMA_CfgDescr_TypeDef *cfg);
387 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
388 void DMA_CfgLoop(unsigned int channel, DMA_CfgLoop_TypeDef *cfg);
389 #endif
390 
391 #if defined( _DMA_RECT0_MASK )
392 void DMA_CfgRect(unsigned int channel, DMA_CfgRect_TypeDef *cfg);
393 #endif
394 
395 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
396 /***************************************************************************/
403 __STATIC_INLINE void DMA_ResetLoop(unsigned int channel)
404 {
405  /* Clean loop copy operation */
406  switch(channel)
407  {
408  case 0:
409  DMA->LOOP0 = _DMA_LOOP0_RESETVALUE;
410  break;
411  case 1:
412  DMA->LOOP1 = _DMA_LOOP1_RESETVALUE;
413  break;
414  default:
415  break;
416  }
417 }
418 #endif
419 
420 
421 #if defined( _DMA_RECT0_MASK )
422 /***************************************************************************/
429 __STATIC_INLINE void DMA_ResetRect(unsigned int channel)
430 {
431  (void) channel;
432 
433  /* Clear rect copy operation */
434  DMA->RECT0 = _DMA_RECT0_RESETVALUE;
435 }
436 #endif
437 void DMA_CfgDescrScatterGather(DMA_DESCRIPTOR_TypeDef *descr,
438  unsigned int indx,
439  DMA_CfgDescrSGAlt_TypeDef *cfg);
440 void DMA_ChannelEnable(unsigned int channel, bool enable);
441 bool DMA_ChannelEnabled(unsigned int channel);
442 void DMA_ChannelRequestEnable(unsigned int channel, bool enable);
443 void DMA_Init(DMA_Init_TypeDef *init);
444 void DMA_IRQHandler(void);
445 void DMA_RefreshPingPong(unsigned int channel,
446  bool primary,
447  bool useBurst,
448  void *dst,
449  const void *src,
450  unsigned int nMinus1,
451  bool last);
452 void DMA_Reset(void);
453 
454 /***************************************************************************/
462 __STATIC_INLINE void DMA_IntClear(uint32_t flags)
463 {
464  DMA->IFC = flags;
465 }
466 
467 
468 /***************************************************************************/
476 __STATIC_INLINE void DMA_IntDisable(uint32_t flags)
477 {
478  DMA->IEN &= ~flags;
479 }
480 
481 
482 /***************************************************************************/
495 __STATIC_INLINE void DMA_IntEnable(uint32_t flags)
496 {
497  DMA->IEN |= flags;
498 }
499 
500 
501 /***************************************************************************/
512 __STATIC_INLINE uint32_t DMA_IntGet(void)
513 {
514  return DMA->IF;
515 }
516 
517 
518 /***************************************************************************/
532 __STATIC_INLINE uint32_t DMA_IntGetEnabled(void)
533 {
534  uint32_t ien;
535 
536  ien = DMA->IEN;
537  return DMA->IF & ien;
538 }
539 
540 
541 /***************************************************************************/
549 __STATIC_INLINE void DMA_IntSet(uint32_t flags)
550 {
551  DMA->IFS = flags;
552 }
553 
557 #ifdef __cplusplus
558 }
559 #endif
560 
561 #endif /* defined( DMA_PRESENT ) */
562 #endif /* EM_DMA_H */
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.