EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
board_pic_regs.h
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1 /***************************************************************************/
16 #ifndef __BOARD_PIC_REGS_H_
17 #define __BOARD_PIC_REGS_H_
18 
19 /***************************************************************************/
24 /***************************************************************************/
30 /* Application registers */
31 #define BOARD_PIC_REG_IMU_CTRL 0x00
32 #define BOARD_PIC_REG_ENV_SENSOR_CTRL 0x01
33 #define BOARD_PIC_REG_MIC_CTRL 0x02
34 #define BOARD_PIC_REG_CCS_CTRL 0x03
35 #define BOARD_PIC_REG_LED_CTRL 0x04
36 #define BOARD_PIC_REG_INT_ENABLE 0x05
37 #define BOARD_PIC_REG_INT_CLEAR 0x06
38 #define BOARD_PIC_REG_INT_FLAG 0x07
39 #define BOARD_PIC_REG_INT_CTRL 0x08
41 #define BOARD_PIC_NUM_APP_REGS 9
43 /* System registers */
44 #define BOARD_PIC_REG_SYS_CMD 0xF0
45 #define BOARD_PIC_REG_VERSION_MAJOR 0xF1
46 #define BOARD_PIC_REG_VERSION_MINOR 0xF2
47 #define BOARD_PIC_REG_VERSION_PATCH 0xF3
49 #define BOARD_PIC_REG_SCRATCH0 0xF4
50 #define BOARD_PIC_REG_SCRATCH1 0xF5
51 #define BOARD_PIC_REG_SCRATCH2 0xF6
52 #define BOARD_PIC_REG_SCRATCH3 0xF7
54 #define BOARD_PIC_REG_DEVICE_ID0 0xF8
55 #define BOARD_PIC_REG_DEVICE_ID1 0xF9
56 #define BOARD_PIC_REG_DEVICE_ID2 0xFA
57 #define BOARD_PIC_REG_DEVICE_ID3 0xFB
59 #define BOARD_PIC_REG_BOARD_REV 0xFC
61 #define BOARD_PIC_SYS_REG_START 0xF0
62 #define BOARD_PIC_NUM_SYS_REGS 13
65 /* Bit fields for PIC_REG_IMU_CTRL */
66 #define BOARD_PIC_REG_IMU_CTRL_EN 0x01
68 /* Bit fields for PIC_REG_ENV_SENSOR_CTRL */
69 #define BOARD_PIC_REG_ENV_SENSOR_CTRL_EN 0x01
71 /* Bit fields for PIC_REG_MIC_CTRL */
72 #define BOARD_PIC_REG_MIC_CTRL_EN 0x01
74 /* Bit fields for PIC_REG_CCS_CTRL */
75 #define BOARD_PIC_REG_CCS_CTRL_EN 0x01
76 #define BOARD_PIC_REG_CCS_CTRL_WAKE 0x02
78 /* Bit fields for PIC_REG_LED_CTRL */
79 #define BOARD_PIC_REG_LED_CTRL_PWR_EN 0x01
80 #define BOARD_PIC_REG_LED_CTRL_LED0 0x10
81 #define BOARD_PIC_REG_LED_CTRL_LED1 0x20
82 #define BOARD_PIC_REG_LED_CTRL_LED2 0x40
83 #define BOARD_PIC_REG_LED_CTRL_LED3 0x80
84 #define BOARD_PIC_REG_LED_CTRL_LED_MASK 0xf0
85 #define BOARD_PIC_REG_LED_CTRL_LED_SHIFT 4
87 /* Bit fields for PIC_REG_INT_ENABLE */
88 #define BOARD_PIC_REG_INT_ENABLE_CCS811 0x01
89 #define BOARD_PIC_REG_INT_ENABLE_IMU 0x02
90 #define BOARD_PIC_REG_INT_ENABLE_UV_ALS 0x04
92 /* Bit fields for PIC_REG_INT_FLAG */
93 #define BOARD_PIC_REG_INT_FLAG_CCS811 0x01
94 #define BOARD_PIC_REG_INT_FLAG_IMU 0x02
95 #define BOARD_PIC_REG_INT_FLAG_UV_ALS 0x04
97 /* Bit fields for PIC_REG_INT_CLEAR */
98 #define BOARD_PIC_REG_INT_CLEAR_CCS811 0x01
99 #define BOARD_PIC_REG_INT_CLEAR_IMU 0x02
100 #define BOARD_PIC_REG_INT_CLEAR_UV_ALS 0x04
102 /* Bit fields for PIC_REG_INT_CTRL */
103 #define BOARD_PIC_REG_INT_CTRL_TIMER_MASK 0x0F
104 #define BOARD_PIC_REG_INT_CTRL_TIMER_SHIFT 0
105 #define BOARD_PIC_REG_INT_CTRL_TIMER_ENABLE 0x10
106 #define BOARD_PIC_REG_INT_CTRL_LEGACY_MODE 0x20
108 #define BOARD_PIC_REG_SYS_CMD_BOOTMODE 0xA5
114 #endif /* __BOARD_PIC_REGS_H_ */