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efm32wg_uart.h
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1
/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/* Bit fields for UART CTRL */
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#define _UART_CTRL_RESETVALUE 0x00000000UL
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#define _UART_CTRL_MASK 0xFFFFFF7FUL
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#define UART_CTRL_SYNC (0x1UL << 0)
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#define _UART_CTRL_SYNC_SHIFT 0
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#define _UART_CTRL_SYNC_MASK 0x1UL
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#define _UART_CTRL_SYNC_DEFAULT 0x00000000UL
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#define UART_CTRL_SYNC_DEFAULT (_UART_CTRL_SYNC_DEFAULT << 0)
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#define UART_CTRL_LOOPBK (0x1UL << 1)
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#define _UART_CTRL_LOOPBK_SHIFT 1
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#define _UART_CTRL_LOOPBK_MASK 0x2UL
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#define _UART_CTRL_LOOPBK_DEFAULT 0x00000000UL
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#define UART_CTRL_LOOPBK_DEFAULT (_UART_CTRL_LOOPBK_DEFAULT << 1)
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#define UART_CTRL_CCEN (0x1UL << 2)
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#define _UART_CTRL_CCEN_SHIFT 2
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#define _UART_CTRL_CCEN_MASK 0x4UL
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#define _UART_CTRL_CCEN_DEFAULT 0x00000000UL
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#define UART_CTRL_CCEN_DEFAULT (_UART_CTRL_CCEN_DEFAULT << 2)
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#define UART_CTRL_MPM (0x1UL << 3)
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#define _UART_CTRL_MPM_SHIFT 3
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#define _UART_CTRL_MPM_MASK 0x8UL
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#define _UART_CTRL_MPM_DEFAULT 0x00000000UL
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#define UART_CTRL_MPM_DEFAULT (_UART_CTRL_MPM_DEFAULT << 3)
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#define UART_CTRL_MPAB (0x1UL << 4)
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#define _UART_CTRL_MPAB_SHIFT 4
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#define _UART_CTRL_MPAB_MASK 0x10UL
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#define _UART_CTRL_MPAB_DEFAULT 0x00000000UL
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#define UART_CTRL_MPAB_DEFAULT (_UART_CTRL_MPAB_DEFAULT << 4)
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#define _UART_CTRL_OVS_SHIFT 5
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#define _UART_CTRL_OVS_MASK 0x60UL
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#define _UART_CTRL_OVS_DEFAULT 0x00000000UL
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#define _UART_CTRL_OVS_X16 0x00000000UL
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#define _UART_CTRL_OVS_X8 0x00000001UL
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#define _UART_CTRL_OVS_X6 0x00000002UL
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#define _UART_CTRL_OVS_X4 0x00000003UL
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#define UART_CTRL_OVS_DEFAULT (_UART_CTRL_OVS_DEFAULT << 5)
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#define UART_CTRL_OVS_X16 (_UART_CTRL_OVS_X16 << 5)
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#define UART_CTRL_OVS_X8 (_UART_CTRL_OVS_X8 << 5)
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#define UART_CTRL_OVS_X6 (_UART_CTRL_OVS_X6 << 5)
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#define UART_CTRL_OVS_X4 (_UART_CTRL_OVS_X4 << 5)
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#define UART_CTRL_CLKPOL (0x1UL << 8)
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#define _UART_CTRL_CLKPOL_SHIFT 8
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#define _UART_CTRL_CLKPOL_MASK 0x100UL
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#define _UART_CTRL_CLKPOL_DEFAULT 0x00000000UL
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#define _UART_CTRL_CLKPOL_IDLELOW 0x00000000UL
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#define _UART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL
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#define UART_CTRL_CLKPOL_DEFAULT (_UART_CTRL_CLKPOL_DEFAULT << 8)
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#define UART_CTRL_CLKPOL_IDLELOW (_UART_CTRL_CLKPOL_IDLELOW << 8)
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#define UART_CTRL_CLKPOL_IDLEHIGH (_UART_CTRL_CLKPOL_IDLEHIGH << 8)
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#define UART_CTRL_CLKPHA (0x1UL << 9)
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#define _UART_CTRL_CLKPHA_SHIFT 9
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#define _UART_CTRL_CLKPHA_MASK 0x200UL
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#define _UART_CTRL_CLKPHA_DEFAULT 0x00000000UL
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#define _UART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL
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#define _UART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL
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#define UART_CTRL_CLKPHA_DEFAULT (_UART_CTRL_CLKPHA_DEFAULT << 9)
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#define UART_CTRL_CLKPHA_SAMPLELEADING (_UART_CTRL_CLKPHA_SAMPLELEADING << 9)
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#define UART_CTRL_CLKPHA_SAMPLETRAILING (_UART_CTRL_CLKPHA_SAMPLETRAILING << 9)
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#define UART_CTRL_MSBF (0x1UL << 10)
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#define _UART_CTRL_MSBF_SHIFT 10
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#define _UART_CTRL_MSBF_MASK 0x400UL
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#define _UART_CTRL_MSBF_DEFAULT 0x00000000UL
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#define UART_CTRL_MSBF_DEFAULT (_UART_CTRL_MSBF_DEFAULT << 10)
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#define UART_CTRL_CSMA (0x1UL << 11)
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#define _UART_CTRL_CSMA_SHIFT 11
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#define _UART_CTRL_CSMA_MASK 0x800UL
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#define _UART_CTRL_CSMA_DEFAULT 0x00000000UL
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#define _UART_CTRL_CSMA_NOACTION 0x00000000UL
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#define _UART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL
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#define UART_CTRL_CSMA_DEFAULT (_UART_CTRL_CSMA_DEFAULT << 11)
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#define UART_CTRL_CSMA_NOACTION (_UART_CTRL_CSMA_NOACTION << 11)
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#define UART_CTRL_CSMA_GOTOSLAVEMODE (_UART_CTRL_CSMA_GOTOSLAVEMODE << 11)
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#define UART_CTRL_TXBIL (0x1UL << 12)
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#define _UART_CTRL_TXBIL_SHIFT 12
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#define _UART_CTRL_TXBIL_MASK 0x1000UL
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#define _UART_CTRL_TXBIL_DEFAULT 0x00000000UL
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#define _UART_CTRL_TXBIL_EMPTY 0x00000000UL
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#define _UART_CTRL_TXBIL_HALFFULL 0x00000001UL
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#define UART_CTRL_TXBIL_DEFAULT (_UART_CTRL_TXBIL_DEFAULT << 12)
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#define UART_CTRL_TXBIL_EMPTY (_UART_CTRL_TXBIL_EMPTY << 12)
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#define UART_CTRL_TXBIL_HALFFULL (_UART_CTRL_TXBIL_HALFFULL << 12)
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#define UART_CTRL_RXINV (0x1UL << 13)
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#define _UART_CTRL_RXINV_SHIFT 13
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#define _UART_CTRL_RXINV_MASK 0x2000UL
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#define _UART_CTRL_RXINV_DEFAULT 0x00000000UL
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#define UART_CTRL_RXINV_DEFAULT (_UART_CTRL_RXINV_DEFAULT << 13)
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#define UART_CTRL_TXINV (0x1UL << 14)
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#define _UART_CTRL_TXINV_SHIFT 14
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#define _UART_CTRL_TXINV_MASK 0x4000UL
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#define _UART_CTRL_TXINV_DEFAULT 0x00000000UL
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#define UART_CTRL_TXINV_DEFAULT (_UART_CTRL_TXINV_DEFAULT << 14)
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#define UART_CTRL_CSINV (0x1UL << 15)
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#define _UART_CTRL_CSINV_SHIFT 15
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#define _UART_CTRL_CSINV_MASK 0x8000UL
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#define _UART_CTRL_CSINV_DEFAULT 0x00000000UL
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#define UART_CTRL_CSINV_DEFAULT (_UART_CTRL_CSINV_DEFAULT << 15)
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#define UART_CTRL_AUTOCS (0x1UL << 16)
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#define _UART_CTRL_AUTOCS_SHIFT 16
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#define _UART_CTRL_AUTOCS_MASK 0x10000UL
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#define _UART_CTRL_AUTOCS_DEFAULT 0x00000000UL
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#define UART_CTRL_AUTOCS_DEFAULT (_UART_CTRL_AUTOCS_DEFAULT << 16)
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#define UART_CTRL_AUTOTRI (0x1UL << 17)
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#define _UART_CTRL_AUTOTRI_SHIFT 17
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#define _UART_CTRL_AUTOTRI_MASK 0x20000UL
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#define _UART_CTRL_AUTOTRI_DEFAULT 0x00000000UL
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#define UART_CTRL_AUTOTRI_DEFAULT (_UART_CTRL_AUTOTRI_DEFAULT << 17)
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#define UART_CTRL_SCMODE (0x1UL << 18)
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#define _UART_CTRL_SCMODE_SHIFT 18
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#define _UART_CTRL_SCMODE_MASK 0x40000UL
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#define _UART_CTRL_SCMODE_DEFAULT 0x00000000UL
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#define UART_CTRL_SCMODE_DEFAULT (_UART_CTRL_SCMODE_DEFAULT << 18)
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#define UART_CTRL_SCRETRANS (0x1UL << 19)
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#define _UART_CTRL_SCRETRANS_SHIFT 19
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#define _UART_CTRL_SCRETRANS_MASK 0x80000UL
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#define _UART_CTRL_SCRETRANS_DEFAULT 0x00000000UL
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#define UART_CTRL_SCRETRANS_DEFAULT (_UART_CTRL_SCRETRANS_DEFAULT << 19)
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#define UART_CTRL_SKIPPERRF (0x1UL << 20)
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#define _UART_CTRL_SKIPPERRF_SHIFT 20
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#define _UART_CTRL_SKIPPERRF_MASK 0x100000UL
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#define _UART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL
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#define UART_CTRL_SKIPPERRF_DEFAULT (_UART_CTRL_SKIPPERRF_DEFAULT << 20)
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#define UART_CTRL_BIT8DV (0x1UL << 21)
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#define _UART_CTRL_BIT8DV_SHIFT 21
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#define _UART_CTRL_BIT8DV_MASK 0x200000UL
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#define _UART_CTRL_BIT8DV_DEFAULT 0x00000000UL
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#define UART_CTRL_BIT8DV_DEFAULT (_UART_CTRL_BIT8DV_DEFAULT << 21)
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#define UART_CTRL_ERRSDMA (0x1UL << 22)
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#define _UART_CTRL_ERRSDMA_SHIFT 22
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#define _UART_CTRL_ERRSDMA_MASK 0x400000UL
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#define _UART_CTRL_ERRSDMA_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSDMA_DEFAULT (_UART_CTRL_ERRSDMA_DEFAULT << 22)
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#define UART_CTRL_ERRSRX (0x1UL << 23)
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#define _UART_CTRL_ERRSRX_SHIFT 23
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#define _UART_CTRL_ERRSRX_MASK 0x800000UL
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#define _UART_CTRL_ERRSRX_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSRX_DEFAULT (_UART_CTRL_ERRSRX_DEFAULT << 23)
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#define UART_CTRL_ERRSTX (0x1UL << 24)
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#define _UART_CTRL_ERRSTX_SHIFT 24
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#define _UART_CTRL_ERRSTX_MASK 0x1000000UL
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#define _UART_CTRL_ERRSTX_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSTX_DEFAULT (_UART_CTRL_ERRSTX_DEFAULT << 24)
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#define UART_CTRL_SSSEARLY (0x1UL << 25)
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#define _UART_CTRL_SSSEARLY_SHIFT 25
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#define _UART_CTRL_SSSEARLY_MASK 0x2000000UL
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#define _UART_CTRL_SSSEARLY_DEFAULT 0x00000000UL
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#define UART_CTRL_SSSEARLY_DEFAULT (_UART_CTRL_SSSEARLY_DEFAULT << 25)
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#define _UART_CTRL_TXDELAY_SHIFT 26
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#define _UART_CTRL_TXDELAY_MASK 0xC000000UL
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#define _UART_CTRL_TXDELAY_DEFAULT 0x00000000UL
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#define _UART_CTRL_TXDELAY_NONE 0x00000000UL
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#define _UART_CTRL_TXDELAY_SINGLE 0x00000001UL
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#define _UART_CTRL_TXDELAY_DOUBLE 0x00000002UL
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#define _UART_CTRL_TXDELAY_TRIPLE 0x00000003UL
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#define UART_CTRL_TXDELAY_DEFAULT (_UART_CTRL_TXDELAY_DEFAULT << 26)
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#define UART_CTRL_TXDELAY_NONE (_UART_CTRL_TXDELAY_NONE << 26)
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#define UART_CTRL_TXDELAY_SINGLE (_UART_CTRL_TXDELAY_SINGLE << 26)
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#define UART_CTRL_TXDELAY_DOUBLE (_UART_CTRL_TXDELAY_DOUBLE << 26)
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#define UART_CTRL_TXDELAY_TRIPLE (_UART_CTRL_TXDELAY_TRIPLE << 26)
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#define UART_CTRL_BYTESWAP (0x1UL << 28)
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#define _UART_CTRL_BYTESWAP_SHIFT 28
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#define _UART_CTRL_BYTESWAP_MASK 0x10000000UL
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#define _UART_CTRL_BYTESWAP_DEFAULT 0x00000000UL
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#define UART_CTRL_BYTESWAP_DEFAULT (_UART_CTRL_BYTESWAP_DEFAULT << 28)
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#define UART_CTRL_AUTOTX (0x1UL << 29)
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#define _UART_CTRL_AUTOTX_SHIFT 29
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#define _UART_CTRL_AUTOTX_MASK 0x20000000UL
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#define _UART_CTRL_AUTOTX_DEFAULT 0x00000000UL
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#define UART_CTRL_AUTOTX_DEFAULT (_UART_CTRL_AUTOTX_DEFAULT << 29)
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#define UART_CTRL_MVDIS (0x1UL << 30)
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#define _UART_CTRL_MVDIS_SHIFT 30
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#define _UART_CTRL_MVDIS_MASK 0x40000000UL
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#define _UART_CTRL_MVDIS_DEFAULT 0x00000000UL
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#define UART_CTRL_MVDIS_DEFAULT (_UART_CTRL_MVDIS_DEFAULT << 30)
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#define UART_CTRL_SMSDELAY (0x1UL << 31)
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#define _UART_CTRL_SMSDELAY_SHIFT 31
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#define _UART_CTRL_SMSDELAY_MASK 0x80000000UL
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#define _UART_CTRL_SMSDELAY_DEFAULT 0x00000000UL
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#define UART_CTRL_SMSDELAY_DEFAULT (_UART_CTRL_SMSDELAY_DEFAULT << 31)
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/* Bit fields for UART FRAME */
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#define _UART_FRAME_RESETVALUE 0x00001005UL
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#define _UART_FRAME_MASK 0x0000330FUL
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#define _UART_FRAME_DATABITS_SHIFT 0
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#define _UART_FRAME_DATABITS_MASK 0xFUL
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#define _UART_FRAME_DATABITS_FOUR 0x00000001UL
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#define _UART_FRAME_DATABITS_FIVE 0x00000002UL
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#define _UART_FRAME_DATABITS_SIX 0x00000003UL
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#define _UART_FRAME_DATABITS_SEVEN 0x00000004UL
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#define _UART_FRAME_DATABITS_DEFAULT 0x00000005UL
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#define _UART_FRAME_DATABITS_EIGHT 0x00000005UL
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#define _UART_FRAME_DATABITS_NINE 0x00000006UL
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#define _UART_FRAME_DATABITS_TEN 0x00000007UL
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#define _UART_FRAME_DATABITS_ELEVEN 0x00000008UL
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#define _UART_FRAME_DATABITS_TWELVE 0x00000009UL
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#define _UART_FRAME_DATABITS_THIRTEEN 0x0000000AUL
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#define _UART_FRAME_DATABITS_FOURTEEN 0x0000000BUL
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#define _UART_FRAME_DATABITS_FIFTEEN 0x0000000CUL
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#define _UART_FRAME_DATABITS_SIXTEEN 0x0000000DUL
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#define UART_FRAME_DATABITS_FOUR (_UART_FRAME_DATABITS_FOUR << 0)
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#define UART_FRAME_DATABITS_FIVE (_UART_FRAME_DATABITS_FIVE << 0)
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#define UART_FRAME_DATABITS_SIX (_UART_FRAME_DATABITS_SIX << 0)
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#define UART_FRAME_DATABITS_SEVEN (_UART_FRAME_DATABITS_SEVEN << 0)
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#define UART_FRAME_DATABITS_DEFAULT (_UART_FRAME_DATABITS_DEFAULT << 0)
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#define UART_FRAME_DATABITS_EIGHT (_UART_FRAME_DATABITS_EIGHT << 0)
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#define UART_FRAME_DATABITS_NINE (_UART_FRAME_DATABITS_NINE << 0)
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#define UART_FRAME_DATABITS_TEN (_UART_FRAME_DATABITS_TEN << 0)
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#define UART_FRAME_DATABITS_ELEVEN (_UART_FRAME_DATABITS_ELEVEN << 0)
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#define UART_FRAME_DATABITS_TWELVE (_UART_FRAME_DATABITS_TWELVE << 0)
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#define UART_FRAME_DATABITS_THIRTEEN (_UART_FRAME_DATABITS_THIRTEEN << 0)
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#define UART_FRAME_DATABITS_FOURTEEN (_UART_FRAME_DATABITS_FOURTEEN << 0)
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#define UART_FRAME_DATABITS_FIFTEEN (_UART_FRAME_DATABITS_FIFTEEN << 0)
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#define UART_FRAME_DATABITS_SIXTEEN (_UART_FRAME_DATABITS_SIXTEEN << 0)
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#define _UART_FRAME_PARITY_SHIFT 8
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#define _UART_FRAME_PARITY_MASK 0x300UL
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#define _UART_FRAME_PARITY_DEFAULT 0x00000000UL
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#define _UART_FRAME_PARITY_NONE 0x00000000UL
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#define _UART_FRAME_PARITY_EVEN 0x00000002UL
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#define _UART_FRAME_PARITY_ODD 0x00000003UL
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#define UART_FRAME_PARITY_DEFAULT (_UART_FRAME_PARITY_DEFAULT << 8)
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#define UART_FRAME_PARITY_NONE (_UART_FRAME_PARITY_NONE << 8)
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#define UART_FRAME_PARITY_EVEN (_UART_FRAME_PARITY_EVEN << 8)
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#define UART_FRAME_PARITY_ODD (_UART_FRAME_PARITY_ODD << 8)
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#define _UART_FRAME_STOPBITS_SHIFT 12
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#define _UART_FRAME_STOPBITS_MASK 0x3000UL
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#define _UART_FRAME_STOPBITS_HALF 0x00000000UL
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#define _UART_FRAME_STOPBITS_DEFAULT 0x00000001UL
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#define _UART_FRAME_STOPBITS_ONE 0x00000001UL
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#define _UART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL
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#define _UART_FRAME_STOPBITS_TWO 0x00000003UL
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#define UART_FRAME_STOPBITS_HALF (_UART_FRAME_STOPBITS_HALF << 12)
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#define UART_FRAME_STOPBITS_DEFAULT (_UART_FRAME_STOPBITS_DEFAULT << 12)
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#define UART_FRAME_STOPBITS_ONE (_UART_FRAME_STOPBITS_ONE << 12)
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#define UART_FRAME_STOPBITS_ONEANDAHALF (_UART_FRAME_STOPBITS_ONEANDAHALF << 12)
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#define UART_FRAME_STOPBITS_TWO (_UART_FRAME_STOPBITS_TWO << 12)
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/* Bit fields for UART TRIGCTRL */
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#define _UART_TRIGCTRL_RESETVALUE 0x00000000UL
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#define _UART_TRIGCTRL_MASK 0x00000077UL
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#define _UART_TRIGCTRL_TSEL_SHIFT 0
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#define _UART_TRIGCTRL_TSEL_MASK 0x7UL
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#define _UART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL
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#define _UART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL
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#define _UART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL
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#define _UART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL
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#define _UART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL
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#define _UART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL
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#define _UART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL
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#define _UART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL
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#define _UART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL
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#define UART_TRIGCTRL_TSEL_DEFAULT (_UART_TRIGCTRL_TSEL_DEFAULT << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH0 (_UART_TRIGCTRL_TSEL_PRSCH0 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH1 (_UART_TRIGCTRL_TSEL_PRSCH1 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH2 (_UART_TRIGCTRL_TSEL_PRSCH2 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH3 (_UART_TRIGCTRL_TSEL_PRSCH3 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH4 (_UART_TRIGCTRL_TSEL_PRSCH4 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH5 (_UART_TRIGCTRL_TSEL_PRSCH5 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH6 (_UART_TRIGCTRL_TSEL_PRSCH6 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH7 (_UART_TRIGCTRL_TSEL_PRSCH7 << 0)
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#define UART_TRIGCTRL_RXTEN (0x1UL << 4)
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#define _UART_TRIGCTRL_RXTEN_SHIFT 4
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#define _UART_TRIGCTRL_RXTEN_MASK 0x10UL
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#define _UART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL
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#define UART_TRIGCTRL_RXTEN_DEFAULT (_UART_TRIGCTRL_RXTEN_DEFAULT << 4)
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#define UART_TRIGCTRL_TXTEN (0x1UL << 5)
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#define _UART_TRIGCTRL_TXTEN_SHIFT 5
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#define _UART_TRIGCTRL_TXTEN_MASK 0x20UL
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#define _UART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL
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#define UART_TRIGCTRL_TXTEN_DEFAULT (_UART_TRIGCTRL_TXTEN_DEFAULT << 5)
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#define UART_TRIGCTRL_AUTOTXTEN (0x1UL << 6)
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#define _UART_TRIGCTRL_AUTOTXTEN_SHIFT 6
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#define _UART_TRIGCTRL_AUTOTXTEN_MASK 0x40UL
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#define _UART_TRIGCTRL_AUTOTXTEN_DEFAULT 0x00000000UL
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#define UART_TRIGCTRL_AUTOTXTEN_DEFAULT (_UART_TRIGCTRL_AUTOTXTEN_DEFAULT << 6)
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/* Bit fields for UART CMD */
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#define _UART_CMD_RESETVALUE 0x00000000UL
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#define _UART_CMD_MASK 0x00000FFFUL
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#define UART_CMD_RXEN (0x1UL << 0)
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#define _UART_CMD_RXEN_SHIFT 0
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#define _UART_CMD_RXEN_MASK 0x1UL
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#define _UART_CMD_RXEN_DEFAULT 0x00000000UL
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#define UART_CMD_RXEN_DEFAULT (_UART_CMD_RXEN_DEFAULT << 0)
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#define UART_CMD_RXDIS (0x1UL << 1)
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#define _UART_CMD_RXDIS_SHIFT 1
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#define _UART_CMD_RXDIS_MASK 0x2UL
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#define _UART_CMD_RXDIS_DEFAULT 0x00000000UL
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#define UART_CMD_RXDIS_DEFAULT (_UART_CMD_RXDIS_DEFAULT << 1)
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#define UART_CMD_TXEN (0x1UL << 2)
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#define _UART_CMD_TXEN_SHIFT 2
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#define _UART_CMD_TXEN_MASK 0x4UL
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#define _UART_CMD_TXEN_DEFAULT 0x00000000UL
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#define UART_CMD_TXEN_DEFAULT (_UART_CMD_TXEN_DEFAULT << 2)
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#define UART_CMD_TXDIS (0x1UL << 3)
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#define _UART_CMD_TXDIS_SHIFT 3
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#define _UART_CMD_TXDIS_MASK 0x8UL
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#define _UART_CMD_TXDIS_DEFAULT 0x00000000UL
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#define UART_CMD_TXDIS_DEFAULT (_UART_CMD_TXDIS_DEFAULT << 3)
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#define UART_CMD_MASTEREN (0x1UL << 4)
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#define _UART_CMD_MASTEREN_SHIFT 4
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#define _UART_CMD_MASTEREN_MASK 0x10UL
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#define _UART_CMD_MASTEREN_DEFAULT 0x00000000UL
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#define UART_CMD_MASTEREN_DEFAULT (_UART_CMD_MASTEREN_DEFAULT << 4)
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#define UART_CMD_MASTERDIS (0x1UL << 5)
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#define _UART_CMD_MASTERDIS_SHIFT 5
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#define _UART_CMD_MASTERDIS_MASK 0x20UL
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#define _UART_CMD_MASTERDIS_DEFAULT 0x00000000UL
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#define UART_CMD_MASTERDIS_DEFAULT (_UART_CMD_MASTERDIS_DEFAULT << 5)
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#define UART_CMD_RXBLOCKEN (0x1UL << 6)
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#define _UART_CMD_RXBLOCKEN_SHIFT 6
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#define _UART_CMD_RXBLOCKEN_MASK 0x40UL
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#define _UART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL
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#define UART_CMD_RXBLOCKEN_DEFAULT (_UART_CMD_RXBLOCKEN_DEFAULT << 6)
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#define UART_CMD_RXBLOCKDIS (0x1UL << 7)
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#define _UART_CMD_RXBLOCKDIS_SHIFT 7
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#define _UART_CMD_RXBLOCKDIS_MASK 0x80UL
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#define _UART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL
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#define UART_CMD_RXBLOCKDIS_DEFAULT (_UART_CMD_RXBLOCKDIS_DEFAULT << 7)
359
#define UART_CMD_TXTRIEN (0x1UL << 8)
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#define _UART_CMD_TXTRIEN_SHIFT 8
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#define _UART_CMD_TXTRIEN_MASK 0x100UL
362
#define _UART_CMD_TXTRIEN_DEFAULT 0x00000000UL
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#define UART_CMD_TXTRIEN_DEFAULT (_UART_CMD_TXTRIEN_DEFAULT << 8)
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#define UART_CMD_TXTRIDIS (0x1UL << 9)
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#define _UART_CMD_TXTRIDIS_SHIFT 9
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#define _UART_CMD_TXTRIDIS_MASK 0x200UL
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#define _UART_CMD_TXTRIDIS_DEFAULT 0x00000000UL
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#define UART_CMD_TXTRIDIS_DEFAULT (_UART_CMD_TXTRIDIS_DEFAULT << 9)
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#define UART_CMD_CLEARTX (0x1UL << 10)
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#define _UART_CMD_CLEARTX_SHIFT 10
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#define _UART_CMD_CLEARTX_MASK 0x400UL
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#define _UART_CMD_CLEARTX_DEFAULT 0x00000000UL
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#define UART_CMD_CLEARTX_DEFAULT (_UART_CMD_CLEARTX_DEFAULT << 10)
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#define UART_CMD_CLEARRX (0x1UL << 11)
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#define _UART_CMD_CLEARRX_SHIFT 11
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#define _UART_CMD_CLEARRX_MASK 0x800UL
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#define _UART_CMD_CLEARRX_DEFAULT 0x00000000UL
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#define UART_CMD_CLEARRX_DEFAULT (_UART_CMD_CLEARRX_DEFAULT << 11)
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/* Bit fields for UART STATUS */
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#define _UART_STATUS_RESETVALUE 0x00000040UL
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#define _UART_STATUS_MASK 0x00001FFFUL
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#define UART_STATUS_RXENS (0x1UL << 0)
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#define _UART_STATUS_RXENS_SHIFT 0
385
#define _UART_STATUS_RXENS_MASK 0x1UL
386
#define _UART_STATUS_RXENS_DEFAULT 0x00000000UL
387
#define UART_STATUS_RXENS_DEFAULT (_UART_STATUS_RXENS_DEFAULT << 0)
388
#define UART_STATUS_TXENS (0x1UL << 1)
389
#define _UART_STATUS_TXENS_SHIFT 1
390
#define _UART_STATUS_TXENS_MASK 0x2UL
391
#define _UART_STATUS_TXENS_DEFAULT 0x00000000UL
392
#define UART_STATUS_TXENS_DEFAULT (_UART_STATUS_TXENS_DEFAULT << 1)
393
#define UART_STATUS_MASTER (0x1UL << 2)
394
#define _UART_STATUS_MASTER_SHIFT 2
395
#define _UART_STATUS_MASTER_MASK 0x4UL
396
#define _UART_STATUS_MASTER_DEFAULT 0x00000000UL
397
#define UART_STATUS_MASTER_DEFAULT (_UART_STATUS_MASTER_DEFAULT << 2)
398
#define UART_STATUS_RXBLOCK (0x1UL << 3)
399
#define _UART_STATUS_RXBLOCK_SHIFT 3
400
#define _UART_STATUS_RXBLOCK_MASK 0x8UL
401
#define _UART_STATUS_RXBLOCK_DEFAULT 0x00000000UL
402
#define UART_STATUS_RXBLOCK_DEFAULT (_UART_STATUS_RXBLOCK_DEFAULT << 3)
403
#define UART_STATUS_TXTRI (0x1UL << 4)
404
#define _UART_STATUS_TXTRI_SHIFT 4
405
#define _UART_STATUS_TXTRI_MASK 0x10UL
406
#define _UART_STATUS_TXTRI_DEFAULT 0x00000000UL
407
#define UART_STATUS_TXTRI_DEFAULT (_UART_STATUS_TXTRI_DEFAULT << 4)
408
#define UART_STATUS_TXC (0x1UL << 5)
409
#define _UART_STATUS_TXC_SHIFT 5
410
#define _UART_STATUS_TXC_MASK 0x20UL
411
#define _UART_STATUS_TXC_DEFAULT 0x00000000UL
412
#define UART_STATUS_TXC_DEFAULT (_UART_STATUS_TXC_DEFAULT << 5)
413
#define UART_STATUS_TXBL (0x1UL << 6)
414
#define _UART_STATUS_TXBL_SHIFT 6
415
#define _UART_STATUS_TXBL_MASK 0x40UL
416
#define _UART_STATUS_TXBL_DEFAULT 0x00000001UL
417
#define UART_STATUS_TXBL_DEFAULT (_UART_STATUS_TXBL_DEFAULT << 6)
418
#define UART_STATUS_RXDATAV (0x1UL << 7)
419
#define _UART_STATUS_RXDATAV_SHIFT 7
420
#define _UART_STATUS_RXDATAV_MASK 0x80UL
421
#define _UART_STATUS_RXDATAV_DEFAULT 0x00000000UL
422
#define UART_STATUS_RXDATAV_DEFAULT (_UART_STATUS_RXDATAV_DEFAULT << 7)
423
#define UART_STATUS_RXFULL (0x1UL << 8)
424
#define _UART_STATUS_RXFULL_SHIFT 8
425
#define _UART_STATUS_RXFULL_MASK 0x100UL
426
#define _UART_STATUS_RXFULL_DEFAULT 0x00000000UL
427
#define UART_STATUS_RXFULL_DEFAULT (_UART_STATUS_RXFULL_DEFAULT << 8)
428
#define UART_STATUS_TXBDRIGHT (0x1UL << 9)
429
#define _UART_STATUS_TXBDRIGHT_SHIFT 9
430
#define _UART_STATUS_TXBDRIGHT_MASK 0x200UL
431
#define _UART_STATUS_TXBDRIGHT_DEFAULT 0x00000000UL
432
#define UART_STATUS_TXBDRIGHT_DEFAULT (_UART_STATUS_TXBDRIGHT_DEFAULT << 9)
433
#define UART_STATUS_TXBSRIGHT (0x1UL << 10)
434
#define _UART_STATUS_TXBSRIGHT_SHIFT 10
435
#define _UART_STATUS_TXBSRIGHT_MASK 0x400UL
436
#define _UART_STATUS_TXBSRIGHT_DEFAULT 0x00000000UL
437
#define UART_STATUS_TXBSRIGHT_DEFAULT (_UART_STATUS_TXBSRIGHT_DEFAULT << 10)
438
#define UART_STATUS_RXDATAVRIGHT (0x1UL << 11)
439
#define _UART_STATUS_RXDATAVRIGHT_SHIFT 11
440
#define _UART_STATUS_RXDATAVRIGHT_MASK 0x800UL
441
#define _UART_STATUS_RXDATAVRIGHT_DEFAULT 0x00000000UL
442
#define UART_STATUS_RXDATAVRIGHT_DEFAULT (_UART_STATUS_RXDATAVRIGHT_DEFAULT << 11)
443
#define UART_STATUS_RXFULLRIGHT (0x1UL << 12)
444
#define _UART_STATUS_RXFULLRIGHT_SHIFT 12
445
#define _UART_STATUS_RXFULLRIGHT_MASK 0x1000UL
446
#define _UART_STATUS_RXFULLRIGHT_DEFAULT 0x00000000UL
447
#define UART_STATUS_RXFULLRIGHT_DEFAULT (_UART_STATUS_RXFULLRIGHT_DEFAULT << 12)
449
/* Bit fields for UART CLKDIV */
450
#define _UART_CLKDIV_RESETVALUE 0x00000000UL
451
#define _UART_CLKDIV_MASK 0x001FFFC0UL
452
#define _UART_CLKDIV_DIV_SHIFT 6
453
#define _UART_CLKDIV_DIV_MASK 0x1FFFC0UL
454
#define _UART_CLKDIV_DIV_DEFAULT 0x00000000UL
455
#define UART_CLKDIV_DIV_DEFAULT (_UART_CLKDIV_DIV_DEFAULT << 6)
457
/* Bit fields for UART RXDATAX */
458
#define _UART_RXDATAX_RESETVALUE 0x00000000UL
459
#define _UART_RXDATAX_MASK 0x0000C1FFUL
460
#define _UART_RXDATAX_RXDATA_SHIFT 0
461
#define _UART_RXDATAX_RXDATA_MASK 0x1FFUL
462
#define _UART_RXDATAX_RXDATA_DEFAULT 0x00000000UL
463
#define UART_RXDATAX_RXDATA_DEFAULT (_UART_RXDATAX_RXDATA_DEFAULT << 0)
464
#define UART_RXDATAX_PERR (0x1UL << 14)
465
#define _UART_RXDATAX_PERR_SHIFT 14
466
#define _UART_RXDATAX_PERR_MASK 0x4000UL
467
#define _UART_RXDATAX_PERR_DEFAULT 0x00000000UL
468
#define UART_RXDATAX_PERR_DEFAULT (_UART_RXDATAX_PERR_DEFAULT << 14)
469
#define UART_RXDATAX_FERR (0x1UL << 15)
470
#define _UART_RXDATAX_FERR_SHIFT 15
471
#define _UART_RXDATAX_FERR_MASK 0x8000UL
472
#define _UART_RXDATAX_FERR_DEFAULT 0x00000000UL
473
#define UART_RXDATAX_FERR_DEFAULT (_UART_RXDATAX_FERR_DEFAULT << 15)
475
/* Bit fields for UART RXDATA */
476
#define _UART_RXDATA_RESETVALUE 0x00000000UL
477
#define _UART_RXDATA_MASK 0x000000FFUL
478
#define _UART_RXDATA_RXDATA_SHIFT 0
479
#define _UART_RXDATA_RXDATA_MASK 0xFFUL
480
#define _UART_RXDATA_RXDATA_DEFAULT 0x00000000UL
481
#define UART_RXDATA_RXDATA_DEFAULT (_UART_RXDATA_RXDATA_DEFAULT << 0)
483
/* Bit fields for UART RXDOUBLEX */
484
#define _UART_RXDOUBLEX_RESETVALUE 0x00000000UL
485
#define _UART_RXDOUBLEX_MASK 0xC1FFC1FFUL
486
#define _UART_RXDOUBLEX_RXDATA0_SHIFT 0
487
#define _UART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL
488
#define _UART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL
489
#define UART_RXDOUBLEX_RXDATA0_DEFAULT (_UART_RXDOUBLEX_RXDATA0_DEFAULT << 0)
490
#define UART_RXDOUBLEX_PERR0 (0x1UL << 14)
491
#define _UART_RXDOUBLEX_PERR0_SHIFT 14
492
#define _UART_RXDOUBLEX_PERR0_MASK 0x4000UL
493
#define _UART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL
494
#define UART_RXDOUBLEX_PERR0_DEFAULT (_UART_RXDOUBLEX_PERR0_DEFAULT << 14)
495
#define UART_RXDOUBLEX_FERR0 (0x1UL << 15)
496
#define _UART_RXDOUBLEX_FERR0_SHIFT 15
497
#define _UART_RXDOUBLEX_FERR0_MASK 0x8000UL
498
#define _UART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL
499
#define UART_RXDOUBLEX_FERR0_DEFAULT (_UART_RXDOUBLEX_FERR0_DEFAULT << 15)
500
#define _UART_RXDOUBLEX_RXDATA1_SHIFT 16
501
#define _UART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL
502
#define _UART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL
503
#define UART_RXDOUBLEX_RXDATA1_DEFAULT (_UART_RXDOUBLEX_RXDATA1_DEFAULT << 16)
504
#define UART_RXDOUBLEX_PERR1 (0x1UL << 30)
505
#define _UART_RXDOUBLEX_PERR1_SHIFT 30
506
#define _UART_RXDOUBLEX_PERR1_MASK 0x40000000UL
507
#define _UART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL
508
#define UART_RXDOUBLEX_PERR1_DEFAULT (_UART_RXDOUBLEX_PERR1_DEFAULT << 30)
509
#define UART_RXDOUBLEX_FERR1 (0x1UL << 31)
510
#define _UART_RXDOUBLEX_FERR1_SHIFT 31
511
#define _UART_RXDOUBLEX_FERR1_MASK 0x80000000UL
512
#define _UART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL
513
#define UART_RXDOUBLEX_FERR1_DEFAULT (_UART_RXDOUBLEX_FERR1_DEFAULT << 31)
515
/* Bit fields for UART RXDOUBLE */
516
#define _UART_RXDOUBLE_RESETVALUE 0x00000000UL
517
#define _UART_RXDOUBLE_MASK 0x0000FFFFUL
518
#define _UART_RXDOUBLE_RXDATA0_SHIFT 0
519
#define _UART_RXDOUBLE_RXDATA0_MASK 0xFFUL
520
#define _UART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL
521
#define UART_RXDOUBLE_RXDATA0_DEFAULT (_UART_RXDOUBLE_RXDATA0_DEFAULT << 0)
522
#define _UART_RXDOUBLE_RXDATA1_SHIFT 8
523
#define _UART_RXDOUBLE_RXDATA1_MASK 0xFF00UL
524
#define _UART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL
525
#define UART_RXDOUBLE_RXDATA1_DEFAULT (_UART_RXDOUBLE_RXDATA1_DEFAULT << 8)
527
/* Bit fields for UART RXDATAXP */
528
#define _UART_RXDATAXP_RESETVALUE 0x00000000UL
529
#define _UART_RXDATAXP_MASK 0x0000C1FFUL
530
#define _UART_RXDATAXP_RXDATAP_SHIFT 0
531
#define _UART_RXDATAXP_RXDATAP_MASK 0x1FFUL
532
#define _UART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL
533
#define UART_RXDATAXP_RXDATAP_DEFAULT (_UART_RXDATAXP_RXDATAP_DEFAULT << 0)
534
#define UART_RXDATAXP_PERRP (0x1UL << 14)
535
#define _UART_RXDATAXP_PERRP_SHIFT 14
536
#define _UART_RXDATAXP_PERRP_MASK 0x4000UL
537
#define _UART_RXDATAXP_PERRP_DEFAULT 0x00000000UL
538
#define UART_RXDATAXP_PERRP_DEFAULT (_UART_RXDATAXP_PERRP_DEFAULT << 14)
539
#define UART_RXDATAXP_FERRP (0x1UL << 15)
540
#define _UART_RXDATAXP_FERRP_SHIFT 15
541
#define _UART_RXDATAXP_FERRP_MASK 0x8000UL
542
#define _UART_RXDATAXP_FERRP_DEFAULT 0x00000000UL
543
#define UART_RXDATAXP_FERRP_DEFAULT (_UART_RXDATAXP_FERRP_DEFAULT << 15)
545
/* Bit fields for UART RXDOUBLEXP */
546
#define _UART_RXDOUBLEXP_RESETVALUE 0x00000000UL
547
#define _UART_RXDOUBLEXP_MASK 0xC1FFC1FFUL
548
#define _UART_RXDOUBLEXP_RXDATAP0_SHIFT 0
549
#define _UART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL
550
#define _UART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL
551
#define UART_RXDOUBLEXP_RXDATAP0_DEFAULT (_UART_RXDOUBLEXP_RXDATAP0_DEFAULT << 0)
552
#define UART_RXDOUBLEXP_PERRP0 (0x1UL << 14)
553
#define _UART_RXDOUBLEXP_PERRP0_SHIFT 14
554
#define _UART_RXDOUBLEXP_PERRP0_MASK 0x4000UL
555
#define _UART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL
556
#define UART_RXDOUBLEXP_PERRP0_DEFAULT (_UART_RXDOUBLEXP_PERRP0_DEFAULT << 14)
557
#define UART_RXDOUBLEXP_FERRP0 (0x1UL << 15)
558
#define _UART_RXDOUBLEXP_FERRP0_SHIFT 15
559
#define _UART_RXDOUBLEXP_FERRP0_MASK 0x8000UL
560
#define _UART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL
561
#define UART_RXDOUBLEXP_FERRP0_DEFAULT (_UART_RXDOUBLEXP_FERRP0_DEFAULT << 15)
562
#define _UART_RXDOUBLEXP_RXDATAP1_SHIFT 16
563
#define _UART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL
564
#define _UART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL
565
#define UART_RXDOUBLEXP_RXDATAP1_DEFAULT (_UART_RXDOUBLEXP_RXDATAP1_DEFAULT << 16)
566
#define UART_RXDOUBLEXP_PERRP1 (0x1UL << 30)
567
#define _UART_RXDOUBLEXP_PERRP1_SHIFT 30
568
#define _UART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL
569
#define _UART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL
570
#define UART_RXDOUBLEXP_PERRP1_DEFAULT (_UART_RXDOUBLEXP_PERRP1_DEFAULT << 30)
571
#define UART_RXDOUBLEXP_FERRP1 (0x1UL << 31)
572
#define _UART_RXDOUBLEXP_FERRP1_SHIFT 31
573
#define _UART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL
574
#define _UART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL
575
#define UART_RXDOUBLEXP_FERRP1_DEFAULT (_UART_RXDOUBLEXP_FERRP1_DEFAULT << 31)
577
/* Bit fields for UART TXDATAX */
578
#define _UART_TXDATAX_RESETVALUE 0x00000000UL
579
#define _UART_TXDATAX_MASK 0x0000F9FFUL
580
#define _UART_TXDATAX_TXDATAX_SHIFT 0
581
#define _UART_TXDATAX_TXDATAX_MASK 0x1FFUL
582
#define _UART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL
583
#define UART_TXDATAX_TXDATAX_DEFAULT (_UART_TXDATAX_TXDATAX_DEFAULT << 0)
584
#define UART_TXDATAX_UBRXAT (0x1UL << 11)
585
#define _UART_TXDATAX_UBRXAT_SHIFT 11
586
#define _UART_TXDATAX_UBRXAT_MASK 0x800UL
587
#define _UART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL
588
#define UART_TXDATAX_UBRXAT_DEFAULT (_UART_TXDATAX_UBRXAT_DEFAULT << 11)
589
#define UART_TXDATAX_TXTRIAT (0x1UL << 12)
590
#define _UART_TXDATAX_TXTRIAT_SHIFT 12
591
#define _UART_TXDATAX_TXTRIAT_MASK 0x1000UL
592
#define _UART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL
593
#define UART_TXDATAX_TXTRIAT_DEFAULT (_UART_TXDATAX_TXTRIAT_DEFAULT << 12)
594
#define UART_TXDATAX_TXBREAK (0x1UL << 13)
595
#define _UART_TXDATAX_TXBREAK_SHIFT 13
596
#define _UART_TXDATAX_TXBREAK_MASK 0x2000UL
597
#define _UART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL
598
#define UART_TXDATAX_TXBREAK_DEFAULT (_UART_TXDATAX_TXBREAK_DEFAULT << 13)
599
#define UART_TXDATAX_TXDISAT (0x1UL << 14)
600
#define _UART_TXDATAX_TXDISAT_SHIFT 14
601
#define _UART_TXDATAX_TXDISAT_MASK 0x4000UL
602
#define _UART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL
603
#define UART_TXDATAX_TXDISAT_DEFAULT (_UART_TXDATAX_TXDISAT_DEFAULT << 14)
604
#define UART_TXDATAX_RXENAT (0x1UL << 15)
605
#define _UART_TXDATAX_RXENAT_SHIFT 15
606
#define _UART_TXDATAX_RXENAT_MASK 0x8000UL
607
#define _UART_TXDATAX_RXENAT_DEFAULT 0x00000000UL
608
#define UART_TXDATAX_RXENAT_DEFAULT (_UART_TXDATAX_RXENAT_DEFAULT << 15)
610
/* Bit fields for UART TXDATA */
611
#define _UART_TXDATA_RESETVALUE 0x00000000UL
612
#define _UART_TXDATA_MASK 0x000000FFUL
613
#define _UART_TXDATA_TXDATA_SHIFT 0
614
#define _UART_TXDATA_TXDATA_MASK 0xFFUL
615
#define _UART_TXDATA_TXDATA_DEFAULT 0x00000000UL
616
#define UART_TXDATA_TXDATA_DEFAULT (_UART_TXDATA_TXDATA_DEFAULT << 0)
618
/* Bit fields for UART TXDOUBLEX */
619
#define _UART_TXDOUBLEX_RESETVALUE 0x00000000UL
620
#define _UART_TXDOUBLEX_MASK 0xF9FFF9FFUL
621
#define _UART_TXDOUBLEX_TXDATA0_SHIFT 0
622
#define _UART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL
623
#define _UART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL
624
#define UART_TXDOUBLEX_TXDATA0_DEFAULT (_UART_TXDOUBLEX_TXDATA0_DEFAULT << 0)
625
#define UART_TXDOUBLEX_UBRXAT0 (0x1UL << 11)
626
#define _UART_TXDOUBLEX_UBRXAT0_SHIFT 11
627
#define _UART_TXDOUBLEX_UBRXAT0_MASK 0x800UL
628
#define _UART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL
629
#define UART_TXDOUBLEX_UBRXAT0_DEFAULT (_UART_TXDOUBLEX_UBRXAT0_DEFAULT << 11)
630
#define UART_TXDOUBLEX_TXTRIAT0 (0x1UL << 12)
631
#define _UART_TXDOUBLEX_TXTRIAT0_SHIFT 12
632
#define _UART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL
633
#define _UART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL
634
#define UART_TXDOUBLEX_TXTRIAT0_DEFAULT (_UART_TXDOUBLEX_TXTRIAT0_DEFAULT << 12)
635
#define UART_TXDOUBLEX_TXBREAK0 (0x1UL << 13)
636
#define _UART_TXDOUBLEX_TXBREAK0_SHIFT 13
637
#define _UART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL
638
#define _UART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL
639
#define UART_TXDOUBLEX_TXBREAK0_DEFAULT (_UART_TXDOUBLEX_TXBREAK0_DEFAULT << 13)
640
#define UART_TXDOUBLEX_TXDISAT0 (0x1UL << 14)
641
#define _UART_TXDOUBLEX_TXDISAT0_SHIFT 14
642
#define _UART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL
643
#define _UART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL
644
#define UART_TXDOUBLEX_TXDISAT0_DEFAULT (_UART_TXDOUBLEX_TXDISAT0_DEFAULT << 14)
645
#define UART_TXDOUBLEX_RXENAT0 (0x1UL << 15)
646
#define _UART_TXDOUBLEX_RXENAT0_SHIFT 15
647
#define _UART_TXDOUBLEX_RXENAT0_MASK 0x8000UL
648
#define _UART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL
649
#define UART_TXDOUBLEX_RXENAT0_DEFAULT (_UART_TXDOUBLEX_RXENAT0_DEFAULT << 15)
650
#define _UART_TXDOUBLEX_TXDATA1_SHIFT 16
651
#define _UART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL
652
#define _UART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL
653
#define UART_TXDOUBLEX_TXDATA1_DEFAULT (_UART_TXDOUBLEX_TXDATA1_DEFAULT << 16)
654
#define UART_TXDOUBLEX_UBRXAT1 (0x1UL << 27)
655
#define _UART_TXDOUBLEX_UBRXAT1_SHIFT 27
656
#define _UART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL
657
#define _UART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL
658
#define UART_TXDOUBLEX_UBRXAT1_DEFAULT (_UART_TXDOUBLEX_UBRXAT1_DEFAULT << 27)
659
#define UART_TXDOUBLEX_TXTRIAT1 (0x1UL << 28)
660
#define _UART_TXDOUBLEX_TXTRIAT1_SHIFT 28
661
#define _UART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL
662
#define _UART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL
663
#define UART_TXDOUBLEX_TXTRIAT1_DEFAULT (_UART_TXDOUBLEX_TXTRIAT1_DEFAULT << 28)
664
#define UART_TXDOUBLEX_TXBREAK1 (0x1UL << 29)
665
#define _UART_TXDOUBLEX_TXBREAK1_SHIFT 29
666
#define _UART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL
667
#define _UART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL
668
#define UART_TXDOUBLEX_TXBREAK1_DEFAULT (_UART_TXDOUBLEX_TXBREAK1_DEFAULT << 29)
669
#define UART_TXDOUBLEX_TXDISAT1 (0x1UL << 30)
670
#define _UART_TXDOUBLEX_TXDISAT1_SHIFT 30
671
#define _UART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL
672
#define _UART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL
673
#define UART_TXDOUBLEX_TXDISAT1_DEFAULT (_UART_TXDOUBLEX_TXDISAT1_DEFAULT << 30)
674
#define UART_TXDOUBLEX_RXENAT1 (0x1UL << 31)
675
#define _UART_TXDOUBLEX_RXENAT1_SHIFT 31
676
#define _UART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL
677
#define _UART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL
678
#define UART_TXDOUBLEX_RXENAT1_DEFAULT (_UART_TXDOUBLEX_RXENAT1_DEFAULT << 31)
680
/* Bit fields for UART TXDOUBLE */
681
#define _UART_TXDOUBLE_RESETVALUE 0x00000000UL
682
#define _UART_TXDOUBLE_MASK 0x0000FFFFUL
683
#define _UART_TXDOUBLE_TXDATA0_SHIFT 0
684
#define _UART_TXDOUBLE_TXDATA0_MASK 0xFFUL
685
#define _UART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL
686
#define UART_TXDOUBLE_TXDATA0_DEFAULT (_UART_TXDOUBLE_TXDATA0_DEFAULT << 0)
687
#define _UART_TXDOUBLE_TXDATA1_SHIFT 8
688
#define _UART_TXDOUBLE_TXDATA1_MASK 0xFF00UL
689
#define _UART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL
690
#define UART_TXDOUBLE_TXDATA1_DEFAULT (_UART_TXDOUBLE_TXDATA1_DEFAULT << 8)
692
/* Bit fields for UART IF */
693
#define _UART_IF_RESETVALUE 0x00000002UL
694
#define _UART_IF_MASK 0x00001FFFUL
695
#define UART_IF_TXC (0x1UL << 0)
696
#define _UART_IF_TXC_SHIFT 0
697
#define _UART_IF_TXC_MASK 0x1UL
698
#define _UART_IF_TXC_DEFAULT 0x00000000UL
699
#define UART_IF_TXC_DEFAULT (_UART_IF_TXC_DEFAULT << 0)
700
#define UART_IF_TXBL (0x1UL << 1)
701
#define _UART_IF_TXBL_SHIFT 1
702
#define _UART_IF_TXBL_MASK 0x2UL
703
#define _UART_IF_TXBL_DEFAULT 0x00000001UL
704
#define UART_IF_TXBL_DEFAULT (_UART_IF_TXBL_DEFAULT << 1)
705
#define UART_IF_RXDATAV (0x1UL << 2)
706
#define _UART_IF_RXDATAV_SHIFT 2
707
#define _UART_IF_RXDATAV_MASK 0x4UL
708
#define _UART_IF_RXDATAV_DEFAULT 0x00000000UL
709
#define UART_IF_RXDATAV_DEFAULT (_UART_IF_RXDATAV_DEFAULT << 2)
710
#define UART_IF_RXFULL (0x1UL << 3)
711
#define _UART_IF_RXFULL_SHIFT 3
712
#define _UART_IF_RXFULL_MASK 0x8UL
713
#define _UART_IF_RXFULL_DEFAULT 0x00000000UL
714
#define UART_IF_RXFULL_DEFAULT (_UART_IF_RXFULL_DEFAULT << 3)
715
#define UART_IF_RXOF (0x1UL << 4)
716
#define _UART_IF_RXOF_SHIFT 4
717
#define _UART_IF_RXOF_MASK 0x10UL
718
#define _UART_IF_RXOF_DEFAULT 0x00000000UL
719
#define UART_IF_RXOF_DEFAULT (_UART_IF_RXOF_DEFAULT << 4)
720
#define UART_IF_RXUF (0x1UL << 5)
721
#define _UART_IF_RXUF_SHIFT 5
722
#define _UART_IF_RXUF_MASK 0x20UL
723
#define _UART_IF_RXUF_DEFAULT 0x00000000UL
724
#define UART_IF_RXUF_DEFAULT (_UART_IF_RXUF_DEFAULT << 5)
725
#define UART_IF_TXOF (0x1UL << 6)
726
#define _UART_IF_TXOF_SHIFT 6
727
#define _UART_IF_TXOF_MASK 0x40UL
728
#define _UART_IF_TXOF_DEFAULT 0x00000000UL
729
#define UART_IF_TXOF_DEFAULT (_UART_IF_TXOF_DEFAULT << 6)
730
#define UART_IF_TXUF (0x1UL << 7)
731
#define _UART_IF_TXUF_SHIFT 7
732
#define _UART_IF_TXUF_MASK 0x80UL
733
#define _UART_IF_TXUF_DEFAULT 0x00000000UL
734
#define UART_IF_TXUF_DEFAULT (_UART_IF_TXUF_DEFAULT << 7)
735
#define UART_IF_PERR (0x1UL << 8)
736
#define _UART_IF_PERR_SHIFT 8
737
#define _UART_IF_PERR_MASK 0x100UL
738
#define _UART_IF_PERR_DEFAULT 0x00000000UL
739
#define UART_IF_PERR_DEFAULT (_UART_IF_PERR_DEFAULT << 8)
740
#define UART_IF_FERR (0x1UL << 9)
741
#define _UART_IF_FERR_SHIFT 9
742
#define _UART_IF_FERR_MASK 0x200UL
743
#define _UART_IF_FERR_DEFAULT 0x00000000UL
744
#define UART_IF_FERR_DEFAULT (_UART_IF_FERR_DEFAULT << 9)
745
#define UART_IF_MPAF (0x1UL << 10)
746
#define _UART_IF_MPAF_SHIFT 10
747
#define _UART_IF_MPAF_MASK 0x400UL
748
#define _UART_IF_MPAF_DEFAULT 0x00000000UL
749
#define UART_IF_MPAF_DEFAULT (_UART_IF_MPAF_DEFAULT << 10)
750
#define UART_IF_SSM (0x1UL << 11)
751
#define _UART_IF_SSM_SHIFT 11
752
#define _UART_IF_SSM_MASK 0x800UL
753
#define _UART_IF_SSM_DEFAULT 0x00000000UL
754
#define UART_IF_SSM_DEFAULT (_UART_IF_SSM_DEFAULT << 11)
755
#define UART_IF_CCF (0x1UL << 12)
756
#define _UART_IF_CCF_SHIFT 12
757
#define _UART_IF_CCF_MASK 0x1000UL
758
#define _UART_IF_CCF_DEFAULT 0x00000000UL
759
#define UART_IF_CCF_DEFAULT (_UART_IF_CCF_DEFAULT << 12)
761
/* Bit fields for UART IFS */
762
#define _UART_IFS_RESETVALUE 0x00000000UL
763
#define _UART_IFS_MASK 0x00001FF9UL
764
#define UART_IFS_TXC (0x1UL << 0)
765
#define _UART_IFS_TXC_SHIFT 0
766
#define _UART_IFS_TXC_MASK 0x1UL
767
#define _UART_IFS_TXC_DEFAULT 0x00000000UL
768
#define UART_IFS_TXC_DEFAULT (_UART_IFS_TXC_DEFAULT << 0)
769
#define UART_IFS_RXFULL (0x1UL << 3)
770
#define _UART_IFS_RXFULL_SHIFT 3
771
#define _UART_IFS_RXFULL_MASK 0x8UL
772
#define _UART_IFS_RXFULL_DEFAULT 0x00000000UL
773
#define UART_IFS_RXFULL_DEFAULT (_UART_IFS_RXFULL_DEFAULT << 3)
774
#define UART_IFS_RXOF (0x1UL << 4)
775
#define _UART_IFS_RXOF_SHIFT 4
776
#define _UART_IFS_RXOF_MASK 0x10UL
777
#define _UART_IFS_RXOF_DEFAULT 0x00000000UL
778
#define UART_IFS_RXOF_DEFAULT (_UART_IFS_RXOF_DEFAULT << 4)
779
#define UART_IFS_RXUF (0x1UL << 5)
780
#define _UART_IFS_RXUF_SHIFT 5
781
#define _UART_IFS_RXUF_MASK 0x20UL
782
#define _UART_IFS_RXUF_DEFAULT 0x00000000UL
783
#define UART_IFS_RXUF_DEFAULT (_UART_IFS_RXUF_DEFAULT << 5)
784
#define UART_IFS_TXOF (0x1UL << 6)
785
#define _UART_IFS_TXOF_SHIFT 6
786
#define _UART_IFS_TXOF_MASK 0x40UL
787
#define _UART_IFS_TXOF_DEFAULT 0x00000000UL
788
#define UART_IFS_TXOF_DEFAULT (_UART_IFS_TXOF_DEFAULT << 6)
789
#define UART_IFS_TXUF (0x1UL << 7)
790
#define _UART_IFS_TXUF_SHIFT 7
791
#define _UART_IFS_TXUF_MASK 0x80UL
792
#define _UART_IFS_TXUF_DEFAULT 0x00000000UL
793
#define UART_IFS_TXUF_DEFAULT (_UART_IFS_TXUF_DEFAULT << 7)
794
#define UART_IFS_PERR (0x1UL << 8)
795
#define _UART_IFS_PERR_SHIFT 8
796
#define _UART_IFS_PERR_MASK 0x100UL
797
#define _UART_IFS_PERR_DEFAULT 0x00000000UL
798
#define UART_IFS_PERR_DEFAULT (_UART_IFS_PERR_DEFAULT << 8)
799
#define UART_IFS_FERR (0x1UL << 9)
800
#define _UART_IFS_FERR_SHIFT 9
801
#define _UART_IFS_FERR_MASK 0x200UL
802
#define _UART_IFS_FERR_DEFAULT 0x00000000UL
803
#define UART_IFS_FERR_DEFAULT (_UART_IFS_FERR_DEFAULT << 9)
804
#define UART_IFS_MPAF (0x1UL << 10)
805
#define _UART_IFS_MPAF_SHIFT 10
806
#define _UART_IFS_MPAF_MASK 0x400UL
807
#define _UART_IFS_MPAF_DEFAULT 0x00000000UL
808
#define UART_IFS_MPAF_DEFAULT (_UART_IFS_MPAF_DEFAULT << 10)
809
#define UART_IFS_SSM (0x1UL << 11)
810
#define _UART_IFS_SSM_SHIFT 11
811
#define _UART_IFS_SSM_MASK 0x800UL
812
#define _UART_IFS_SSM_DEFAULT 0x00000000UL
813
#define UART_IFS_SSM_DEFAULT (_UART_IFS_SSM_DEFAULT << 11)
814
#define UART_IFS_CCF (0x1UL << 12)
815
#define _UART_IFS_CCF_SHIFT 12
816
#define _UART_IFS_CCF_MASK 0x1000UL
817
#define _UART_IFS_CCF_DEFAULT 0x00000000UL
818
#define UART_IFS_CCF_DEFAULT (_UART_IFS_CCF_DEFAULT << 12)
820
/* Bit fields for UART IFC */
821
#define _UART_IFC_RESETVALUE 0x00000000UL
822
#define _UART_IFC_MASK 0x00001FF9UL
823
#define UART_IFC_TXC (0x1UL << 0)
824
#define _UART_IFC_TXC_SHIFT 0
825
#define _UART_IFC_TXC_MASK 0x1UL
826
#define _UART_IFC_TXC_DEFAULT 0x00000000UL
827
#define UART_IFC_TXC_DEFAULT (_UART_IFC_TXC_DEFAULT << 0)
828
#define UART_IFC_RXFULL (0x1UL << 3)
829
#define _UART_IFC_RXFULL_SHIFT 3
830
#define _UART_IFC_RXFULL_MASK 0x8UL
831
#define _UART_IFC_RXFULL_DEFAULT 0x00000000UL
832
#define UART_IFC_RXFULL_DEFAULT (_UART_IFC_RXFULL_DEFAULT << 3)
833
#define UART_IFC_RXOF (0x1UL << 4)
834
#define _UART_IFC_RXOF_SHIFT 4
835
#define _UART_IFC_RXOF_MASK 0x10UL
836
#define _UART_IFC_RXOF_DEFAULT 0x00000000UL
837
#define UART_IFC_RXOF_DEFAULT (_UART_IFC_RXOF_DEFAULT << 4)
838
#define UART_IFC_RXUF (0x1UL << 5)
839
#define _UART_IFC_RXUF_SHIFT 5
840
#define _UART_IFC_RXUF_MASK 0x20UL
841
#define _UART_IFC_RXUF_DEFAULT 0x00000000UL
842
#define UART_IFC_RXUF_DEFAULT (_UART_IFC_RXUF_DEFAULT << 5)
843
#define UART_IFC_TXOF (0x1UL << 6)
844
#define _UART_IFC_TXOF_SHIFT 6
845
#define _UART_IFC_TXOF_MASK 0x40UL
846
#define _UART_IFC_TXOF_DEFAULT 0x00000000UL
847
#define UART_IFC_TXOF_DEFAULT (_UART_IFC_TXOF_DEFAULT << 6)
848
#define UART_IFC_TXUF (0x1UL << 7)
849
#define _UART_IFC_TXUF_SHIFT 7
850
#define _UART_IFC_TXUF_MASK 0x80UL
851
#define _UART_IFC_TXUF_DEFAULT 0x00000000UL
852
#define UART_IFC_TXUF_DEFAULT (_UART_IFC_TXUF_DEFAULT << 7)
853
#define UART_IFC_PERR (0x1UL << 8)
854
#define _UART_IFC_PERR_SHIFT 8
855
#define _UART_IFC_PERR_MASK 0x100UL
856
#define _UART_IFC_PERR_DEFAULT 0x00000000UL
857
#define UART_IFC_PERR_DEFAULT (_UART_IFC_PERR_DEFAULT << 8)
858
#define UART_IFC_FERR (0x1UL << 9)
859
#define _UART_IFC_FERR_SHIFT 9
860
#define _UART_IFC_FERR_MASK 0x200UL
861
#define _UART_IFC_FERR_DEFAULT 0x00000000UL
862
#define UART_IFC_FERR_DEFAULT (_UART_IFC_FERR_DEFAULT << 9)
863
#define UART_IFC_MPAF (0x1UL << 10)
864
#define _UART_IFC_MPAF_SHIFT 10
865
#define _UART_IFC_MPAF_MASK 0x400UL
866
#define _UART_IFC_MPAF_DEFAULT 0x00000000UL
867
#define UART_IFC_MPAF_DEFAULT (_UART_IFC_MPAF_DEFAULT << 10)
868
#define UART_IFC_SSM (0x1UL << 11)
869
#define _UART_IFC_SSM_SHIFT 11
870
#define _UART_IFC_SSM_MASK 0x800UL
871
#define _UART_IFC_SSM_DEFAULT 0x00000000UL
872
#define UART_IFC_SSM_DEFAULT (_UART_IFC_SSM_DEFAULT << 11)
873
#define UART_IFC_CCF (0x1UL << 12)
874
#define _UART_IFC_CCF_SHIFT 12
875
#define _UART_IFC_CCF_MASK 0x1000UL
876
#define _UART_IFC_CCF_DEFAULT 0x00000000UL
877
#define UART_IFC_CCF_DEFAULT (_UART_IFC_CCF_DEFAULT << 12)
879
/* Bit fields for UART IEN */
880
#define _UART_IEN_RESETVALUE 0x00000000UL
881
#define _UART_IEN_MASK 0x00001FFFUL
882
#define UART_IEN_TXC (0x1UL << 0)
883
#define _UART_IEN_TXC_SHIFT 0
884
#define _UART_IEN_TXC_MASK 0x1UL
885
#define _UART_IEN_TXC_DEFAULT 0x00000000UL
886
#define UART_IEN_TXC_DEFAULT (_UART_IEN_TXC_DEFAULT << 0)
887
#define UART_IEN_TXBL (0x1UL << 1)
888
#define _UART_IEN_TXBL_SHIFT 1
889
#define _UART_IEN_TXBL_MASK 0x2UL
890
#define _UART_IEN_TXBL_DEFAULT 0x00000000UL
891
#define UART_IEN_TXBL_DEFAULT (_UART_IEN_TXBL_DEFAULT << 1)
892
#define UART_IEN_RXDATAV (0x1UL << 2)
893
#define _UART_IEN_RXDATAV_SHIFT 2
894
#define _UART_IEN_RXDATAV_MASK 0x4UL
895
#define _UART_IEN_RXDATAV_DEFAULT 0x00000000UL
896
#define UART_IEN_RXDATAV_DEFAULT (_UART_IEN_RXDATAV_DEFAULT << 2)
897
#define UART_IEN_RXFULL (0x1UL << 3)
898
#define _UART_IEN_RXFULL_SHIFT 3
899
#define _UART_IEN_RXFULL_MASK 0x8UL
900
#define _UART_IEN_RXFULL_DEFAULT 0x00000000UL
901
#define UART_IEN_RXFULL_DEFAULT (_UART_IEN_RXFULL_DEFAULT << 3)
902
#define UART_IEN_RXOF (0x1UL << 4)
903
#define _UART_IEN_RXOF_SHIFT 4
904
#define _UART_IEN_RXOF_MASK 0x10UL
905
#define _UART_IEN_RXOF_DEFAULT 0x00000000UL
906
#define UART_IEN_RXOF_DEFAULT (_UART_IEN_RXOF_DEFAULT << 4)
907
#define UART_IEN_RXUF (0x1UL << 5)
908
#define _UART_IEN_RXUF_SHIFT 5
909
#define _UART_IEN_RXUF_MASK 0x20UL
910
#define _UART_IEN_RXUF_DEFAULT 0x00000000UL
911
#define UART_IEN_RXUF_DEFAULT (_UART_IEN_RXUF_DEFAULT << 5)
912
#define UART_IEN_TXOF (0x1UL << 6)
913
#define _UART_IEN_TXOF_SHIFT 6
914
#define _UART_IEN_TXOF_MASK 0x40UL
915
#define _UART_IEN_TXOF_DEFAULT 0x00000000UL
916
#define UART_IEN_TXOF_DEFAULT (_UART_IEN_TXOF_DEFAULT << 6)
917
#define UART_IEN_TXUF (0x1UL << 7)
918
#define _UART_IEN_TXUF_SHIFT 7
919
#define _UART_IEN_TXUF_MASK 0x80UL
920
#define _UART_IEN_TXUF_DEFAULT 0x00000000UL
921
#define UART_IEN_TXUF_DEFAULT (_UART_IEN_TXUF_DEFAULT << 7)
922
#define UART_IEN_PERR (0x1UL << 8)
923
#define _UART_IEN_PERR_SHIFT 8
924
#define _UART_IEN_PERR_MASK 0x100UL
925
#define _UART_IEN_PERR_DEFAULT 0x00000000UL
926
#define UART_IEN_PERR_DEFAULT (_UART_IEN_PERR_DEFAULT << 8)
927
#define UART_IEN_FERR (0x1UL << 9)
928
#define _UART_IEN_FERR_SHIFT 9
929
#define _UART_IEN_FERR_MASK 0x200UL
930
#define _UART_IEN_FERR_DEFAULT 0x00000000UL
931
#define UART_IEN_FERR_DEFAULT (_UART_IEN_FERR_DEFAULT << 9)
932
#define UART_IEN_MPAF (0x1UL << 10)
933
#define _UART_IEN_MPAF_SHIFT 10
934
#define _UART_IEN_MPAF_MASK 0x400UL
935
#define _UART_IEN_MPAF_DEFAULT 0x00000000UL
936
#define UART_IEN_MPAF_DEFAULT (_UART_IEN_MPAF_DEFAULT << 10)
937
#define UART_IEN_SSM (0x1UL << 11)
938
#define _UART_IEN_SSM_SHIFT 11
939
#define _UART_IEN_SSM_MASK 0x800UL
940
#define _UART_IEN_SSM_DEFAULT 0x00000000UL
941
#define UART_IEN_SSM_DEFAULT (_UART_IEN_SSM_DEFAULT << 11)
942
#define UART_IEN_CCF (0x1UL << 12)
943
#define _UART_IEN_CCF_SHIFT 12
944
#define _UART_IEN_CCF_MASK 0x1000UL
945
#define _UART_IEN_CCF_DEFAULT 0x00000000UL
946
#define UART_IEN_CCF_DEFAULT (_UART_IEN_CCF_DEFAULT << 12)
948
/* Bit fields for UART IRCTRL */
949
#define _UART_IRCTRL_RESETVALUE 0x00000000UL
950
#define _UART_IRCTRL_MASK 0x000000FFUL
951
#define UART_IRCTRL_IREN (0x1UL << 0)
952
#define _UART_IRCTRL_IREN_SHIFT 0
953
#define _UART_IRCTRL_IREN_MASK 0x1UL
954
#define _UART_IRCTRL_IREN_DEFAULT 0x00000000UL
955
#define UART_IRCTRL_IREN_DEFAULT (_UART_IRCTRL_IREN_DEFAULT << 0)
956
#define _UART_IRCTRL_IRPW_SHIFT 1
957
#define _UART_IRCTRL_IRPW_MASK 0x6UL
958
#define _UART_IRCTRL_IRPW_DEFAULT 0x00000000UL
959
#define _UART_IRCTRL_IRPW_ONE 0x00000000UL
960
#define _UART_IRCTRL_IRPW_TWO 0x00000001UL
961
#define _UART_IRCTRL_IRPW_THREE 0x00000002UL
962
#define _UART_IRCTRL_IRPW_FOUR 0x00000003UL
963
#define UART_IRCTRL_IRPW_DEFAULT (_UART_IRCTRL_IRPW_DEFAULT << 1)
964
#define UART_IRCTRL_IRPW_ONE (_UART_IRCTRL_IRPW_ONE << 1)
965
#define UART_IRCTRL_IRPW_TWO (_UART_IRCTRL_IRPW_TWO << 1)
966
#define UART_IRCTRL_IRPW_THREE (_UART_IRCTRL_IRPW_THREE << 1)
967
#define UART_IRCTRL_IRPW_FOUR (_UART_IRCTRL_IRPW_FOUR << 1)
968
#define UART_IRCTRL_IRFILT (0x1UL << 3)
969
#define _UART_IRCTRL_IRFILT_SHIFT 3
970
#define _UART_IRCTRL_IRFILT_MASK 0x8UL
971
#define _UART_IRCTRL_IRFILT_DEFAULT 0x00000000UL
972
#define UART_IRCTRL_IRFILT_DEFAULT (_UART_IRCTRL_IRFILT_DEFAULT << 3)
973
#define _UART_IRCTRL_IRPRSSEL_SHIFT 4
974
#define _UART_IRCTRL_IRPRSSEL_MASK 0x70UL
975
#define _UART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL
976
#define _UART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL
977
#define _UART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL
978
#define _UART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL
979
#define _UART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL
980
#define _UART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL
981
#define _UART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL
982
#define _UART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL
983
#define _UART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL
984
#define UART_IRCTRL_IRPRSSEL_DEFAULT (_UART_IRCTRL_IRPRSSEL_DEFAULT << 4)
985
#define UART_IRCTRL_IRPRSSEL_PRSCH0 (_UART_IRCTRL_IRPRSSEL_PRSCH0 << 4)
986
#define UART_IRCTRL_IRPRSSEL_PRSCH1 (_UART_IRCTRL_IRPRSSEL_PRSCH1 << 4)
987
#define UART_IRCTRL_IRPRSSEL_PRSCH2 (_UART_IRCTRL_IRPRSSEL_PRSCH2 << 4)
988
#define UART_IRCTRL_IRPRSSEL_PRSCH3 (_UART_IRCTRL_IRPRSSEL_PRSCH3 << 4)
989
#define UART_IRCTRL_IRPRSSEL_PRSCH4 (_UART_IRCTRL_IRPRSSEL_PRSCH4 << 4)
990
#define UART_IRCTRL_IRPRSSEL_PRSCH5 (_UART_IRCTRL_IRPRSSEL_PRSCH5 << 4)
991
#define UART_IRCTRL_IRPRSSEL_PRSCH6 (_UART_IRCTRL_IRPRSSEL_PRSCH6 << 4)
992
#define UART_IRCTRL_IRPRSSEL_PRSCH7 (_UART_IRCTRL_IRPRSSEL_PRSCH7 << 4)
993
#define UART_IRCTRL_IRPRSEN (0x1UL << 7)
994
#define _UART_IRCTRL_IRPRSEN_SHIFT 7
995
#define _UART_IRCTRL_IRPRSEN_MASK 0x80UL
996
#define _UART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL
997
#define UART_IRCTRL_IRPRSEN_DEFAULT (_UART_IRCTRL_IRPRSEN_DEFAULT << 7)
999
/* Bit fields for UART ROUTE */
1000
#define _UART_ROUTE_RESETVALUE 0x00000000UL
1001
#define _UART_ROUTE_MASK 0x0000070FUL
1002
#define UART_ROUTE_RXPEN (0x1UL << 0)
1003
#define _UART_ROUTE_RXPEN_SHIFT 0
1004
#define _UART_ROUTE_RXPEN_MASK 0x1UL
1005
#define _UART_ROUTE_RXPEN_DEFAULT 0x00000000UL
1006
#define UART_ROUTE_RXPEN_DEFAULT (_UART_ROUTE_RXPEN_DEFAULT << 0)
1007
#define UART_ROUTE_TXPEN (0x1UL << 1)
1008
#define _UART_ROUTE_TXPEN_SHIFT 1
1009
#define _UART_ROUTE_TXPEN_MASK 0x2UL
1010
#define _UART_ROUTE_TXPEN_DEFAULT 0x00000000UL
1011
#define UART_ROUTE_TXPEN_DEFAULT (_UART_ROUTE_TXPEN_DEFAULT << 1)
1012
#define UART_ROUTE_CSPEN (0x1UL << 2)
1013
#define _UART_ROUTE_CSPEN_SHIFT 2
1014
#define _UART_ROUTE_CSPEN_MASK 0x4UL
1015
#define _UART_ROUTE_CSPEN_DEFAULT 0x00000000UL
1016
#define UART_ROUTE_CSPEN_DEFAULT (_UART_ROUTE_CSPEN_DEFAULT << 2)
1017
#define UART_ROUTE_CLKPEN (0x1UL << 3)
1018
#define _UART_ROUTE_CLKPEN_SHIFT 3
1019
#define _UART_ROUTE_CLKPEN_MASK 0x8UL
1020
#define _UART_ROUTE_CLKPEN_DEFAULT 0x00000000UL
1021
#define UART_ROUTE_CLKPEN_DEFAULT (_UART_ROUTE_CLKPEN_DEFAULT << 3)
1022
#define _UART_ROUTE_LOCATION_SHIFT 8
1023
#define _UART_ROUTE_LOCATION_MASK 0x700UL
1024
#define _UART_ROUTE_LOCATION_LOC0 0x00000000UL
1025
#define _UART_ROUTE_LOCATION_DEFAULT 0x00000000UL
1026
#define _UART_ROUTE_LOCATION_LOC1 0x00000001UL
1027
#define _UART_ROUTE_LOCATION_LOC2 0x00000002UL
1028
#define _UART_ROUTE_LOCATION_LOC3 0x00000003UL
1029
#define _UART_ROUTE_LOCATION_LOC4 0x00000004UL
1030
#define _UART_ROUTE_LOCATION_LOC5 0x00000005UL
1031
#define UART_ROUTE_LOCATION_LOC0 (_UART_ROUTE_LOCATION_LOC0 << 8)
1032
#define UART_ROUTE_LOCATION_DEFAULT (_UART_ROUTE_LOCATION_DEFAULT << 8)
1033
#define UART_ROUTE_LOCATION_LOC1 (_UART_ROUTE_LOCATION_LOC1 << 8)
1034
#define UART_ROUTE_LOCATION_LOC2 (_UART_ROUTE_LOCATION_LOC2 << 8)
1035
#define UART_ROUTE_LOCATION_LOC3 (_UART_ROUTE_LOCATION_LOC3 << 8)
1036
#define UART_ROUTE_LOCATION_LOC4 (_UART_ROUTE_LOCATION_LOC4 << 8)
1037
#define UART_ROUTE_LOCATION_LOC5 (_UART_ROUTE_LOCATION_LOC5 << 8)
1039
/* Bit fields for UART INPUT */
1040
#define _UART_INPUT_RESETVALUE 0x00000000UL
1041
#define _UART_INPUT_MASK 0x0000001FUL
1042
#define _UART_INPUT_RXPRSSEL_SHIFT 0
1043
#define _UART_INPUT_RXPRSSEL_MASK 0xFUL
1044
#define _UART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL
1045
#define _UART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL
1046
#define _UART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL
1047
#define _UART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL
1048
#define _UART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL
1049
#define _UART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL
1050
#define _UART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL
1051
#define _UART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL
1052
#define _UART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL
1053
#define _UART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL
1054
#define _UART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL
1055
#define _UART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL
1056
#define _UART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL
1057
#define UART_INPUT_RXPRSSEL_DEFAULT (_UART_INPUT_RXPRSSEL_DEFAULT << 0)
1058
#define UART_INPUT_RXPRSSEL_PRSCH0 (_UART_INPUT_RXPRSSEL_PRSCH0 << 0)
1059
#define UART_INPUT_RXPRSSEL_PRSCH1 (_UART_INPUT_RXPRSSEL_PRSCH1 << 0)
1060
#define UART_INPUT_RXPRSSEL_PRSCH2 (_UART_INPUT_RXPRSSEL_PRSCH2 << 0)
1061
#define UART_INPUT_RXPRSSEL_PRSCH3 (_UART_INPUT_RXPRSSEL_PRSCH3 << 0)
1062
#define UART_INPUT_RXPRSSEL_PRSCH4 (_UART_INPUT_RXPRSSEL_PRSCH4 << 0)
1063
#define UART_INPUT_RXPRSSEL_PRSCH5 (_UART_INPUT_RXPRSSEL_PRSCH5 << 0)
1064
#define UART_INPUT_RXPRSSEL_PRSCH6 (_UART_INPUT_RXPRSSEL_PRSCH6 << 0)
1065
#define UART_INPUT_RXPRSSEL_PRSCH7 (_UART_INPUT_RXPRSSEL_PRSCH7 << 0)
1066
#define UART_INPUT_RXPRSSEL_PRSCH8 (_UART_INPUT_RXPRSSEL_PRSCH8 << 0)
1067
#define UART_INPUT_RXPRSSEL_PRSCH9 (_UART_INPUT_RXPRSSEL_PRSCH9 << 0)
1068
#define UART_INPUT_RXPRSSEL_PRSCH10 (_UART_INPUT_RXPRSSEL_PRSCH10 << 0)
1069
#define UART_INPUT_RXPRSSEL_PRSCH11 (_UART_INPUT_RXPRSSEL_PRSCH11 << 0)
1070
#define UART_INPUT_RXPRS (0x1UL << 4)
1071
#define _UART_INPUT_RXPRS_SHIFT 4
1072
#define _UART_INPUT_RXPRS_MASK 0x10UL
1073
#define _UART_INPUT_RXPRS_DEFAULT 0x00000000UL
1074
#define UART_INPUT_RXPRS_DEFAULT (_UART_INPUT_RXPRS_DEFAULT << 4)
1076
/* Bit fields for UART I2SCTRL */
1077
#define _UART_I2SCTRL_RESETVALUE 0x00000000UL
1078
#define _UART_I2SCTRL_MASK 0x0000071FUL
1079
#define UART_I2SCTRL_EN (0x1UL << 0)
1080
#define _UART_I2SCTRL_EN_SHIFT 0
1081
#define _UART_I2SCTRL_EN_MASK 0x1UL
1082
#define _UART_I2SCTRL_EN_DEFAULT 0x00000000UL
1083
#define UART_I2SCTRL_EN_DEFAULT (_UART_I2SCTRL_EN_DEFAULT << 0)
1084
#define UART_I2SCTRL_MONO (0x1UL << 1)
1085
#define _UART_I2SCTRL_MONO_SHIFT 1
1086
#define _UART_I2SCTRL_MONO_MASK 0x2UL
1087
#define _UART_I2SCTRL_MONO_DEFAULT 0x00000000UL
1088
#define UART_I2SCTRL_MONO_DEFAULT (_UART_I2SCTRL_MONO_DEFAULT << 1)
1089
#define UART_I2SCTRL_JUSTIFY (0x1UL << 2)
1090
#define _UART_I2SCTRL_JUSTIFY_SHIFT 2
1091
#define _UART_I2SCTRL_JUSTIFY_MASK 0x4UL
1092
#define _UART_I2SCTRL_JUSTIFY_DEFAULT 0x00000000UL
1093
#define _UART_I2SCTRL_JUSTIFY_LEFT 0x00000000UL
1094
#define _UART_I2SCTRL_JUSTIFY_RIGHT 0x00000001UL
1095
#define UART_I2SCTRL_JUSTIFY_DEFAULT (_UART_I2SCTRL_JUSTIFY_DEFAULT << 2)
1096
#define UART_I2SCTRL_JUSTIFY_LEFT (_UART_I2SCTRL_JUSTIFY_LEFT << 2)
1097
#define UART_I2SCTRL_JUSTIFY_RIGHT (_UART_I2SCTRL_JUSTIFY_RIGHT << 2)
1098
#define UART_I2SCTRL_DMASPLIT (0x1UL << 3)
1099
#define _UART_I2SCTRL_DMASPLIT_SHIFT 3
1100
#define _UART_I2SCTRL_DMASPLIT_MASK 0x8UL
1101
#define _UART_I2SCTRL_DMASPLIT_DEFAULT 0x00000000UL
1102
#define UART_I2SCTRL_DMASPLIT_DEFAULT (_UART_I2SCTRL_DMASPLIT_DEFAULT << 3)
1103
#define UART_I2SCTRL_DELAY (0x1UL << 4)
1104
#define _UART_I2SCTRL_DELAY_SHIFT 4
1105
#define _UART_I2SCTRL_DELAY_MASK 0x10UL
1106
#define _UART_I2SCTRL_DELAY_DEFAULT 0x00000000UL
1107
#define UART_I2SCTRL_DELAY_DEFAULT (_UART_I2SCTRL_DELAY_DEFAULT << 4)
1108
#define _UART_I2SCTRL_FORMAT_SHIFT 8
1109
#define _UART_I2SCTRL_FORMAT_MASK 0x700UL
1110
#define _UART_I2SCTRL_FORMAT_DEFAULT 0x00000000UL
1111
#define _UART_I2SCTRL_FORMAT_W32D32 0x00000000UL
1112
#define _UART_I2SCTRL_FORMAT_W32D24M 0x00000001UL
1113
#define _UART_I2SCTRL_FORMAT_W32D24 0x00000002UL
1114
#define _UART_I2SCTRL_FORMAT_W32D16 0x00000003UL
1115
#define _UART_I2SCTRL_FORMAT_W32D8 0x00000004UL
1116
#define _UART_I2SCTRL_FORMAT_W16D16 0x00000005UL
1117
#define _UART_I2SCTRL_FORMAT_W16D8 0x00000006UL
1118
#define _UART_I2SCTRL_FORMAT_W8D8 0x00000007UL
1119
#define UART_I2SCTRL_FORMAT_DEFAULT (_UART_I2SCTRL_FORMAT_DEFAULT << 8)
1120
#define UART_I2SCTRL_FORMAT_W32D32 (_UART_I2SCTRL_FORMAT_W32D32 << 8)
1121
#define UART_I2SCTRL_FORMAT_W32D24M (_UART_I2SCTRL_FORMAT_W32D24M << 8)
1122
#define UART_I2SCTRL_FORMAT_W32D24 (_UART_I2SCTRL_FORMAT_W32D24 << 8)
1123
#define UART_I2SCTRL_FORMAT_W32D16 (_UART_I2SCTRL_FORMAT_W32D16 << 8)
1124
#define UART_I2SCTRL_FORMAT_W32D8 (_UART_I2SCTRL_FORMAT_W32D8 << 8)
1125
#define UART_I2SCTRL_FORMAT_W16D16 (_UART_I2SCTRL_FORMAT_W16D16 << 8)
1126
#define UART_I2SCTRL_FORMAT_W16D8 (_UART_I2SCTRL_FORMAT_W16D8 << 8)
1127
#define UART_I2SCTRL_FORMAT_W8D8 (_UART_I2SCTRL_FORMAT_W8D8 << 8)
platform
Device
SiliconLabs
EFM32WG
Include
efm32wg_uart.h
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