38 #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
60 #define MPU_CTRL_PRIVDEFENA MPU_CTRL_PRIVDEFENA_Msk
65 #define MPU_CTRL_HFNMIENA MPU_CTRL_HFNMIENA_Msk
78 mpuRegionSize128b = 6,
79 mpuRegionSize256b = 7,
80 mpuRegionSize512b = 8,
82 mpuRegionSize2Kb = 10,
83 mpuRegionSize4Kb = 11,
84 mpuRegionSize8Kb = 12,
85 mpuRegionSize16Kb = 13,
86 mpuRegionSize32Kb = 14,
87 mpuRegionSize64Kb = 15,
88 mpuRegionSize128Kb = 16,
89 mpuRegionSize256Kb = 17,
90 mpuRegionSize512Kb = 18,
91 mpuRegionSize1Mb = 19,
92 mpuRegionSize2Mb = 20,
93 mpuRegionSize4Mb = 21,
94 mpuRegionSize8Mb = 22,
95 mpuRegionSize16Mb = 23,
96 mpuRegionSize32Mb = 24,
97 mpuRegionSize64Mb = 25,
98 mpuRegionSize128Mb = 26,
99 mpuRegionSize256Mb = 27,
100 mpuRegionSize512Mb = 28,
101 mpuRegionSize1Gb = 29,
102 mpuRegionSize2Gb = 30,
103 mpuRegionSize4Gb = 31
104 } MPU_RegionSize_TypeDef;
111 mpuRegionNoAccess = 0,
113 mpuRegionApPRwURo = 2,
114 mpuRegionApFullAccess = 3,
116 mpuRegionApPRo_URo = 6
117 } MPU_RegionAp_TypeDef;
129 uint32_t baseAddress;
130 MPU_RegionSize_TypeDef size;
131 MPU_RegionAp_TypeDef accessPermission;
138 } MPU_RegionInit_TypeDef;
141 #define MPU_INIT_FLASH_DEFAULT \
147 mpuRegionApFullAccess, \
158 #define MPU_INIT_SRAM_DEFAULT \
163 mpuRegionSize128Kb, \
164 mpuRegionApFullAccess, \
175 #define MPU_INIT_PERIPHERAL_DEFAULT \
181 mpuRegionApFullAccess, \
196 void MPU_ConfigureRegion(
const MPU_RegionInit_TypeDef *init);
205 __STATIC_INLINE
void MPU_Disable(
void)
207 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
208 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
221 __STATIC_INLINE
void MPU_Enable(uint32_t flags)
223 EFM_ASSERT(!(flags & ~(MPU_CTRL_PRIVDEFENA_Msk
224 | MPU_CTRL_HFNMIENA_Msk
225 | MPU_CTRL_ENABLE_Msk)));
227 MPU->CTRL = flags | MPU_CTRL_ENABLE_Msk;
228 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
Emlib peripheral API "assert" implementation.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.