EFM32 Giant Gecko Software Documentation  efm32gg-doc-5.1.2
efm32gg_uart.h
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1 /**************************************************************************/
32 /**************************************************************************/
37 /**************************************************************************/
42 /* Bit fields for UART CTRL */
43 #define _UART_CTRL_RESETVALUE 0x00000000UL
44 #define _UART_CTRL_MASK 0x7DFFFF7FUL
45 #define UART_CTRL_SYNC (0x1UL << 0)
46 #define _UART_CTRL_SYNC_SHIFT 0
47 #define _UART_CTRL_SYNC_MASK 0x1UL
48 #define _UART_CTRL_SYNC_DEFAULT 0x00000000UL
49 #define UART_CTRL_SYNC_DEFAULT (_UART_CTRL_SYNC_DEFAULT << 0)
50 #define UART_CTRL_LOOPBK (0x1UL << 1)
51 #define _UART_CTRL_LOOPBK_SHIFT 1
52 #define _UART_CTRL_LOOPBK_MASK 0x2UL
53 #define _UART_CTRL_LOOPBK_DEFAULT 0x00000000UL
54 #define UART_CTRL_LOOPBK_DEFAULT (_UART_CTRL_LOOPBK_DEFAULT << 1)
55 #define UART_CTRL_CCEN (0x1UL << 2)
56 #define _UART_CTRL_CCEN_SHIFT 2
57 #define _UART_CTRL_CCEN_MASK 0x4UL
58 #define _UART_CTRL_CCEN_DEFAULT 0x00000000UL
59 #define UART_CTRL_CCEN_DEFAULT (_UART_CTRL_CCEN_DEFAULT << 2)
60 #define UART_CTRL_MPM (0x1UL << 3)
61 #define _UART_CTRL_MPM_SHIFT 3
62 #define _UART_CTRL_MPM_MASK 0x8UL
63 #define _UART_CTRL_MPM_DEFAULT 0x00000000UL
64 #define UART_CTRL_MPM_DEFAULT (_UART_CTRL_MPM_DEFAULT << 3)
65 #define UART_CTRL_MPAB (0x1UL << 4)
66 #define _UART_CTRL_MPAB_SHIFT 4
67 #define _UART_CTRL_MPAB_MASK 0x10UL
68 #define _UART_CTRL_MPAB_DEFAULT 0x00000000UL
69 #define UART_CTRL_MPAB_DEFAULT (_UART_CTRL_MPAB_DEFAULT << 4)
70 #define _UART_CTRL_OVS_SHIFT 5
71 #define _UART_CTRL_OVS_MASK 0x60UL
72 #define _UART_CTRL_OVS_DEFAULT 0x00000000UL
73 #define _UART_CTRL_OVS_X16 0x00000000UL
74 #define _UART_CTRL_OVS_X8 0x00000001UL
75 #define _UART_CTRL_OVS_X6 0x00000002UL
76 #define _UART_CTRL_OVS_X4 0x00000003UL
77 #define UART_CTRL_OVS_DEFAULT (_UART_CTRL_OVS_DEFAULT << 5)
78 #define UART_CTRL_OVS_X16 (_UART_CTRL_OVS_X16 << 5)
79 #define UART_CTRL_OVS_X8 (_UART_CTRL_OVS_X8 << 5)
80 #define UART_CTRL_OVS_X6 (_UART_CTRL_OVS_X6 << 5)
81 #define UART_CTRL_OVS_X4 (_UART_CTRL_OVS_X4 << 5)
82 #define UART_CTRL_CLKPOL (0x1UL << 8)
83 #define _UART_CTRL_CLKPOL_SHIFT 8
84 #define _UART_CTRL_CLKPOL_MASK 0x100UL
85 #define _UART_CTRL_CLKPOL_DEFAULT 0x00000000UL
86 #define _UART_CTRL_CLKPOL_IDLELOW 0x00000000UL
87 #define _UART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL
88 #define UART_CTRL_CLKPOL_DEFAULT (_UART_CTRL_CLKPOL_DEFAULT << 8)
89 #define UART_CTRL_CLKPOL_IDLELOW (_UART_CTRL_CLKPOL_IDLELOW << 8)
90 #define UART_CTRL_CLKPOL_IDLEHIGH (_UART_CTRL_CLKPOL_IDLEHIGH << 8)
91 #define UART_CTRL_CLKPHA (0x1UL << 9)
92 #define _UART_CTRL_CLKPHA_SHIFT 9
93 #define _UART_CTRL_CLKPHA_MASK 0x200UL
94 #define _UART_CTRL_CLKPHA_DEFAULT 0x00000000UL
95 #define _UART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL
96 #define _UART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL
97 #define UART_CTRL_CLKPHA_DEFAULT (_UART_CTRL_CLKPHA_DEFAULT << 9)
98 #define UART_CTRL_CLKPHA_SAMPLELEADING (_UART_CTRL_CLKPHA_SAMPLELEADING << 9)
99 #define UART_CTRL_CLKPHA_SAMPLETRAILING (_UART_CTRL_CLKPHA_SAMPLETRAILING << 9)
100 #define UART_CTRL_MSBF (0x1UL << 10)
101 #define _UART_CTRL_MSBF_SHIFT 10
102 #define _UART_CTRL_MSBF_MASK 0x400UL
103 #define _UART_CTRL_MSBF_DEFAULT 0x00000000UL
104 #define UART_CTRL_MSBF_DEFAULT (_UART_CTRL_MSBF_DEFAULT << 10)
105 #define UART_CTRL_CSMA (0x1UL << 11)
106 #define _UART_CTRL_CSMA_SHIFT 11
107 #define _UART_CTRL_CSMA_MASK 0x800UL
108 #define _UART_CTRL_CSMA_DEFAULT 0x00000000UL
109 #define _UART_CTRL_CSMA_NOACTION 0x00000000UL
110 #define _UART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL
111 #define UART_CTRL_CSMA_DEFAULT (_UART_CTRL_CSMA_DEFAULT << 11)
112 #define UART_CTRL_CSMA_NOACTION (_UART_CTRL_CSMA_NOACTION << 11)
113 #define UART_CTRL_CSMA_GOTOSLAVEMODE (_UART_CTRL_CSMA_GOTOSLAVEMODE << 11)
114 #define UART_CTRL_TXBIL (0x1UL << 12)
115 #define _UART_CTRL_TXBIL_SHIFT 12
116 #define _UART_CTRL_TXBIL_MASK 0x1000UL
117 #define _UART_CTRL_TXBIL_DEFAULT 0x00000000UL
118 #define _UART_CTRL_TXBIL_EMPTY 0x00000000UL
119 #define _UART_CTRL_TXBIL_HALFFULL 0x00000001UL
120 #define UART_CTRL_TXBIL_DEFAULT (_UART_CTRL_TXBIL_DEFAULT << 12)
121 #define UART_CTRL_TXBIL_EMPTY (_UART_CTRL_TXBIL_EMPTY << 12)
122 #define UART_CTRL_TXBIL_HALFFULL (_UART_CTRL_TXBIL_HALFFULL << 12)
123 #define UART_CTRL_RXINV (0x1UL << 13)
124 #define _UART_CTRL_RXINV_SHIFT 13
125 #define _UART_CTRL_RXINV_MASK 0x2000UL
126 #define _UART_CTRL_RXINV_DEFAULT 0x00000000UL
127 #define UART_CTRL_RXINV_DEFAULT (_UART_CTRL_RXINV_DEFAULT << 13)
128 #define UART_CTRL_TXINV (0x1UL << 14)
129 #define _UART_CTRL_TXINV_SHIFT 14
130 #define _UART_CTRL_TXINV_MASK 0x4000UL
131 #define _UART_CTRL_TXINV_DEFAULT 0x00000000UL
132 #define UART_CTRL_TXINV_DEFAULT (_UART_CTRL_TXINV_DEFAULT << 14)
133 #define UART_CTRL_CSINV (0x1UL << 15)
134 #define _UART_CTRL_CSINV_SHIFT 15
135 #define _UART_CTRL_CSINV_MASK 0x8000UL
136 #define _UART_CTRL_CSINV_DEFAULT 0x00000000UL
137 #define UART_CTRL_CSINV_DEFAULT (_UART_CTRL_CSINV_DEFAULT << 15)
138 #define UART_CTRL_AUTOCS (0x1UL << 16)
139 #define _UART_CTRL_AUTOCS_SHIFT 16
140 #define _UART_CTRL_AUTOCS_MASK 0x10000UL
141 #define _UART_CTRL_AUTOCS_DEFAULT 0x00000000UL
142 #define UART_CTRL_AUTOCS_DEFAULT (_UART_CTRL_AUTOCS_DEFAULT << 16)
143 #define UART_CTRL_AUTOTRI (0x1UL << 17)
144 #define _UART_CTRL_AUTOTRI_SHIFT 17
145 #define _UART_CTRL_AUTOTRI_MASK 0x20000UL
146 #define _UART_CTRL_AUTOTRI_DEFAULT 0x00000000UL
147 #define UART_CTRL_AUTOTRI_DEFAULT (_UART_CTRL_AUTOTRI_DEFAULT << 17)
148 #define UART_CTRL_SCMODE (0x1UL << 18)
149 #define _UART_CTRL_SCMODE_SHIFT 18
150 #define _UART_CTRL_SCMODE_MASK 0x40000UL
151 #define _UART_CTRL_SCMODE_DEFAULT 0x00000000UL
152 #define UART_CTRL_SCMODE_DEFAULT (_UART_CTRL_SCMODE_DEFAULT << 18)
153 #define UART_CTRL_SCRETRANS (0x1UL << 19)
154 #define _UART_CTRL_SCRETRANS_SHIFT 19
155 #define _UART_CTRL_SCRETRANS_MASK 0x80000UL
156 #define _UART_CTRL_SCRETRANS_DEFAULT 0x00000000UL
157 #define UART_CTRL_SCRETRANS_DEFAULT (_UART_CTRL_SCRETRANS_DEFAULT << 19)
158 #define UART_CTRL_SKIPPERRF (0x1UL << 20)
159 #define _UART_CTRL_SKIPPERRF_SHIFT 20
160 #define _UART_CTRL_SKIPPERRF_MASK 0x100000UL
161 #define _UART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL
162 #define UART_CTRL_SKIPPERRF_DEFAULT (_UART_CTRL_SKIPPERRF_DEFAULT << 20)
163 #define UART_CTRL_BIT8DV (0x1UL << 21)
164 #define _UART_CTRL_BIT8DV_SHIFT 21
165 #define _UART_CTRL_BIT8DV_MASK 0x200000UL
166 #define _UART_CTRL_BIT8DV_DEFAULT 0x00000000UL
167 #define UART_CTRL_BIT8DV_DEFAULT (_UART_CTRL_BIT8DV_DEFAULT << 21)
168 #define UART_CTRL_ERRSDMA (0x1UL << 22)
169 #define _UART_CTRL_ERRSDMA_SHIFT 22
170 #define _UART_CTRL_ERRSDMA_MASK 0x400000UL
171 #define _UART_CTRL_ERRSDMA_DEFAULT 0x00000000UL
172 #define UART_CTRL_ERRSDMA_DEFAULT (_UART_CTRL_ERRSDMA_DEFAULT << 22)
173 #define UART_CTRL_ERRSRX (0x1UL << 23)
174 #define _UART_CTRL_ERRSRX_SHIFT 23
175 #define _UART_CTRL_ERRSRX_MASK 0x800000UL
176 #define _UART_CTRL_ERRSRX_DEFAULT 0x00000000UL
177 #define UART_CTRL_ERRSRX_DEFAULT (_UART_CTRL_ERRSRX_DEFAULT << 23)
178 #define UART_CTRL_ERRSTX (0x1UL << 24)
179 #define _UART_CTRL_ERRSTX_SHIFT 24
180 #define _UART_CTRL_ERRSTX_MASK 0x1000000UL
181 #define _UART_CTRL_ERRSTX_DEFAULT 0x00000000UL
182 #define UART_CTRL_ERRSTX_DEFAULT (_UART_CTRL_ERRSTX_DEFAULT << 24)
183 #define _UART_CTRL_TXDELAY_SHIFT 26
184 #define _UART_CTRL_TXDELAY_MASK 0xC000000UL
185 #define _UART_CTRL_TXDELAY_DEFAULT 0x00000000UL
186 #define _UART_CTRL_TXDELAY_NONE 0x00000000UL
187 #define _UART_CTRL_TXDELAY_SINGLE 0x00000001UL
188 #define _UART_CTRL_TXDELAY_DOUBLE 0x00000002UL
189 #define _UART_CTRL_TXDELAY_TRIPLE 0x00000003UL
190 #define UART_CTRL_TXDELAY_DEFAULT (_UART_CTRL_TXDELAY_DEFAULT << 26)
191 #define UART_CTRL_TXDELAY_NONE (_UART_CTRL_TXDELAY_NONE << 26)
192 #define UART_CTRL_TXDELAY_SINGLE (_UART_CTRL_TXDELAY_SINGLE << 26)
193 #define UART_CTRL_TXDELAY_DOUBLE (_UART_CTRL_TXDELAY_DOUBLE << 26)
194 #define UART_CTRL_TXDELAY_TRIPLE (_UART_CTRL_TXDELAY_TRIPLE << 26)
195 #define UART_CTRL_BYTESWAP (0x1UL << 28)
196 #define _UART_CTRL_BYTESWAP_SHIFT 28
197 #define _UART_CTRL_BYTESWAP_MASK 0x10000000UL
198 #define _UART_CTRL_BYTESWAP_DEFAULT 0x00000000UL
199 #define UART_CTRL_BYTESWAP_DEFAULT (_UART_CTRL_BYTESWAP_DEFAULT << 28)
200 #define UART_CTRL_AUTOTX (0x1UL << 29)
201 #define _UART_CTRL_AUTOTX_SHIFT 29
202 #define _UART_CTRL_AUTOTX_MASK 0x20000000UL
203 #define _UART_CTRL_AUTOTX_DEFAULT 0x00000000UL
204 #define UART_CTRL_AUTOTX_DEFAULT (_UART_CTRL_AUTOTX_DEFAULT << 29)
205 #define UART_CTRL_MVDIS (0x1UL << 30)
206 #define _UART_CTRL_MVDIS_SHIFT 30
207 #define _UART_CTRL_MVDIS_MASK 0x40000000UL
208 #define _UART_CTRL_MVDIS_DEFAULT 0x00000000UL
209 #define UART_CTRL_MVDIS_DEFAULT (_UART_CTRL_MVDIS_DEFAULT << 30)
211 /* Bit fields for UART FRAME */
212 #define _UART_FRAME_RESETVALUE 0x00001005UL
213 #define _UART_FRAME_MASK 0x0000330FUL
214 #define _UART_FRAME_DATABITS_SHIFT 0
215 #define _UART_FRAME_DATABITS_MASK 0xFUL
216 #define _UART_FRAME_DATABITS_FOUR 0x00000001UL
217 #define _UART_FRAME_DATABITS_FIVE 0x00000002UL
218 #define _UART_FRAME_DATABITS_SIX 0x00000003UL
219 #define _UART_FRAME_DATABITS_SEVEN 0x00000004UL
220 #define _UART_FRAME_DATABITS_DEFAULT 0x00000005UL
221 #define _UART_FRAME_DATABITS_EIGHT 0x00000005UL
222 #define _UART_FRAME_DATABITS_NINE 0x00000006UL
223 #define _UART_FRAME_DATABITS_TEN 0x00000007UL
224 #define _UART_FRAME_DATABITS_ELEVEN 0x00000008UL
225 #define _UART_FRAME_DATABITS_TWELVE 0x00000009UL
226 #define _UART_FRAME_DATABITS_THIRTEEN 0x0000000AUL
227 #define _UART_FRAME_DATABITS_FOURTEEN 0x0000000BUL
228 #define _UART_FRAME_DATABITS_FIFTEEN 0x0000000CUL
229 #define _UART_FRAME_DATABITS_SIXTEEN 0x0000000DUL
230 #define UART_FRAME_DATABITS_FOUR (_UART_FRAME_DATABITS_FOUR << 0)
231 #define UART_FRAME_DATABITS_FIVE (_UART_FRAME_DATABITS_FIVE << 0)
232 #define UART_FRAME_DATABITS_SIX (_UART_FRAME_DATABITS_SIX << 0)
233 #define UART_FRAME_DATABITS_SEVEN (_UART_FRAME_DATABITS_SEVEN << 0)
234 #define UART_FRAME_DATABITS_DEFAULT (_UART_FRAME_DATABITS_DEFAULT << 0)
235 #define UART_FRAME_DATABITS_EIGHT (_UART_FRAME_DATABITS_EIGHT << 0)
236 #define UART_FRAME_DATABITS_NINE (_UART_FRAME_DATABITS_NINE << 0)
237 #define UART_FRAME_DATABITS_TEN (_UART_FRAME_DATABITS_TEN << 0)
238 #define UART_FRAME_DATABITS_ELEVEN (_UART_FRAME_DATABITS_ELEVEN << 0)
239 #define UART_FRAME_DATABITS_TWELVE (_UART_FRAME_DATABITS_TWELVE << 0)
240 #define UART_FRAME_DATABITS_THIRTEEN (_UART_FRAME_DATABITS_THIRTEEN << 0)
241 #define UART_FRAME_DATABITS_FOURTEEN (_UART_FRAME_DATABITS_FOURTEEN << 0)
242 #define UART_FRAME_DATABITS_FIFTEEN (_UART_FRAME_DATABITS_FIFTEEN << 0)
243 #define UART_FRAME_DATABITS_SIXTEEN (_UART_FRAME_DATABITS_SIXTEEN << 0)
244 #define _UART_FRAME_PARITY_SHIFT 8
245 #define _UART_FRAME_PARITY_MASK 0x300UL
246 #define _UART_FRAME_PARITY_DEFAULT 0x00000000UL
247 #define _UART_FRAME_PARITY_NONE 0x00000000UL
248 #define _UART_FRAME_PARITY_EVEN 0x00000002UL
249 #define _UART_FRAME_PARITY_ODD 0x00000003UL
250 #define UART_FRAME_PARITY_DEFAULT (_UART_FRAME_PARITY_DEFAULT << 8)
251 #define UART_FRAME_PARITY_NONE (_UART_FRAME_PARITY_NONE << 8)
252 #define UART_FRAME_PARITY_EVEN (_UART_FRAME_PARITY_EVEN << 8)
253 #define UART_FRAME_PARITY_ODD (_UART_FRAME_PARITY_ODD << 8)
254 #define _UART_FRAME_STOPBITS_SHIFT 12
255 #define _UART_FRAME_STOPBITS_MASK 0x3000UL
256 #define _UART_FRAME_STOPBITS_HALF 0x00000000UL
257 #define _UART_FRAME_STOPBITS_DEFAULT 0x00000001UL
258 #define _UART_FRAME_STOPBITS_ONE 0x00000001UL
259 #define _UART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL
260 #define _UART_FRAME_STOPBITS_TWO 0x00000003UL
261 #define UART_FRAME_STOPBITS_HALF (_UART_FRAME_STOPBITS_HALF << 12)
262 #define UART_FRAME_STOPBITS_DEFAULT (_UART_FRAME_STOPBITS_DEFAULT << 12)
263 #define UART_FRAME_STOPBITS_ONE (_UART_FRAME_STOPBITS_ONE << 12)
264 #define UART_FRAME_STOPBITS_ONEANDAHALF (_UART_FRAME_STOPBITS_ONEANDAHALF << 12)
265 #define UART_FRAME_STOPBITS_TWO (_UART_FRAME_STOPBITS_TWO << 12)
267 /* Bit fields for UART TRIGCTRL */
268 #define _UART_TRIGCTRL_RESETVALUE 0x00000000UL
269 #define _UART_TRIGCTRL_MASK 0x00000077UL
270 #define _UART_TRIGCTRL_TSEL_SHIFT 0
271 #define _UART_TRIGCTRL_TSEL_MASK 0x7UL
272 #define _UART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL
273 #define _UART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL
274 #define _UART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL
275 #define _UART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL
276 #define _UART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL
277 #define _UART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL
278 #define _UART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL
279 #define _UART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL
280 #define _UART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL
281 #define UART_TRIGCTRL_TSEL_DEFAULT (_UART_TRIGCTRL_TSEL_DEFAULT << 0)
282 #define UART_TRIGCTRL_TSEL_PRSCH0 (_UART_TRIGCTRL_TSEL_PRSCH0 << 0)
283 #define UART_TRIGCTRL_TSEL_PRSCH1 (_UART_TRIGCTRL_TSEL_PRSCH1 << 0)
284 #define UART_TRIGCTRL_TSEL_PRSCH2 (_UART_TRIGCTRL_TSEL_PRSCH2 << 0)
285 #define UART_TRIGCTRL_TSEL_PRSCH3 (_UART_TRIGCTRL_TSEL_PRSCH3 << 0)
286 #define UART_TRIGCTRL_TSEL_PRSCH4 (_UART_TRIGCTRL_TSEL_PRSCH4 << 0)
287 #define UART_TRIGCTRL_TSEL_PRSCH5 (_UART_TRIGCTRL_TSEL_PRSCH5 << 0)
288 #define UART_TRIGCTRL_TSEL_PRSCH6 (_UART_TRIGCTRL_TSEL_PRSCH6 << 0)
289 #define UART_TRIGCTRL_TSEL_PRSCH7 (_UART_TRIGCTRL_TSEL_PRSCH7 << 0)
290 #define UART_TRIGCTRL_RXTEN (0x1UL << 4)
291 #define _UART_TRIGCTRL_RXTEN_SHIFT 4
292 #define _UART_TRIGCTRL_RXTEN_MASK 0x10UL
293 #define _UART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL
294 #define UART_TRIGCTRL_RXTEN_DEFAULT (_UART_TRIGCTRL_RXTEN_DEFAULT << 4)
295 #define UART_TRIGCTRL_TXTEN (0x1UL << 5)
296 #define _UART_TRIGCTRL_TXTEN_SHIFT 5
297 #define _UART_TRIGCTRL_TXTEN_MASK 0x20UL
298 #define _UART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL
299 #define UART_TRIGCTRL_TXTEN_DEFAULT (_UART_TRIGCTRL_TXTEN_DEFAULT << 5)
300 #define UART_TRIGCTRL_AUTOTXTEN (0x1UL << 6)
301 #define _UART_TRIGCTRL_AUTOTXTEN_SHIFT 6
302 #define _UART_TRIGCTRL_AUTOTXTEN_MASK 0x40UL
303 #define _UART_TRIGCTRL_AUTOTXTEN_DEFAULT 0x00000000UL
304 #define UART_TRIGCTRL_AUTOTXTEN_DEFAULT (_UART_TRIGCTRL_AUTOTXTEN_DEFAULT << 6)
306 /* Bit fields for UART CMD */
307 #define _UART_CMD_RESETVALUE 0x00000000UL
308 #define _UART_CMD_MASK 0x00000FFFUL
309 #define UART_CMD_RXEN (0x1UL << 0)
310 #define _UART_CMD_RXEN_SHIFT 0
311 #define _UART_CMD_RXEN_MASK 0x1UL
312 #define _UART_CMD_RXEN_DEFAULT 0x00000000UL
313 #define UART_CMD_RXEN_DEFAULT (_UART_CMD_RXEN_DEFAULT << 0)
314 #define UART_CMD_RXDIS (0x1UL << 1)
315 #define _UART_CMD_RXDIS_SHIFT 1
316 #define _UART_CMD_RXDIS_MASK 0x2UL
317 #define _UART_CMD_RXDIS_DEFAULT 0x00000000UL
318 #define UART_CMD_RXDIS_DEFAULT (_UART_CMD_RXDIS_DEFAULT << 1)
319 #define UART_CMD_TXEN (0x1UL << 2)
320 #define _UART_CMD_TXEN_SHIFT 2
321 #define _UART_CMD_TXEN_MASK 0x4UL
322 #define _UART_CMD_TXEN_DEFAULT 0x00000000UL
323 #define UART_CMD_TXEN_DEFAULT (_UART_CMD_TXEN_DEFAULT << 2)
324 #define UART_CMD_TXDIS (0x1UL << 3)
325 #define _UART_CMD_TXDIS_SHIFT 3
326 #define _UART_CMD_TXDIS_MASK 0x8UL
327 #define _UART_CMD_TXDIS_DEFAULT 0x00000000UL
328 #define UART_CMD_TXDIS_DEFAULT (_UART_CMD_TXDIS_DEFAULT << 3)
329 #define UART_CMD_MASTEREN (0x1UL << 4)
330 #define _UART_CMD_MASTEREN_SHIFT 4
331 #define _UART_CMD_MASTEREN_MASK 0x10UL
332 #define _UART_CMD_MASTEREN_DEFAULT 0x00000000UL
333 #define UART_CMD_MASTEREN_DEFAULT (_UART_CMD_MASTEREN_DEFAULT << 4)
334 #define UART_CMD_MASTERDIS (0x1UL << 5)
335 #define _UART_CMD_MASTERDIS_SHIFT 5
336 #define _UART_CMD_MASTERDIS_MASK 0x20UL
337 #define _UART_CMD_MASTERDIS_DEFAULT 0x00000000UL
338 #define UART_CMD_MASTERDIS_DEFAULT (_UART_CMD_MASTERDIS_DEFAULT << 5)
339 #define UART_CMD_RXBLOCKEN (0x1UL << 6)
340 #define _UART_CMD_RXBLOCKEN_SHIFT 6
341 #define _UART_CMD_RXBLOCKEN_MASK 0x40UL
342 #define _UART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL
343 #define UART_CMD_RXBLOCKEN_DEFAULT (_UART_CMD_RXBLOCKEN_DEFAULT << 6)
344 #define UART_CMD_RXBLOCKDIS (0x1UL << 7)
345 #define _UART_CMD_RXBLOCKDIS_SHIFT 7
346 #define _UART_CMD_RXBLOCKDIS_MASK 0x80UL
347 #define _UART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL
348 #define UART_CMD_RXBLOCKDIS_DEFAULT (_UART_CMD_RXBLOCKDIS_DEFAULT << 7)
349 #define UART_CMD_TXTRIEN (0x1UL << 8)
350 #define _UART_CMD_TXTRIEN_SHIFT 8
351 #define _UART_CMD_TXTRIEN_MASK 0x100UL
352 #define _UART_CMD_TXTRIEN_DEFAULT 0x00000000UL
353 #define UART_CMD_TXTRIEN_DEFAULT (_UART_CMD_TXTRIEN_DEFAULT << 8)
354 #define UART_CMD_TXTRIDIS (0x1UL << 9)
355 #define _UART_CMD_TXTRIDIS_SHIFT 9
356 #define _UART_CMD_TXTRIDIS_MASK 0x200UL
357 #define _UART_CMD_TXTRIDIS_DEFAULT 0x00000000UL
358 #define UART_CMD_TXTRIDIS_DEFAULT (_UART_CMD_TXTRIDIS_DEFAULT << 9)
359 #define UART_CMD_CLEARTX (0x1UL << 10)
360 #define _UART_CMD_CLEARTX_SHIFT 10
361 #define _UART_CMD_CLEARTX_MASK 0x400UL
362 #define _UART_CMD_CLEARTX_DEFAULT 0x00000000UL
363 #define UART_CMD_CLEARTX_DEFAULT (_UART_CMD_CLEARTX_DEFAULT << 10)
364 #define UART_CMD_CLEARRX (0x1UL << 11)
365 #define _UART_CMD_CLEARRX_SHIFT 11
366 #define _UART_CMD_CLEARRX_MASK 0x800UL
367 #define _UART_CMD_CLEARRX_DEFAULT 0x00000000UL
368 #define UART_CMD_CLEARRX_DEFAULT (_UART_CMD_CLEARRX_DEFAULT << 11)
370 /* Bit fields for UART STATUS */
371 #define _UART_STATUS_RESETVALUE 0x00000040UL
372 #define _UART_STATUS_MASK 0x00001FFFUL
373 #define UART_STATUS_RXENS (0x1UL << 0)
374 #define _UART_STATUS_RXENS_SHIFT 0
375 #define _UART_STATUS_RXENS_MASK 0x1UL
376 #define _UART_STATUS_RXENS_DEFAULT 0x00000000UL
377 #define UART_STATUS_RXENS_DEFAULT (_UART_STATUS_RXENS_DEFAULT << 0)
378 #define UART_STATUS_TXENS (0x1UL << 1)
379 #define _UART_STATUS_TXENS_SHIFT 1
380 #define _UART_STATUS_TXENS_MASK 0x2UL
381 #define _UART_STATUS_TXENS_DEFAULT 0x00000000UL
382 #define UART_STATUS_TXENS_DEFAULT (_UART_STATUS_TXENS_DEFAULT << 1)
383 #define UART_STATUS_MASTER (0x1UL << 2)
384 #define _UART_STATUS_MASTER_SHIFT 2
385 #define _UART_STATUS_MASTER_MASK 0x4UL
386 #define _UART_STATUS_MASTER_DEFAULT 0x00000000UL
387 #define UART_STATUS_MASTER_DEFAULT (_UART_STATUS_MASTER_DEFAULT << 2)
388 #define UART_STATUS_RXBLOCK (0x1UL << 3)
389 #define _UART_STATUS_RXBLOCK_SHIFT 3
390 #define _UART_STATUS_RXBLOCK_MASK 0x8UL
391 #define _UART_STATUS_RXBLOCK_DEFAULT 0x00000000UL
392 #define UART_STATUS_RXBLOCK_DEFAULT (_UART_STATUS_RXBLOCK_DEFAULT << 3)
393 #define UART_STATUS_TXTRI (0x1UL << 4)
394 #define _UART_STATUS_TXTRI_SHIFT 4
395 #define _UART_STATUS_TXTRI_MASK 0x10UL
396 #define _UART_STATUS_TXTRI_DEFAULT 0x00000000UL
397 #define UART_STATUS_TXTRI_DEFAULT (_UART_STATUS_TXTRI_DEFAULT << 4)
398 #define UART_STATUS_TXC (0x1UL << 5)
399 #define _UART_STATUS_TXC_SHIFT 5
400 #define _UART_STATUS_TXC_MASK 0x20UL
401 #define _UART_STATUS_TXC_DEFAULT 0x00000000UL
402 #define UART_STATUS_TXC_DEFAULT (_UART_STATUS_TXC_DEFAULT << 5)
403 #define UART_STATUS_TXBL (0x1UL << 6)
404 #define _UART_STATUS_TXBL_SHIFT 6
405 #define _UART_STATUS_TXBL_MASK 0x40UL
406 #define _UART_STATUS_TXBL_DEFAULT 0x00000001UL
407 #define UART_STATUS_TXBL_DEFAULT (_UART_STATUS_TXBL_DEFAULT << 6)
408 #define UART_STATUS_RXDATAV (0x1UL << 7)
409 #define _UART_STATUS_RXDATAV_SHIFT 7
410 #define _UART_STATUS_RXDATAV_MASK 0x80UL
411 #define _UART_STATUS_RXDATAV_DEFAULT 0x00000000UL
412 #define UART_STATUS_RXDATAV_DEFAULT (_UART_STATUS_RXDATAV_DEFAULT << 7)
413 #define UART_STATUS_RXFULL (0x1UL << 8)
414 #define _UART_STATUS_RXFULL_SHIFT 8
415 #define _UART_STATUS_RXFULL_MASK 0x100UL
416 #define _UART_STATUS_RXFULL_DEFAULT 0x00000000UL
417 #define UART_STATUS_RXFULL_DEFAULT (_UART_STATUS_RXFULL_DEFAULT << 8)
418 #define UART_STATUS_TXBDRIGHT (0x1UL << 9)
419 #define _UART_STATUS_TXBDRIGHT_SHIFT 9
420 #define _UART_STATUS_TXBDRIGHT_MASK 0x200UL
421 #define _UART_STATUS_TXBDRIGHT_DEFAULT 0x00000000UL
422 #define UART_STATUS_TXBDRIGHT_DEFAULT (_UART_STATUS_TXBDRIGHT_DEFAULT << 9)
423 #define UART_STATUS_TXBSRIGHT (0x1UL << 10)
424 #define _UART_STATUS_TXBSRIGHT_SHIFT 10
425 #define _UART_STATUS_TXBSRIGHT_MASK 0x400UL
426 #define _UART_STATUS_TXBSRIGHT_DEFAULT 0x00000000UL
427 #define UART_STATUS_TXBSRIGHT_DEFAULT (_UART_STATUS_TXBSRIGHT_DEFAULT << 10)
428 #define UART_STATUS_RXDATAVRIGHT (0x1UL << 11)
429 #define _UART_STATUS_RXDATAVRIGHT_SHIFT 11
430 #define _UART_STATUS_RXDATAVRIGHT_MASK 0x800UL
431 #define _UART_STATUS_RXDATAVRIGHT_DEFAULT 0x00000000UL
432 #define UART_STATUS_RXDATAVRIGHT_DEFAULT (_UART_STATUS_RXDATAVRIGHT_DEFAULT << 11)
433 #define UART_STATUS_RXFULLRIGHT (0x1UL << 12)
434 #define _UART_STATUS_RXFULLRIGHT_SHIFT 12
435 #define _UART_STATUS_RXFULLRIGHT_MASK 0x1000UL
436 #define _UART_STATUS_RXFULLRIGHT_DEFAULT 0x00000000UL
437 #define UART_STATUS_RXFULLRIGHT_DEFAULT (_UART_STATUS_RXFULLRIGHT_DEFAULT << 12)
439 /* Bit fields for UART CLKDIV */
440 #define _UART_CLKDIV_RESETVALUE 0x00000000UL
441 #define _UART_CLKDIV_MASK 0x001FFFC0UL
442 #define _UART_CLKDIV_DIV_SHIFT 6
443 #define _UART_CLKDIV_DIV_MASK 0x1FFFC0UL
444 #define _UART_CLKDIV_DIV_DEFAULT 0x00000000UL
445 #define UART_CLKDIV_DIV_DEFAULT (_UART_CLKDIV_DIV_DEFAULT << 6)
447 /* Bit fields for UART RXDATAX */
448 #define _UART_RXDATAX_RESETVALUE 0x00000000UL
449 #define _UART_RXDATAX_MASK 0x0000C1FFUL
450 #define _UART_RXDATAX_RXDATA_SHIFT 0
451 #define _UART_RXDATAX_RXDATA_MASK 0x1FFUL
452 #define _UART_RXDATAX_RXDATA_DEFAULT 0x00000000UL
453 #define UART_RXDATAX_RXDATA_DEFAULT (_UART_RXDATAX_RXDATA_DEFAULT << 0)
454 #define UART_RXDATAX_PERR (0x1UL << 14)
455 #define _UART_RXDATAX_PERR_SHIFT 14
456 #define _UART_RXDATAX_PERR_MASK 0x4000UL
457 #define _UART_RXDATAX_PERR_DEFAULT 0x00000000UL
458 #define UART_RXDATAX_PERR_DEFAULT (_UART_RXDATAX_PERR_DEFAULT << 14)
459 #define UART_RXDATAX_FERR (0x1UL << 15)
460 #define _UART_RXDATAX_FERR_SHIFT 15
461 #define _UART_RXDATAX_FERR_MASK 0x8000UL
462 #define _UART_RXDATAX_FERR_DEFAULT 0x00000000UL
463 #define UART_RXDATAX_FERR_DEFAULT (_UART_RXDATAX_FERR_DEFAULT << 15)
465 /* Bit fields for UART RXDATA */
466 #define _UART_RXDATA_RESETVALUE 0x00000000UL
467 #define _UART_RXDATA_MASK 0x000000FFUL
468 #define _UART_RXDATA_RXDATA_SHIFT 0
469 #define _UART_RXDATA_RXDATA_MASK 0xFFUL
470 #define _UART_RXDATA_RXDATA_DEFAULT 0x00000000UL
471 #define UART_RXDATA_RXDATA_DEFAULT (_UART_RXDATA_RXDATA_DEFAULT << 0)
473 /* Bit fields for UART RXDOUBLEX */
474 #define _UART_RXDOUBLEX_RESETVALUE 0x00000000UL
475 #define _UART_RXDOUBLEX_MASK 0xC1FFC1FFUL
476 #define _UART_RXDOUBLEX_RXDATA0_SHIFT 0
477 #define _UART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL
478 #define _UART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL
479 #define UART_RXDOUBLEX_RXDATA0_DEFAULT (_UART_RXDOUBLEX_RXDATA0_DEFAULT << 0)
480 #define UART_RXDOUBLEX_PERR0 (0x1UL << 14)
481 #define _UART_RXDOUBLEX_PERR0_SHIFT 14
482 #define _UART_RXDOUBLEX_PERR0_MASK 0x4000UL
483 #define _UART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL
484 #define UART_RXDOUBLEX_PERR0_DEFAULT (_UART_RXDOUBLEX_PERR0_DEFAULT << 14)
485 #define UART_RXDOUBLEX_FERR0 (0x1UL << 15)
486 #define _UART_RXDOUBLEX_FERR0_SHIFT 15
487 #define _UART_RXDOUBLEX_FERR0_MASK 0x8000UL
488 #define _UART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL
489 #define UART_RXDOUBLEX_FERR0_DEFAULT (_UART_RXDOUBLEX_FERR0_DEFAULT << 15)
490 #define _UART_RXDOUBLEX_RXDATA1_SHIFT 16
491 #define _UART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL
492 #define _UART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL
493 #define UART_RXDOUBLEX_RXDATA1_DEFAULT (_UART_RXDOUBLEX_RXDATA1_DEFAULT << 16)
494 #define UART_RXDOUBLEX_PERR1 (0x1UL << 30)
495 #define _UART_RXDOUBLEX_PERR1_SHIFT 30
496 #define _UART_RXDOUBLEX_PERR1_MASK 0x40000000UL
497 #define _UART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL
498 #define UART_RXDOUBLEX_PERR1_DEFAULT (_UART_RXDOUBLEX_PERR1_DEFAULT << 30)
499 #define UART_RXDOUBLEX_FERR1 (0x1UL << 31)
500 #define _UART_RXDOUBLEX_FERR1_SHIFT 31
501 #define _UART_RXDOUBLEX_FERR1_MASK 0x80000000UL
502 #define _UART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL
503 #define UART_RXDOUBLEX_FERR1_DEFAULT (_UART_RXDOUBLEX_FERR1_DEFAULT << 31)
505 /* Bit fields for UART RXDOUBLE */
506 #define _UART_RXDOUBLE_RESETVALUE 0x00000000UL
507 #define _UART_RXDOUBLE_MASK 0x0000FFFFUL
508 #define _UART_RXDOUBLE_RXDATA0_SHIFT 0
509 #define _UART_RXDOUBLE_RXDATA0_MASK 0xFFUL
510 #define _UART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL
511 #define UART_RXDOUBLE_RXDATA0_DEFAULT (_UART_RXDOUBLE_RXDATA0_DEFAULT << 0)
512 #define _UART_RXDOUBLE_RXDATA1_SHIFT 8
513 #define _UART_RXDOUBLE_RXDATA1_MASK 0xFF00UL
514 #define _UART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL
515 #define UART_RXDOUBLE_RXDATA1_DEFAULT (_UART_RXDOUBLE_RXDATA1_DEFAULT << 8)
517 /* Bit fields for UART RXDATAXP */
518 #define _UART_RXDATAXP_RESETVALUE 0x00000000UL
519 #define _UART_RXDATAXP_MASK 0x0000C1FFUL
520 #define _UART_RXDATAXP_RXDATAP_SHIFT 0
521 #define _UART_RXDATAXP_RXDATAP_MASK 0x1FFUL
522 #define _UART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL
523 #define UART_RXDATAXP_RXDATAP_DEFAULT (_UART_RXDATAXP_RXDATAP_DEFAULT << 0)
524 #define UART_RXDATAXP_PERRP (0x1UL << 14)
525 #define _UART_RXDATAXP_PERRP_SHIFT 14
526 #define _UART_RXDATAXP_PERRP_MASK 0x4000UL
527 #define _UART_RXDATAXP_PERRP_DEFAULT 0x00000000UL
528 #define UART_RXDATAXP_PERRP_DEFAULT (_UART_RXDATAXP_PERRP_DEFAULT << 14)
529 #define UART_RXDATAXP_FERRP (0x1UL << 15)
530 #define _UART_RXDATAXP_FERRP_SHIFT 15
531 #define _UART_RXDATAXP_FERRP_MASK 0x8000UL
532 #define _UART_RXDATAXP_FERRP_DEFAULT 0x00000000UL
533 #define UART_RXDATAXP_FERRP_DEFAULT (_UART_RXDATAXP_FERRP_DEFAULT << 15)
535 /* Bit fields for UART RXDOUBLEXP */
536 #define _UART_RXDOUBLEXP_RESETVALUE 0x00000000UL
537 #define _UART_RXDOUBLEXP_MASK 0xC1FFC1FFUL
538 #define _UART_RXDOUBLEXP_RXDATAP0_SHIFT 0
539 #define _UART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL
540 #define _UART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL
541 #define UART_RXDOUBLEXP_RXDATAP0_DEFAULT (_UART_RXDOUBLEXP_RXDATAP0_DEFAULT << 0)
542 #define UART_RXDOUBLEXP_PERRP0 (0x1UL << 14)
543 #define _UART_RXDOUBLEXP_PERRP0_SHIFT 14
544 #define _UART_RXDOUBLEXP_PERRP0_MASK 0x4000UL
545 #define _UART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL
546 #define UART_RXDOUBLEXP_PERRP0_DEFAULT (_UART_RXDOUBLEXP_PERRP0_DEFAULT << 14)
547 #define UART_RXDOUBLEXP_FERRP0 (0x1UL << 15)
548 #define _UART_RXDOUBLEXP_FERRP0_SHIFT 15
549 #define _UART_RXDOUBLEXP_FERRP0_MASK 0x8000UL
550 #define _UART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL
551 #define UART_RXDOUBLEXP_FERRP0_DEFAULT (_UART_RXDOUBLEXP_FERRP0_DEFAULT << 15)
552 #define _UART_RXDOUBLEXP_RXDATAP1_SHIFT 16
553 #define _UART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL
554 #define _UART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL
555 #define UART_RXDOUBLEXP_RXDATAP1_DEFAULT (_UART_RXDOUBLEXP_RXDATAP1_DEFAULT << 16)
556 #define UART_RXDOUBLEXP_PERRP1 (0x1UL << 30)
557 #define _UART_RXDOUBLEXP_PERRP1_SHIFT 30
558 #define _UART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL
559 #define _UART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL
560 #define UART_RXDOUBLEXP_PERRP1_DEFAULT (_UART_RXDOUBLEXP_PERRP1_DEFAULT << 30)
561 #define UART_RXDOUBLEXP_FERRP1 (0x1UL << 31)
562 #define _UART_RXDOUBLEXP_FERRP1_SHIFT 31
563 #define _UART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL
564 #define _UART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL
565 #define UART_RXDOUBLEXP_FERRP1_DEFAULT (_UART_RXDOUBLEXP_FERRP1_DEFAULT << 31)
567 /* Bit fields for UART TXDATAX */
568 #define _UART_TXDATAX_RESETVALUE 0x00000000UL
569 #define _UART_TXDATAX_MASK 0x0000F9FFUL
570 #define _UART_TXDATAX_TXDATAX_SHIFT 0
571 #define _UART_TXDATAX_TXDATAX_MASK 0x1FFUL
572 #define _UART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL
573 #define UART_TXDATAX_TXDATAX_DEFAULT (_UART_TXDATAX_TXDATAX_DEFAULT << 0)
574 #define UART_TXDATAX_UBRXAT (0x1UL << 11)
575 #define _UART_TXDATAX_UBRXAT_SHIFT 11
576 #define _UART_TXDATAX_UBRXAT_MASK 0x800UL
577 #define _UART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL
578 #define UART_TXDATAX_UBRXAT_DEFAULT (_UART_TXDATAX_UBRXAT_DEFAULT << 11)
579 #define UART_TXDATAX_TXTRIAT (0x1UL << 12)
580 #define _UART_TXDATAX_TXTRIAT_SHIFT 12
581 #define _UART_TXDATAX_TXTRIAT_MASK 0x1000UL
582 #define _UART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL
583 #define UART_TXDATAX_TXTRIAT_DEFAULT (_UART_TXDATAX_TXTRIAT_DEFAULT << 12)
584 #define UART_TXDATAX_TXBREAK (0x1UL << 13)
585 #define _UART_TXDATAX_TXBREAK_SHIFT 13
586 #define _UART_TXDATAX_TXBREAK_MASK 0x2000UL
587 #define _UART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL
588 #define UART_TXDATAX_TXBREAK_DEFAULT (_UART_TXDATAX_TXBREAK_DEFAULT << 13)
589 #define UART_TXDATAX_TXDISAT (0x1UL << 14)
590 #define _UART_TXDATAX_TXDISAT_SHIFT 14
591 #define _UART_TXDATAX_TXDISAT_MASK 0x4000UL
592 #define _UART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL
593 #define UART_TXDATAX_TXDISAT_DEFAULT (_UART_TXDATAX_TXDISAT_DEFAULT << 14)
594 #define UART_TXDATAX_RXENAT (0x1UL << 15)
595 #define _UART_TXDATAX_RXENAT_SHIFT 15
596 #define _UART_TXDATAX_RXENAT_MASK 0x8000UL
597 #define _UART_TXDATAX_RXENAT_DEFAULT 0x00000000UL
598 #define UART_TXDATAX_RXENAT_DEFAULT (_UART_TXDATAX_RXENAT_DEFAULT << 15)
600 /* Bit fields for UART TXDATA */
601 #define _UART_TXDATA_RESETVALUE 0x00000000UL
602 #define _UART_TXDATA_MASK 0x000000FFUL
603 #define _UART_TXDATA_TXDATA_SHIFT 0
604 #define _UART_TXDATA_TXDATA_MASK 0xFFUL
605 #define _UART_TXDATA_TXDATA_DEFAULT 0x00000000UL
606 #define UART_TXDATA_TXDATA_DEFAULT (_UART_TXDATA_TXDATA_DEFAULT << 0)
608 /* Bit fields for UART TXDOUBLEX */
609 #define _UART_TXDOUBLEX_RESETVALUE 0x00000000UL
610 #define _UART_TXDOUBLEX_MASK 0xF9FFF9FFUL
611 #define _UART_TXDOUBLEX_TXDATA0_SHIFT 0
612 #define _UART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL
613 #define _UART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL
614 #define UART_TXDOUBLEX_TXDATA0_DEFAULT (_UART_TXDOUBLEX_TXDATA0_DEFAULT << 0)
615 #define UART_TXDOUBLEX_UBRXAT0 (0x1UL << 11)
616 #define _UART_TXDOUBLEX_UBRXAT0_SHIFT 11
617 #define _UART_TXDOUBLEX_UBRXAT0_MASK 0x800UL
618 #define _UART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL
619 #define UART_TXDOUBLEX_UBRXAT0_DEFAULT (_UART_TXDOUBLEX_UBRXAT0_DEFAULT << 11)
620 #define UART_TXDOUBLEX_TXTRIAT0 (0x1UL << 12)
621 #define _UART_TXDOUBLEX_TXTRIAT0_SHIFT 12
622 #define _UART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL
623 #define _UART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL
624 #define UART_TXDOUBLEX_TXTRIAT0_DEFAULT (_UART_TXDOUBLEX_TXTRIAT0_DEFAULT << 12)
625 #define UART_TXDOUBLEX_TXBREAK0 (0x1UL << 13)
626 #define _UART_TXDOUBLEX_TXBREAK0_SHIFT 13
627 #define _UART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL
628 #define _UART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL
629 #define UART_TXDOUBLEX_TXBREAK0_DEFAULT (_UART_TXDOUBLEX_TXBREAK0_DEFAULT << 13)
630 #define UART_TXDOUBLEX_TXDISAT0 (0x1UL << 14)
631 #define _UART_TXDOUBLEX_TXDISAT0_SHIFT 14
632 #define _UART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL
633 #define _UART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL
634 #define UART_TXDOUBLEX_TXDISAT0_DEFAULT (_UART_TXDOUBLEX_TXDISAT0_DEFAULT << 14)
635 #define UART_TXDOUBLEX_RXENAT0 (0x1UL << 15)
636 #define _UART_TXDOUBLEX_RXENAT0_SHIFT 15
637 #define _UART_TXDOUBLEX_RXENAT0_MASK 0x8000UL
638 #define _UART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL
639 #define UART_TXDOUBLEX_RXENAT0_DEFAULT (_UART_TXDOUBLEX_RXENAT0_DEFAULT << 15)
640 #define _UART_TXDOUBLEX_TXDATA1_SHIFT 16
641 #define _UART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL
642 #define _UART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL
643 #define UART_TXDOUBLEX_TXDATA1_DEFAULT (_UART_TXDOUBLEX_TXDATA1_DEFAULT << 16)
644 #define UART_TXDOUBLEX_UBRXAT1 (0x1UL << 27)
645 #define _UART_TXDOUBLEX_UBRXAT1_SHIFT 27
646 #define _UART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL
647 #define _UART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL
648 #define UART_TXDOUBLEX_UBRXAT1_DEFAULT (_UART_TXDOUBLEX_UBRXAT1_DEFAULT << 27)
649 #define UART_TXDOUBLEX_TXTRIAT1 (0x1UL << 28)
650 #define _UART_TXDOUBLEX_TXTRIAT1_SHIFT 28
651 #define _UART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL
652 #define _UART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL
653 #define UART_TXDOUBLEX_TXTRIAT1_DEFAULT (_UART_TXDOUBLEX_TXTRIAT1_DEFAULT << 28)
654 #define UART_TXDOUBLEX_TXBREAK1 (0x1UL << 29)
655 #define _UART_TXDOUBLEX_TXBREAK1_SHIFT 29
656 #define _UART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL
657 #define _UART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL
658 #define UART_TXDOUBLEX_TXBREAK1_DEFAULT (_UART_TXDOUBLEX_TXBREAK1_DEFAULT << 29)
659 #define UART_TXDOUBLEX_TXDISAT1 (0x1UL << 30)
660 #define _UART_TXDOUBLEX_TXDISAT1_SHIFT 30
661 #define _UART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL
662 #define _UART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL
663 #define UART_TXDOUBLEX_TXDISAT1_DEFAULT (_UART_TXDOUBLEX_TXDISAT1_DEFAULT << 30)
664 #define UART_TXDOUBLEX_RXENAT1 (0x1UL << 31)
665 #define _UART_TXDOUBLEX_RXENAT1_SHIFT 31
666 #define _UART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL
667 #define _UART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL
668 #define UART_TXDOUBLEX_RXENAT1_DEFAULT (_UART_TXDOUBLEX_RXENAT1_DEFAULT << 31)
670 /* Bit fields for UART TXDOUBLE */
671 #define _UART_TXDOUBLE_RESETVALUE 0x00000000UL
672 #define _UART_TXDOUBLE_MASK 0x0000FFFFUL
673 #define _UART_TXDOUBLE_TXDATA0_SHIFT 0
674 #define _UART_TXDOUBLE_TXDATA0_MASK 0xFFUL
675 #define _UART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL
676 #define UART_TXDOUBLE_TXDATA0_DEFAULT (_UART_TXDOUBLE_TXDATA0_DEFAULT << 0)
677 #define _UART_TXDOUBLE_TXDATA1_SHIFT 8
678 #define _UART_TXDOUBLE_TXDATA1_MASK 0xFF00UL
679 #define _UART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL
680 #define UART_TXDOUBLE_TXDATA1_DEFAULT (_UART_TXDOUBLE_TXDATA1_DEFAULT << 8)
682 /* Bit fields for UART IF */
683 #define _UART_IF_RESETVALUE 0x00000002UL
684 #define _UART_IF_MASK 0x00001FFFUL
685 #define UART_IF_TXC (0x1UL << 0)
686 #define _UART_IF_TXC_SHIFT 0
687 #define _UART_IF_TXC_MASK 0x1UL
688 #define _UART_IF_TXC_DEFAULT 0x00000000UL
689 #define UART_IF_TXC_DEFAULT (_UART_IF_TXC_DEFAULT << 0)
690 #define UART_IF_TXBL (0x1UL << 1)
691 #define _UART_IF_TXBL_SHIFT 1
692 #define _UART_IF_TXBL_MASK 0x2UL
693 #define _UART_IF_TXBL_DEFAULT 0x00000001UL
694 #define UART_IF_TXBL_DEFAULT (_UART_IF_TXBL_DEFAULT << 1)
695 #define UART_IF_RXDATAV (0x1UL << 2)
696 #define _UART_IF_RXDATAV_SHIFT 2
697 #define _UART_IF_RXDATAV_MASK 0x4UL
698 #define _UART_IF_RXDATAV_DEFAULT 0x00000000UL
699 #define UART_IF_RXDATAV_DEFAULT (_UART_IF_RXDATAV_DEFAULT << 2)
700 #define UART_IF_RXFULL (0x1UL << 3)
701 #define _UART_IF_RXFULL_SHIFT 3
702 #define _UART_IF_RXFULL_MASK 0x8UL
703 #define _UART_IF_RXFULL_DEFAULT 0x00000000UL
704 #define UART_IF_RXFULL_DEFAULT (_UART_IF_RXFULL_DEFAULT << 3)
705 #define UART_IF_RXOF (0x1UL << 4)
706 #define _UART_IF_RXOF_SHIFT 4
707 #define _UART_IF_RXOF_MASK 0x10UL
708 #define _UART_IF_RXOF_DEFAULT 0x00000000UL
709 #define UART_IF_RXOF_DEFAULT (_UART_IF_RXOF_DEFAULT << 4)
710 #define UART_IF_RXUF (0x1UL << 5)
711 #define _UART_IF_RXUF_SHIFT 5
712 #define _UART_IF_RXUF_MASK 0x20UL
713 #define _UART_IF_RXUF_DEFAULT 0x00000000UL
714 #define UART_IF_RXUF_DEFAULT (_UART_IF_RXUF_DEFAULT << 5)
715 #define UART_IF_TXOF (0x1UL << 6)
716 #define _UART_IF_TXOF_SHIFT 6
717 #define _UART_IF_TXOF_MASK 0x40UL
718 #define _UART_IF_TXOF_DEFAULT 0x00000000UL
719 #define UART_IF_TXOF_DEFAULT (_UART_IF_TXOF_DEFAULT << 6)
720 #define UART_IF_TXUF (0x1UL << 7)
721 #define _UART_IF_TXUF_SHIFT 7
722 #define _UART_IF_TXUF_MASK 0x80UL
723 #define _UART_IF_TXUF_DEFAULT 0x00000000UL
724 #define UART_IF_TXUF_DEFAULT (_UART_IF_TXUF_DEFAULT << 7)
725 #define UART_IF_PERR (0x1UL << 8)
726 #define _UART_IF_PERR_SHIFT 8
727 #define _UART_IF_PERR_MASK 0x100UL
728 #define _UART_IF_PERR_DEFAULT 0x00000000UL
729 #define UART_IF_PERR_DEFAULT (_UART_IF_PERR_DEFAULT << 8)
730 #define UART_IF_FERR (0x1UL << 9)
731 #define _UART_IF_FERR_SHIFT 9
732 #define _UART_IF_FERR_MASK 0x200UL
733 #define _UART_IF_FERR_DEFAULT 0x00000000UL
734 #define UART_IF_FERR_DEFAULT (_UART_IF_FERR_DEFAULT << 9)
735 #define UART_IF_MPAF (0x1UL << 10)
736 #define _UART_IF_MPAF_SHIFT 10
737 #define _UART_IF_MPAF_MASK 0x400UL
738 #define _UART_IF_MPAF_DEFAULT 0x00000000UL
739 #define UART_IF_MPAF_DEFAULT (_UART_IF_MPAF_DEFAULT << 10)
740 #define UART_IF_SSM (0x1UL << 11)
741 #define _UART_IF_SSM_SHIFT 11
742 #define _UART_IF_SSM_MASK 0x800UL
743 #define _UART_IF_SSM_DEFAULT 0x00000000UL
744 #define UART_IF_SSM_DEFAULT (_UART_IF_SSM_DEFAULT << 11)
745 #define UART_IF_CCF (0x1UL << 12)
746 #define _UART_IF_CCF_SHIFT 12
747 #define _UART_IF_CCF_MASK 0x1000UL
748 #define _UART_IF_CCF_DEFAULT 0x00000000UL
749 #define UART_IF_CCF_DEFAULT (_UART_IF_CCF_DEFAULT << 12)
751 /* Bit fields for UART IFS */
752 #define _UART_IFS_RESETVALUE 0x00000000UL
753 #define _UART_IFS_MASK 0x00001FF9UL
754 #define UART_IFS_TXC (0x1UL << 0)
755 #define _UART_IFS_TXC_SHIFT 0
756 #define _UART_IFS_TXC_MASK 0x1UL
757 #define _UART_IFS_TXC_DEFAULT 0x00000000UL
758 #define UART_IFS_TXC_DEFAULT (_UART_IFS_TXC_DEFAULT << 0)
759 #define UART_IFS_RXFULL (0x1UL << 3)
760 #define _UART_IFS_RXFULL_SHIFT 3
761 #define _UART_IFS_RXFULL_MASK 0x8UL
762 #define _UART_IFS_RXFULL_DEFAULT 0x00000000UL
763 #define UART_IFS_RXFULL_DEFAULT (_UART_IFS_RXFULL_DEFAULT << 3)
764 #define UART_IFS_RXOF (0x1UL << 4)
765 #define _UART_IFS_RXOF_SHIFT 4
766 #define _UART_IFS_RXOF_MASK 0x10UL
767 #define _UART_IFS_RXOF_DEFAULT 0x00000000UL
768 #define UART_IFS_RXOF_DEFAULT (_UART_IFS_RXOF_DEFAULT << 4)
769 #define UART_IFS_RXUF (0x1UL << 5)
770 #define _UART_IFS_RXUF_SHIFT 5
771 #define _UART_IFS_RXUF_MASK 0x20UL
772 #define _UART_IFS_RXUF_DEFAULT 0x00000000UL
773 #define UART_IFS_RXUF_DEFAULT (_UART_IFS_RXUF_DEFAULT << 5)
774 #define UART_IFS_TXOF (0x1UL << 6)
775 #define _UART_IFS_TXOF_SHIFT 6
776 #define _UART_IFS_TXOF_MASK 0x40UL
777 #define _UART_IFS_TXOF_DEFAULT 0x00000000UL
778 #define UART_IFS_TXOF_DEFAULT (_UART_IFS_TXOF_DEFAULT << 6)
779 #define UART_IFS_TXUF (0x1UL << 7)
780 #define _UART_IFS_TXUF_SHIFT 7
781 #define _UART_IFS_TXUF_MASK 0x80UL
782 #define _UART_IFS_TXUF_DEFAULT 0x00000000UL
783 #define UART_IFS_TXUF_DEFAULT (_UART_IFS_TXUF_DEFAULT << 7)
784 #define UART_IFS_PERR (0x1UL << 8)
785 #define _UART_IFS_PERR_SHIFT 8
786 #define _UART_IFS_PERR_MASK 0x100UL
787 #define _UART_IFS_PERR_DEFAULT 0x00000000UL
788 #define UART_IFS_PERR_DEFAULT (_UART_IFS_PERR_DEFAULT << 8)
789 #define UART_IFS_FERR (0x1UL << 9)
790 #define _UART_IFS_FERR_SHIFT 9
791 #define _UART_IFS_FERR_MASK 0x200UL
792 #define _UART_IFS_FERR_DEFAULT 0x00000000UL
793 #define UART_IFS_FERR_DEFAULT (_UART_IFS_FERR_DEFAULT << 9)
794 #define UART_IFS_MPAF (0x1UL << 10)
795 #define _UART_IFS_MPAF_SHIFT 10
796 #define _UART_IFS_MPAF_MASK 0x400UL
797 #define _UART_IFS_MPAF_DEFAULT 0x00000000UL
798 #define UART_IFS_MPAF_DEFAULT (_UART_IFS_MPAF_DEFAULT << 10)
799 #define UART_IFS_SSM (0x1UL << 11)
800 #define _UART_IFS_SSM_SHIFT 11
801 #define _UART_IFS_SSM_MASK 0x800UL
802 #define _UART_IFS_SSM_DEFAULT 0x00000000UL
803 #define UART_IFS_SSM_DEFAULT (_UART_IFS_SSM_DEFAULT << 11)
804 #define UART_IFS_CCF (0x1UL << 12)
805 #define _UART_IFS_CCF_SHIFT 12
806 #define _UART_IFS_CCF_MASK 0x1000UL
807 #define _UART_IFS_CCF_DEFAULT 0x00000000UL
808 #define UART_IFS_CCF_DEFAULT (_UART_IFS_CCF_DEFAULT << 12)
810 /* Bit fields for UART IFC */
811 #define _UART_IFC_RESETVALUE 0x00000000UL
812 #define _UART_IFC_MASK 0x00001FF9UL
813 #define UART_IFC_TXC (0x1UL << 0)
814 #define _UART_IFC_TXC_SHIFT 0
815 #define _UART_IFC_TXC_MASK 0x1UL
816 #define _UART_IFC_TXC_DEFAULT 0x00000000UL
817 #define UART_IFC_TXC_DEFAULT (_UART_IFC_TXC_DEFAULT << 0)
818 #define UART_IFC_RXFULL (0x1UL << 3)
819 #define _UART_IFC_RXFULL_SHIFT 3
820 #define _UART_IFC_RXFULL_MASK 0x8UL
821 #define _UART_IFC_RXFULL_DEFAULT 0x00000000UL
822 #define UART_IFC_RXFULL_DEFAULT (_UART_IFC_RXFULL_DEFAULT << 3)
823 #define UART_IFC_RXOF (0x1UL << 4)
824 #define _UART_IFC_RXOF_SHIFT 4
825 #define _UART_IFC_RXOF_MASK 0x10UL
826 #define _UART_IFC_RXOF_DEFAULT 0x00000000UL
827 #define UART_IFC_RXOF_DEFAULT (_UART_IFC_RXOF_DEFAULT << 4)
828 #define UART_IFC_RXUF (0x1UL << 5)
829 #define _UART_IFC_RXUF_SHIFT 5
830 #define _UART_IFC_RXUF_MASK 0x20UL
831 #define _UART_IFC_RXUF_DEFAULT 0x00000000UL
832 #define UART_IFC_RXUF_DEFAULT (_UART_IFC_RXUF_DEFAULT << 5)
833 #define UART_IFC_TXOF (0x1UL << 6)
834 #define _UART_IFC_TXOF_SHIFT 6
835 #define _UART_IFC_TXOF_MASK 0x40UL
836 #define _UART_IFC_TXOF_DEFAULT 0x00000000UL
837 #define UART_IFC_TXOF_DEFAULT (_UART_IFC_TXOF_DEFAULT << 6)
838 #define UART_IFC_TXUF (0x1UL << 7)
839 #define _UART_IFC_TXUF_SHIFT 7
840 #define _UART_IFC_TXUF_MASK 0x80UL
841 #define _UART_IFC_TXUF_DEFAULT 0x00000000UL
842 #define UART_IFC_TXUF_DEFAULT (_UART_IFC_TXUF_DEFAULT << 7)
843 #define UART_IFC_PERR (0x1UL << 8)
844 #define _UART_IFC_PERR_SHIFT 8
845 #define _UART_IFC_PERR_MASK 0x100UL
846 #define _UART_IFC_PERR_DEFAULT 0x00000000UL
847 #define UART_IFC_PERR_DEFAULT (_UART_IFC_PERR_DEFAULT << 8)
848 #define UART_IFC_FERR (0x1UL << 9)
849 #define _UART_IFC_FERR_SHIFT 9
850 #define _UART_IFC_FERR_MASK 0x200UL
851 #define _UART_IFC_FERR_DEFAULT 0x00000000UL
852 #define UART_IFC_FERR_DEFAULT (_UART_IFC_FERR_DEFAULT << 9)
853 #define UART_IFC_MPAF (0x1UL << 10)
854 #define _UART_IFC_MPAF_SHIFT 10
855 #define _UART_IFC_MPAF_MASK 0x400UL
856 #define _UART_IFC_MPAF_DEFAULT 0x00000000UL
857 #define UART_IFC_MPAF_DEFAULT (_UART_IFC_MPAF_DEFAULT << 10)
858 #define UART_IFC_SSM (0x1UL << 11)
859 #define _UART_IFC_SSM_SHIFT 11
860 #define _UART_IFC_SSM_MASK 0x800UL
861 #define _UART_IFC_SSM_DEFAULT 0x00000000UL
862 #define UART_IFC_SSM_DEFAULT (_UART_IFC_SSM_DEFAULT << 11)
863 #define UART_IFC_CCF (0x1UL << 12)
864 #define _UART_IFC_CCF_SHIFT 12
865 #define _UART_IFC_CCF_MASK 0x1000UL
866 #define _UART_IFC_CCF_DEFAULT 0x00000000UL
867 #define UART_IFC_CCF_DEFAULT (_UART_IFC_CCF_DEFAULT << 12)
869 /* Bit fields for UART IEN */
870 #define _UART_IEN_RESETVALUE 0x00000000UL
871 #define _UART_IEN_MASK 0x00001FFFUL
872 #define UART_IEN_TXC (0x1UL << 0)
873 #define _UART_IEN_TXC_SHIFT 0
874 #define _UART_IEN_TXC_MASK 0x1UL
875 #define _UART_IEN_TXC_DEFAULT 0x00000000UL
876 #define UART_IEN_TXC_DEFAULT (_UART_IEN_TXC_DEFAULT << 0)
877 #define UART_IEN_TXBL (0x1UL << 1)
878 #define _UART_IEN_TXBL_SHIFT 1
879 #define _UART_IEN_TXBL_MASK 0x2UL
880 #define _UART_IEN_TXBL_DEFAULT 0x00000000UL
881 #define UART_IEN_TXBL_DEFAULT (_UART_IEN_TXBL_DEFAULT << 1)
882 #define UART_IEN_RXDATAV (0x1UL << 2)
883 #define _UART_IEN_RXDATAV_SHIFT 2
884 #define _UART_IEN_RXDATAV_MASK 0x4UL
885 #define _UART_IEN_RXDATAV_DEFAULT 0x00000000UL
886 #define UART_IEN_RXDATAV_DEFAULT (_UART_IEN_RXDATAV_DEFAULT << 2)
887 #define UART_IEN_RXFULL (0x1UL << 3)
888 #define _UART_IEN_RXFULL_SHIFT 3
889 #define _UART_IEN_RXFULL_MASK 0x8UL
890 #define _UART_IEN_RXFULL_DEFAULT 0x00000000UL
891 #define UART_IEN_RXFULL_DEFAULT (_UART_IEN_RXFULL_DEFAULT << 3)
892 #define UART_IEN_RXOF (0x1UL << 4)
893 #define _UART_IEN_RXOF_SHIFT 4
894 #define _UART_IEN_RXOF_MASK 0x10UL
895 #define _UART_IEN_RXOF_DEFAULT 0x00000000UL
896 #define UART_IEN_RXOF_DEFAULT (_UART_IEN_RXOF_DEFAULT << 4)
897 #define UART_IEN_RXUF (0x1UL << 5)
898 #define _UART_IEN_RXUF_SHIFT 5
899 #define _UART_IEN_RXUF_MASK 0x20UL
900 #define _UART_IEN_RXUF_DEFAULT 0x00000000UL
901 #define UART_IEN_RXUF_DEFAULT (_UART_IEN_RXUF_DEFAULT << 5)
902 #define UART_IEN_TXOF (0x1UL << 6)
903 #define _UART_IEN_TXOF_SHIFT 6
904 #define _UART_IEN_TXOF_MASK 0x40UL
905 #define _UART_IEN_TXOF_DEFAULT 0x00000000UL
906 #define UART_IEN_TXOF_DEFAULT (_UART_IEN_TXOF_DEFAULT << 6)
907 #define UART_IEN_TXUF (0x1UL << 7)
908 #define _UART_IEN_TXUF_SHIFT 7
909 #define _UART_IEN_TXUF_MASK 0x80UL
910 #define _UART_IEN_TXUF_DEFAULT 0x00000000UL
911 #define UART_IEN_TXUF_DEFAULT (_UART_IEN_TXUF_DEFAULT << 7)
912 #define UART_IEN_PERR (0x1UL << 8)
913 #define _UART_IEN_PERR_SHIFT 8
914 #define _UART_IEN_PERR_MASK 0x100UL
915 #define _UART_IEN_PERR_DEFAULT 0x00000000UL
916 #define UART_IEN_PERR_DEFAULT (_UART_IEN_PERR_DEFAULT << 8)
917 #define UART_IEN_FERR (0x1UL << 9)
918 #define _UART_IEN_FERR_SHIFT 9
919 #define _UART_IEN_FERR_MASK 0x200UL
920 #define _UART_IEN_FERR_DEFAULT 0x00000000UL
921 #define UART_IEN_FERR_DEFAULT (_UART_IEN_FERR_DEFAULT << 9)
922 #define UART_IEN_MPAF (0x1UL << 10)
923 #define _UART_IEN_MPAF_SHIFT 10
924 #define _UART_IEN_MPAF_MASK 0x400UL
925 #define _UART_IEN_MPAF_DEFAULT 0x00000000UL
926 #define UART_IEN_MPAF_DEFAULT (_UART_IEN_MPAF_DEFAULT << 10)
927 #define UART_IEN_SSM (0x1UL << 11)
928 #define _UART_IEN_SSM_SHIFT 11
929 #define _UART_IEN_SSM_MASK 0x800UL
930 #define _UART_IEN_SSM_DEFAULT 0x00000000UL
931 #define UART_IEN_SSM_DEFAULT (_UART_IEN_SSM_DEFAULT << 11)
932 #define UART_IEN_CCF (0x1UL << 12)
933 #define _UART_IEN_CCF_SHIFT 12
934 #define _UART_IEN_CCF_MASK 0x1000UL
935 #define _UART_IEN_CCF_DEFAULT 0x00000000UL
936 #define UART_IEN_CCF_DEFAULT (_UART_IEN_CCF_DEFAULT << 12)
938 /* Bit fields for UART IRCTRL */
939 #define _UART_IRCTRL_RESETVALUE 0x00000000UL
940 #define _UART_IRCTRL_MASK 0x000000FFUL
941 #define UART_IRCTRL_IREN (0x1UL << 0)
942 #define _UART_IRCTRL_IREN_SHIFT 0
943 #define _UART_IRCTRL_IREN_MASK 0x1UL
944 #define _UART_IRCTRL_IREN_DEFAULT 0x00000000UL
945 #define UART_IRCTRL_IREN_DEFAULT (_UART_IRCTRL_IREN_DEFAULT << 0)
946 #define _UART_IRCTRL_IRPW_SHIFT 1
947 #define _UART_IRCTRL_IRPW_MASK 0x6UL
948 #define _UART_IRCTRL_IRPW_DEFAULT 0x00000000UL
949 #define _UART_IRCTRL_IRPW_ONE 0x00000000UL
950 #define _UART_IRCTRL_IRPW_TWO 0x00000001UL
951 #define _UART_IRCTRL_IRPW_THREE 0x00000002UL
952 #define _UART_IRCTRL_IRPW_FOUR 0x00000003UL
953 #define UART_IRCTRL_IRPW_DEFAULT (_UART_IRCTRL_IRPW_DEFAULT << 1)
954 #define UART_IRCTRL_IRPW_ONE (_UART_IRCTRL_IRPW_ONE << 1)
955 #define UART_IRCTRL_IRPW_TWO (_UART_IRCTRL_IRPW_TWO << 1)
956 #define UART_IRCTRL_IRPW_THREE (_UART_IRCTRL_IRPW_THREE << 1)
957 #define UART_IRCTRL_IRPW_FOUR (_UART_IRCTRL_IRPW_FOUR << 1)
958 #define UART_IRCTRL_IRFILT (0x1UL << 3)
959 #define _UART_IRCTRL_IRFILT_SHIFT 3
960 #define _UART_IRCTRL_IRFILT_MASK 0x8UL
961 #define _UART_IRCTRL_IRFILT_DEFAULT 0x00000000UL
962 #define UART_IRCTRL_IRFILT_DEFAULT (_UART_IRCTRL_IRFILT_DEFAULT << 3)
963 #define _UART_IRCTRL_IRPRSSEL_SHIFT 4
964 #define _UART_IRCTRL_IRPRSSEL_MASK 0x70UL
965 #define _UART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL
966 #define _UART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL
967 #define _UART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL
968 #define _UART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL
969 #define _UART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL
970 #define _UART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL
971 #define _UART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL
972 #define _UART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL
973 #define _UART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL
974 #define UART_IRCTRL_IRPRSSEL_DEFAULT (_UART_IRCTRL_IRPRSSEL_DEFAULT << 4)
975 #define UART_IRCTRL_IRPRSSEL_PRSCH0 (_UART_IRCTRL_IRPRSSEL_PRSCH0 << 4)
976 #define UART_IRCTRL_IRPRSSEL_PRSCH1 (_UART_IRCTRL_IRPRSSEL_PRSCH1 << 4)
977 #define UART_IRCTRL_IRPRSSEL_PRSCH2 (_UART_IRCTRL_IRPRSSEL_PRSCH2 << 4)
978 #define UART_IRCTRL_IRPRSSEL_PRSCH3 (_UART_IRCTRL_IRPRSSEL_PRSCH3 << 4)
979 #define UART_IRCTRL_IRPRSSEL_PRSCH4 (_UART_IRCTRL_IRPRSSEL_PRSCH4 << 4)
980 #define UART_IRCTRL_IRPRSSEL_PRSCH5 (_UART_IRCTRL_IRPRSSEL_PRSCH5 << 4)
981 #define UART_IRCTRL_IRPRSSEL_PRSCH6 (_UART_IRCTRL_IRPRSSEL_PRSCH6 << 4)
982 #define UART_IRCTRL_IRPRSSEL_PRSCH7 (_UART_IRCTRL_IRPRSSEL_PRSCH7 << 4)
983 #define UART_IRCTRL_IRPRSEN (0x1UL << 7)
984 #define _UART_IRCTRL_IRPRSEN_SHIFT 7
985 #define _UART_IRCTRL_IRPRSEN_MASK 0x80UL
986 #define _UART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL
987 #define UART_IRCTRL_IRPRSEN_DEFAULT (_UART_IRCTRL_IRPRSEN_DEFAULT << 7)
989 /* Bit fields for UART ROUTE */
990 #define _UART_ROUTE_RESETVALUE 0x00000000UL
991 #define _UART_ROUTE_MASK 0x0000070FUL
992 #define UART_ROUTE_RXPEN (0x1UL << 0)
993 #define _UART_ROUTE_RXPEN_SHIFT 0
994 #define _UART_ROUTE_RXPEN_MASK 0x1UL
995 #define _UART_ROUTE_RXPEN_DEFAULT 0x00000000UL
996 #define UART_ROUTE_RXPEN_DEFAULT (_UART_ROUTE_RXPEN_DEFAULT << 0)
997 #define UART_ROUTE_TXPEN (0x1UL << 1)
998 #define _UART_ROUTE_TXPEN_SHIFT 1
999 #define _UART_ROUTE_TXPEN_MASK 0x2UL
1000 #define _UART_ROUTE_TXPEN_DEFAULT 0x00000000UL
1001 #define UART_ROUTE_TXPEN_DEFAULT (_UART_ROUTE_TXPEN_DEFAULT << 1)
1002 #define UART_ROUTE_CSPEN (0x1UL << 2)
1003 #define _UART_ROUTE_CSPEN_SHIFT 2
1004 #define _UART_ROUTE_CSPEN_MASK 0x4UL
1005 #define _UART_ROUTE_CSPEN_DEFAULT 0x00000000UL
1006 #define UART_ROUTE_CSPEN_DEFAULT (_UART_ROUTE_CSPEN_DEFAULT << 2)
1007 #define UART_ROUTE_CLKPEN (0x1UL << 3)
1008 #define _UART_ROUTE_CLKPEN_SHIFT 3
1009 #define _UART_ROUTE_CLKPEN_MASK 0x8UL
1010 #define _UART_ROUTE_CLKPEN_DEFAULT 0x00000000UL
1011 #define UART_ROUTE_CLKPEN_DEFAULT (_UART_ROUTE_CLKPEN_DEFAULT << 3)
1012 #define _UART_ROUTE_LOCATION_SHIFT 8
1013 #define _UART_ROUTE_LOCATION_MASK 0x700UL
1014 #define _UART_ROUTE_LOCATION_LOC0 0x00000000UL
1015 #define _UART_ROUTE_LOCATION_DEFAULT 0x00000000UL
1016 #define _UART_ROUTE_LOCATION_LOC1 0x00000001UL
1017 #define _UART_ROUTE_LOCATION_LOC2 0x00000002UL
1018 #define _UART_ROUTE_LOCATION_LOC3 0x00000003UL
1019 #define _UART_ROUTE_LOCATION_LOC4 0x00000004UL
1020 #define _UART_ROUTE_LOCATION_LOC5 0x00000005UL
1021 #define UART_ROUTE_LOCATION_LOC0 (_UART_ROUTE_LOCATION_LOC0 << 8)
1022 #define UART_ROUTE_LOCATION_DEFAULT (_UART_ROUTE_LOCATION_DEFAULT << 8)
1023 #define UART_ROUTE_LOCATION_LOC1 (_UART_ROUTE_LOCATION_LOC1 << 8)
1024 #define UART_ROUTE_LOCATION_LOC2 (_UART_ROUTE_LOCATION_LOC2 << 8)
1025 #define UART_ROUTE_LOCATION_LOC3 (_UART_ROUTE_LOCATION_LOC3 << 8)
1026 #define UART_ROUTE_LOCATION_LOC4 (_UART_ROUTE_LOCATION_LOC4 << 8)
1027 #define UART_ROUTE_LOCATION_LOC5 (_UART_ROUTE_LOCATION_LOC5 << 8)
1029 /* Bit fields for UART INPUT */
1030 #define _UART_INPUT_RESETVALUE 0x00000000UL
1031 #define _UART_INPUT_MASK 0x0000001FUL
1032 #define _UART_INPUT_RXPRSSEL_SHIFT 0
1033 #define _UART_INPUT_RXPRSSEL_MASK 0xFUL
1034 #define _UART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL
1035 #define _UART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL
1036 #define _UART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL
1037 #define _UART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL
1038 #define _UART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL
1039 #define _UART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL
1040 #define _UART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL
1041 #define _UART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL
1042 #define _UART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL
1043 #define _UART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL
1044 #define _UART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL
1045 #define _UART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL
1046 #define _UART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL
1047 #define UART_INPUT_RXPRSSEL_DEFAULT (_UART_INPUT_RXPRSSEL_DEFAULT << 0)
1048 #define UART_INPUT_RXPRSSEL_PRSCH0 (_UART_INPUT_RXPRSSEL_PRSCH0 << 0)
1049 #define UART_INPUT_RXPRSSEL_PRSCH1 (_UART_INPUT_RXPRSSEL_PRSCH1 << 0)
1050 #define UART_INPUT_RXPRSSEL_PRSCH2 (_UART_INPUT_RXPRSSEL_PRSCH2 << 0)
1051 #define UART_INPUT_RXPRSSEL_PRSCH3 (_UART_INPUT_RXPRSSEL_PRSCH3 << 0)
1052 #define UART_INPUT_RXPRSSEL_PRSCH4 (_UART_INPUT_RXPRSSEL_PRSCH4 << 0)
1053 #define UART_INPUT_RXPRSSEL_PRSCH5 (_UART_INPUT_RXPRSSEL_PRSCH5 << 0)
1054 #define UART_INPUT_RXPRSSEL_PRSCH6 (_UART_INPUT_RXPRSSEL_PRSCH6 << 0)
1055 #define UART_INPUT_RXPRSSEL_PRSCH7 (_UART_INPUT_RXPRSSEL_PRSCH7 << 0)
1056 #define UART_INPUT_RXPRSSEL_PRSCH8 (_UART_INPUT_RXPRSSEL_PRSCH8 << 0)
1057 #define UART_INPUT_RXPRSSEL_PRSCH9 (_UART_INPUT_RXPRSSEL_PRSCH9 << 0)
1058 #define UART_INPUT_RXPRSSEL_PRSCH10 (_UART_INPUT_RXPRSSEL_PRSCH10 << 0)
1059 #define UART_INPUT_RXPRSSEL_PRSCH11 (_UART_INPUT_RXPRSSEL_PRSCH11 << 0)
1060 #define UART_INPUT_RXPRS (0x1UL << 4)
1061 #define _UART_INPUT_RXPRS_SHIFT 4
1062 #define _UART_INPUT_RXPRS_MASK 0x10UL
1063 #define _UART_INPUT_RXPRS_DEFAULT 0x00000000UL
1064 #define UART_INPUT_RXPRS_DEFAULT (_UART_INPUT_RXPRS_DEFAULT << 4)
1066 /* Bit fields for UART I2SCTRL */
1067 #define _UART_I2SCTRL_RESETVALUE 0x00000000UL
1068 #define _UART_I2SCTRL_MASK 0x0000071FUL
1069 #define UART_I2SCTRL_EN (0x1UL << 0)
1070 #define _UART_I2SCTRL_EN_SHIFT 0
1071 #define _UART_I2SCTRL_EN_MASK 0x1UL
1072 #define _UART_I2SCTRL_EN_DEFAULT 0x00000000UL
1073 #define UART_I2SCTRL_EN_DEFAULT (_UART_I2SCTRL_EN_DEFAULT << 0)
1074 #define UART_I2SCTRL_MONO (0x1UL << 1)
1075 #define _UART_I2SCTRL_MONO_SHIFT 1
1076 #define _UART_I2SCTRL_MONO_MASK 0x2UL
1077 #define _UART_I2SCTRL_MONO_DEFAULT 0x00000000UL
1078 #define UART_I2SCTRL_MONO_DEFAULT (_UART_I2SCTRL_MONO_DEFAULT << 1)
1079 #define UART_I2SCTRL_JUSTIFY (0x1UL << 2)
1080 #define _UART_I2SCTRL_JUSTIFY_SHIFT 2
1081 #define _UART_I2SCTRL_JUSTIFY_MASK 0x4UL
1082 #define _UART_I2SCTRL_JUSTIFY_DEFAULT 0x00000000UL
1083 #define _UART_I2SCTRL_JUSTIFY_LEFT 0x00000000UL
1084 #define _UART_I2SCTRL_JUSTIFY_RIGHT 0x00000001UL
1085 #define UART_I2SCTRL_JUSTIFY_DEFAULT (_UART_I2SCTRL_JUSTIFY_DEFAULT << 2)
1086 #define UART_I2SCTRL_JUSTIFY_LEFT (_UART_I2SCTRL_JUSTIFY_LEFT << 2)
1087 #define UART_I2SCTRL_JUSTIFY_RIGHT (_UART_I2SCTRL_JUSTIFY_RIGHT << 2)
1088 #define UART_I2SCTRL_DMASPLIT (0x1UL << 3)
1089 #define _UART_I2SCTRL_DMASPLIT_SHIFT 3
1090 #define _UART_I2SCTRL_DMASPLIT_MASK 0x8UL
1091 #define _UART_I2SCTRL_DMASPLIT_DEFAULT 0x00000000UL
1092 #define UART_I2SCTRL_DMASPLIT_DEFAULT (_UART_I2SCTRL_DMASPLIT_DEFAULT << 3)
1093 #define UART_I2SCTRL_DELAY (0x1UL << 4)
1094 #define _UART_I2SCTRL_DELAY_SHIFT 4
1095 #define _UART_I2SCTRL_DELAY_MASK 0x10UL
1096 #define _UART_I2SCTRL_DELAY_DEFAULT 0x00000000UL
1097 #define UART_I2SCTRL_DELAY_DEFAULT (_UART_I2SCTRL_DELAY_DEFAULT << 4)
1098 #define _UART_I2SCTRL_FORMAT_SHIFT 8
1099 #define _UART_I2SCTRL_FORMAT_MASK 0x700UL
1100 #define _UART_I2SCTRL_FORMAT_DEFAULT 0x00000000UL
1101 #define _UART_I2SCTRL_FORMAT_W32D32 0x00000000UL
1102 #define _UART_I2SCTRL_FORMAT_W32D24M 0x00000001UL
1103 #define _UART_I2SCTRL_FORMAT_W32D24 0x00000002UL
1104 #define _UART_I2SCTRL_FORMAT_W32D16 0x00000003UL
1105 #define _UART_I2SCTRL_FORMAT_W32D8 0x00000004UL
1106 #define _UART_I2SCTRL_FORMAT_W16D16 0x00000005UL
1107 #define _UART_I2SCTRL_FORMAT_W16D8 0x00000006UL
1108 #define _UART_I2SCTRL_FORMAT_W8D8 0x00000007UL
1109 #define UART_I2SCTRL_FORMAT_DEFAULT (_UART_I2SCTRL_FORMAT_DEFAULT << 8)
1110 #define UART_I2SCTRL_FORMAT_W32D32 (_UART_I2SCTRL_FORMAT_W32D32 << 8)
1111 #define UART_I2SCTRL_FORMAT_W32D24M (_UART_I2SCTRL_FORMAT_W32D24M << 8)
1112 #define UART_I2SCTRL_FORMAT_W32D24 (_UART_I2SCTRL_FORMAT_W32D24 << 8)
1113 #define UART_I2SCTRL_FORMAT_W32D16 (_UART_I2SCTRL_FORMAT_W32D16 << 8)
1114 #define UART_I2SCTRL_FORMAT_W32D8 (_UART_I2SCTRL_FORMAT_W32D8 << 8)
1115 #define UART_I2SCTRL_FORMAT_W16D16 (_UART_I2SCTRL_FORMAT_W16D16 << 8)
1116 #define UART_I2SCTRL_FORMAT_W16D8 (_UART_I2SCTRL_FORMAT_W16D8 << 8)
1117 #define UART_I2SCTRL_FORMAT_W8D8 (_UART_I2SCTRL_FORMAT_W8D8 << 8)