EFM32 Giant Gecko Software Documentation  efm32gg-doc-5.1.2
efm32gg_dmareq.h
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32 /**************************************************************************/
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41 #define DMAREQ_ADC0_SINGLE ((8 << 16) + 0)
42 #define DMAREQ_ADC0_SCAN ((8 << 16) + 1)
43 #define DMAREQ_DAC0_CH0 ((10 << 16) + 0)
44 #define DMAREQ_DAC0_CH1 ((10 << 16) + 1)
45 #define DMAREQ_USART0_RXDATAV ((12 << 16) + 0)
46 #define DMAREQ_USART0_TXBL ((12 << 16) + 1)
47 #define DMAREQ_USART0_TXEMPTY ((12 << 16) + 2)
48 #define DMAREQ_USART1_RXDATAV ((13 << 16) + 0)
49 #define DMAREQ_USART1_TXBL ((13 << 16) + 1)
50 #define DMAREQ_USART1_TXEMPTY ((13 << 16) + 2)
51 #define DMAREQ_USART1_RXDATAVRIGHT ((13 << 16) + 3)
52 #define DMAREQ_USART1_TXBLRIGHT ((13 << 16) + 4)
53 #define DMAREQ_USART2_RXDATAV ((14 << 16) + 0)
54 #define DMAREQ_USART2_TXBL ((14 << 16) + 1)
55 #define DMAREQ_USART2_TXEMPTY ((14 << 16) + 2)
56 #define DMAREQ_USART2_RXDATAVRIGHT ((14 << 16) + 3)
57 #define DMAREQ_USART2_TXBLRIGHT ((14 << 16) + 4)
58 #define DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0)
59 #define DMAREQ_LEUART0_TXBL ((16 << 16) + 1)
60 #define DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2)
61 #define DMAREQ_LEUART1_RXDATAV ((17 << 16) + 0)
62 #define DMAREQ_LEUART1_TXBL ((17 << 16) + 1)
63 #define DMAREQ_LEUART1_TXEMPTY ((17 << 16) + 2)
64 #define DMAREQ_I2C0_RXDATAV ((20 << 16) + 0)
65 #define DMAREQ_I2C0_TXBL ((20 << 16) + 1)
66 #define DMAREQ_I2C1_RXDATAV ((21 << 16) + 0)
67 #define DMAREQ_I2C1_TXBL ((21 << 16) + 1)
68 #define DMAREQ_TIMER0_UFOF ((24 << 16) + 0)
69 #define DMAREQ_TIMER0_CC0 ((24 << 16) + 1)
70 #define DMAREQ_TIMER0_CC1 ((24 << 16) + 2)
71 #define DMAREQ_TIMER0_CC2 ((24 << 16) + 3)
72 #define DMAREQ_TIMER1_UFOF ((25 << 16) + 0)
73 #define DMAREQ_TIMER1_CC0 ((25 << 16) + 1)
74 #define DMAREQ_TIMER1_CC1 ((25 << 16) + 2)
75 #define DMAREQ_TIMER1_CC2 ((25 << 16) + 3)
76 #define DMAREQ_TIMER2_UFOF ((26 << 16) + 0)
77 #define DMAREQ_TIMER2_CC0 ((26 << 16) + 1)
78 #define DMAREQ_TIMER2_CC1 ((26 << 16) + 2)
79 #define DMAREQ_TIMER2_CC2 ((26 << 16) + 3)
80 #define DMAREQ_TIMER3_UFOF ((27 << 16) + 0)
81 #define DMAREQ_TIMER3_CC0 ((27 << 16) + 1)
82 #define DMAREQ_TIMER3_CC1 ((27 << 16) + 2)
83 #define DMAREQ_TIMER3_CC2 ((27 << 16) + 3)
84 #define DMAREQ_UART0_RXDATAV ((44 << 16) + 0)
85 #define DMAREQ_UART0_TXBL ((44 << 16) + 1)
86 #define DMAREQ_UART0_TXEMPTY ((44 << 16) + 2)
87 #define DMAREQ_UART1_RXDATAV ((45 << 16) + 0)
88 #define DMAREQ_UART1_TXBL ((45 << 16) + 1)
89 #define DMAREQ_UART1_TXEMPTY ((45 << 16) + 2)
90 #define DMAREQ_MSC_WDATA ((48 << 16) + 0)
91 #define DMAREQ_AES_DATAWR ((49 << 16) + 0)
92 #define DMAREQ_AES_XORDATAWR ((49 << 16) + 1)
93 #define DMAREQ_AES_DATARD ((49 << 16) + 2)
94 #define DMAREQ_AES_KEYWR ((49 << 16) + 3)
95 #define DMAREQ_LESENSE_BUFDATAV ((50 << 16) + 0)
96 #define DMAREQ_EBI_PXL0EMPTY ((51 << 16) + 0)
97 #define DMAREQ_EBI_PXL1EMPTY ((51 << 16) + 1)
98 #define DMAREQ_EBI_PXLFULL ((51 << 16) + 2)
99 #define DMAREQ_EBI_DDEMPTY ((51 << 16) + 3)