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efm32g_uart.h
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1
/**************************************************************************/
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/**************************************************************************/
37
/**************************************************************************/
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/* Bit fields for UART CTRL */
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#define _UART_CTRL_RESETVALUE 0x00000000UL
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#define _UART_CTRL_MASK 0x1DFFFF7FUL
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#define UART_CTRL_SYNC (0x1UL << 0)
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#define _UART_CTRL_SYNC_SHIFT 0
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#define _UART_CTRL_SYNC_MASK 0x1UL
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#define _UART_CTRL_SYNC_DEFAULT 0x00000000UL
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#define UART_CTRL_SYNC_DEFAULT (_UART_CTRL_SYNC_DEFAULT << 0)
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#define UART_CTRL_LOOPBK (0x1UL << 1)
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#define _UART_CTRL_LOOPBK_SHIFT 1
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#define _UART_CTRL_LOOPBK_MASK 0x2UL
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#define _UART_CTRL_LOOPBK_DEFAULT 0x00000000UL
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#define UART_CTRL_LOOPBK_DEFAULT (_UART_CTRL_LOOPBK_DEFAULT << 1)
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#define UART_CTRL_CCEN (0x1UL << 2)
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#define _UART_CTRL_CCEN_SHIFT 2
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#define _UART_CTRL_CCEN_MASK 0x4UL
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#define _UART_CTRL_CCEN_DEFAULT 0x00000000UL
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#define UART_CTRL_CCEN_DEFAULT (_UART_CTRL_CCEN_DEFAULT << 2)
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#define UART_CTRL_MPM (0x1UL << 3)
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#define _UART_CTRL_MPM_SHIFT 3
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#define _UART_CTRL_MPM_MASK 0x8UL
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#define _UART_CTRL_MPM_DEFAULT 0x00000000UL
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#define UART_CTRL_MPM_DEFAULT (_UART_CTRL_MPM_DEFAULT << 3)
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#define UART_CTRL_MPAB (0x1UL << 4)
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#define _UART_CTRL_MPAB_SHIFT 4
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#define _UART_CTRL_MPAB_MASK 0x10UL
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#define _UART_CTRL_MPAB_DEFAULT 0x00000000UL
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#define UART_CTRL_MPAB_DEFAULT (_UART_CTRL_MPAB_DEFAULT << 4)
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#define _UART_CTRL_OVS_SHIFT 5
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#define _UART_CTRL_OVS_MASK 0x60UL
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#define _UART_CTRL_OVS_DEFAULT 0x00000000UL
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#define _UART_CTRL_OVS_X16 0x00000000UL
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#define _UART_CTRL_OVS_X8 0x00000001UL
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#define _UART_CTRL_OVS_X6 0x00000002UL
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#define _UART_CTRL_OVS_X4 0x00000003UL
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#define UART_CTRL_OVS_DEFAULT (_UART_CTRL_OVS_DEFAULT << 5)
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#define UART_CTRL_OVS_X16 (_UART_CTRL_OVS_X16 << 5)
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#define UART_CTRL_OVS_X8 (_UART_CTRL_OVS_X8 << 5)
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#define UART_CTRL_OVS_X6 (_UART_CTRL_OVS_X6 << 5)
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#define UART_CTRL_OVS_X4 (_UART_CTRL_OVS_X4 << 5)
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#define UART_CTRL_CLKPOL (0x1UL << 8)
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#define _UART_CTRL_CLKPOL_SHIFT 8
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#define _UART_CTRL_CLKPOL_MASK 0x100UL
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#define _UART_CTRL_CLKPOL_DEFAULT 0x00000000UL
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#define _UART_CTRL_CLKPOL_IDLELOW 0x00000000UL
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#define _UART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL
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#define UART_CTRL_CLKPOL_DEFAULT (_UART_CTRL_CLKPOL_DEFAULT << 8)
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#define UART_CTRL_CLKPOL_IDLELOW (_UART_CTRL_CLKPOL_IDLELOW << 8)
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#define UART_CTRL_CLKPOL_IDLEHIGH (_UART_CTRL_CLKPOL_IDLEHIGH << 8)
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#define UART_CTRL_CLKPHA (0x1UL << 9)
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#define _UART_CTRL_CLKPHA_SHIFT 9
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#define _UART_CTRL_CLKPHA_MASK 0x200UL
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#define _UART_CTRL_CLKPHA_DEFAULT 0x00000000UL
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#define _UART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL
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#define _UART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL
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#define UART_CTRL_CLKPHA_DEFAULT (_UART_CTRL_CLKPHA_DEFAULT << 9)
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#define UART_CTRL_CLKPHA_SAMPLELEADING (_UART_CTRL_CLKPHA_SAMPLELEADING << 9)
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#define UART_CTRL_CLKPHA_SAMPLETRAILING (_UART_CTRL_CLKPHA_SAMPLETRAILING << 9)
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#define UART_CTRL_MSBF (0x1UL << 10)
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#define _UART_CTRL_MSBF_SHIFT 10
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#define _UART_CTRL_MSBF_MASK 0x400UL
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#define _UART_CTRL_MSBF_DEFAULT 0x00000000UL
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#define UART_CTRL_MSBF_DEFAULT (_UART_CTRL_MSBF_DEFAULT << 10)
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#define UART_CTRL_CSMA (0x1UL << 11)
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#define _UART_CTRL_CSMA_SHIFT 11
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#define _UART_CTRL_CSMA_MASK 0x800UL
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#define _UART_CTRL_CSMA_DEFAULT 0x00000000UL
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#define _UART_CTRL_CSMA_NOACTION 0x00000000UL
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#define _UART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL
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#define UART_CTRL_CSMA_DEFAULT (_UART_CTRL_CSMA_DEFAULT << 11)
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#define UART_CTRL_CSMA_NOACTION (_UART_CTRL_CSMA_NOACTION << 11)
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#define UART_CTRL_CSMA_GOTOSLAVEMODE (_UART_CTRL_CSMA_GOTOSLAVEMODE << 11)
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#define UART_CTRL_TXBIL (0x1UL << 12)
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#define _UART_CTRL_TXBIL_SHIFT 12
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#define _UART_CTRL_TXBIL_MASK 0x1000UL
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#define _UART_CTRL_TXBIL_DEFAULT 0x00000000UL
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#define _UART_CTRL_TXBIL_EMPTY 0x00000000UL
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#define _UART_CTRL_TXBIL_HALFFULL 0x00000001UL
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#define UART_CTRL_TXBIL_DEFAULT (_UART_CTRL_TXBIL_DEFAULT << 12)
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#define UART_CTRL_TXBIL_EMPTY (_UART_CTRL_TXBIL_EMPTY << 12)
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#define UART_CTRL_TXBIL_HALFFULL (_UART_CTRL_TXBIL_HALFFULL << 12)
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#define UART_CTRL_RXINV (0x1UL << 13)
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#define _UART_CTRL_RXINV_SHIFT 13
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#define _UART_CTRL_RXINV_MASK 0x2000UL
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#define _UART_CTRL_RXINV_DEFAULT 0x00000000UL
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#define UART_CTRL_RXINV_DEFAULT (_UART_CTRL_RXINV_DEFAULT << 13)
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#define UART_CTRL_TXINV (0x1UL << 14)
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#define _UART_CTRL_TXINV_SHIFT 14
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#define _UART_CTRL_TXINV_MASK 0x4000UL
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#define _UART_CTRL_TXINV_DEFAULT 0x00000000UL
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#define UART_CTRL_TXINV_DEFAULT (_UART_CTRL_TXINV_DEFAULT << 14)
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#define UART_CTRL_CSINV (0x1UL << 15)
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#define _UART_CTRL_CSINV_SHIFT 15
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#define _UART_CTRL_CSINV_MASK 0x8000UL
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#define _UART_CTRL_CSINV_DEFAULT 0x00000000UL
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#define UART_CTRL_CSINV_DEFAULT (_UART_CTRL_CSINV_DEFAULT << 15)
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#define UART_CTRL_AUTOCS (0x1UL << 16)
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#define _UART_CTRL_AUTOCS_SHIFT 16
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#define _UART_CTRL_AUTOCS_MASK 0x10000UL
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#define _UART_CTRL_AUTOCS_DEFAULT 0x00000000UL
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#define UART_CTRL_AUTOCS_DEFAULT (_UART_CTRL_AUTOCS_DEFAULT << 16)
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#define UART_CTRL_AUTOTRI (0x1UL << 17)
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#define _UART_CTRL_AUTOTRI_SHIFT 17
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#define _UART_CTRL_AUTOTRI_MASK 0x20000UL
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#define _UART_CTRL_AUTOTRI_DEFAULT 0x00000000UL
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#define UART_CTRL_AUTOTRI_DEFAULT (_UART_CTRL_AUTOTRI_DEFAULT << 17)
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#define UART_CTRL_SCMODE (0x1UL << 18)
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#define _UART_CTRL_SCMODE_SHIFT 18
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#define _UART_CTRL_SCMODE_MASK 0x40000UL
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#define _UART_CTRL_SCMODE_DEFAULT 0x00000000UL
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#define UART_CTRL_SCMODE_DEFAULT (_UART_CTRL_SCMODE_DEFAULT << 18)
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#define UART_CTRL_SCRETRANS (0x1UL << 19)
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#define _UART_CTRL_SCRETRANS_SHIFT 19
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#define _UART_CTRL_SCRETRANS_MASK 0x80000UL
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#define _UART_CTRL_SCRETRANS_DEFAULT 0x00000000UL
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#define UART_CTRL_SCRETRANS_DEFAULT (_UART_CTRL_SCRETRANS_DEFAULT << 19)
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#define UART_CTRL_SKIPPERRF (0x1UL << 20)
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#define _UART_CTRL_SKIPPERRF_SHIFT 20
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#define _UART_CTRL_SKIPPERRF_MASK 0x100000UL
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#define _UART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL
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#define UART_CTRL_SKIPPERRF_DEFAULT (_UART_CTRL_SKIPPERRF_DEFAULT << 20)
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#define UART_CTRL_BIT8DV (0x1UL << 21)
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#define _UART_CTRL_BIT8DV_SHIFT 21
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#define _UART_CTRL_BIT8DV_MASK 0x200000UL
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#define _UART_CTRL_BIT8DV_DEFAULT 0x00000000UL
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#define UART_CTRL_BIT8DV_DEFAULT (_UART_CTRL_BIT8DV_DEFAULT << 21)
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#define UART_CTRL_ERRSDMA (0x1UL << 22)
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#define _UART_CTRL_ERRSDMA_SHIFT 22
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#define _UART_CTRL_ERRSDMA_MASK 0x400000UL
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#define _UART_CTRL_ERRSDMA_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSDMA_DEFAULT (_UART_CTRL_ERRSDMA_DEFAULT << 22)
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#define UART_CTRL_ERRSRX (0x1UL << 23)
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#define _UART_CTRL_ERRSRX_SHIFT 23
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#define _UART_CTRL_ERRSRX_MASK 0x800000UL
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#define _UART_CTRL_ERRSRX_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSRX_DEFAULT (_UART_CTRL_ERRSRX_DEFAULT << 23)
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#define UART_CTRL_ERRSTX (0x1UL << 24)
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#define _UART_CTRL_ERRSTX_SHIFT 24
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#define _UART_CTRL_ERRSTX_MASK 0x1000000UL
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#define _UART_CTRL_ERRSTX_DEFAULT 0x00000000UL
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#define UART_CTRL_ERRSTX_DEFAULT (_UART_CTRL_ERRSTX_DEFAULT << 24)
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#define _UART_CTRL_TXDELAY_SHIFT 26
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#define _UART_CTRL_TXDELAY_MASK 0xC000000UL
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#define _UART_CTRL_TXDELAY_DEFAULT 0x00000000UL
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#define _UART_CTRL_TXDELAY_NONE 0x00000000UL
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#define _UART_CTRL_TXDELAY_SINGLE 0x00000001UL
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#define _UART_CTRL_TXDELAY_DOUBLE 0x00000002UL
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#define _UART_CTRL_TXDELAY_TRIPLE 0x00000003UL
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#define UART_CTRL_TXDELAY_DEFAULT (_UART_CTRL_TXDELAY_DEFAULT << 26)
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#define UART_CTRL_TXDELAY_NONE (_UART_CTRL_TXDELAY_NONE << 26)
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#define UART_CTRL_TXDELAY_SINGLE (_UART_CTRL_TXDELAY_SINGLE << 26)
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#define UART_CTRL_TXDELAY_DOUBLE (_UART_CTRL_TXDELAY_DOUBLE << 26)
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#define UART_CTRL_TXDELAY_TRIPLE (_UART_CTRL_TXDELAY_TRIPLE << 26)
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#define UART_CTRL_BYTESWAP (0x1UL << 28)
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#define _UART_CTRL_BYTESWAP_SHIFT 28
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#define _UART_CTRL_BYTESWAP_MASK 0x10000000UL
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#define _UART_CTRL_BYTESWAP_DEFAULT 0x00000000UL
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#define UART_CTRL_BYTESWAP_DEFAULT (_UART_CTRL_BYTESWAP_DEFAULT << 28)
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/* Bit fields for UART FRAME */
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#define _UART_FRAME_RESETVALUE 0x00001005UL
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#define _UART_FRAME_MASK 0x0000330FUL
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#define _UART_FRAME_DATABITS_SHIFT 0
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#define _UART_FRAME_DATABITS_MASK 0xFUL
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#define _UART_FRAME_DATABITS_FOUR 0x00000001UL
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#define _UART_FRAME_DATABITS_FIVE 0x00000002UL
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#define _UART_FRAME_DATABITS_SIX 0x00000003UL
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#define _UART_FRAME_DATABITS_SEVEN 0x00000004UL
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#define _UART_FRAME_DATABITS_DEFAULT 0x00000005UL
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#define _UART_FRAME_DATABITS_EIGHT 0x00000005UL
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#define _UART_FRAME_DATABITS_NINE 0x00000006UL
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#define _UART_FRAME_DATABITS_TEN 0x00000007UL
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#define _UART_FRAME_DATABITS_ELEVEN 0x00000008UL
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#define _UART_FRAME_DATABITS_TWELVE 0x00000009UL
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#define _UART_FRAME_DATABITS_THIRTEEN 0x0000000AUL
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#define _UART_FRAME_DATABITS_FOURTEEN 0x0000000BUL
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#define _UART_FRAME_DATABITS_FIFTEEN 0x0000000CUL
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#define _UART_FRAME_DATABITS_SIXTEEN 0x0000000DUL
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#define UART_FRAME_DATABITS_FOUR (_UART_FRAME_DATABITS_FOUR << 0)
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#define UART_FRAME_DATABITS_FIVE (_UART_FRAME_DATABITS_FIVE << 0)
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#define UART_FRAME_DATABITS_SIX (_UART_FRAME_DATABITS_SIX << 0)
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#define UART_FRAME_DATABITS_SEVEN (_UART_FRAME_DATABITS_SEVEN << 0)
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#define UART_FRAME_DATABITS_DEFAULT (_UART_FRAME_DATABITS_DEFAULT << 0)
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#define UART_FRAME_DATABITS_EIGHT (_UART_FRAME_DATABITS_EIGHT << 0)
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#define UART_FRAME_DATABITS_NINE (_UART_FRAME_DATABITS_NINE << 0)
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#define UART_FRAME_DATABITS_TEN (_UART_FRAME_DATABITS_TEN << 0)
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#define UART_FRAME_DATABITS_ELEVEN (_UART_FRAME_DATABITS_ELEVEN << 0)
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#define UART_FRAME_DATABITS_TWELVE (_UART_FRAME_DATABITS_TWELVE << 0)
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#define UART_FRAME_DATABITS_THIRTEEN (_UART_FRAME_DATABITS_THIRTEEN << 0)
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#define UART_FRAME_DATABITS_FOURTEEN (_UART_FRAME_DATABITS_FOURTEEN << 0)
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#define UART_FRAME_DATABITS_FIFTEEN (_UART_FRAME_DATABITS_FIFTEEN << 0)
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#define UART_FRAME_DATABITS_SIXTEEN (_UART_FRAME_DATABITS_SIXTEEN << 0)
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#define _UART_FRAME_PARITY_SHIFT 8
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#define _UART_FRAME_PARITY_MASK 0x300UL
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#define _UART_FRAME_PARITY_DEFAULT 0x00000000UL
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#define _UART_FRAME_PARITY_NONE 0x00000000UL
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#define _UART_FRAME_PARITY_EVEN 0x00000002UL
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#define _UART_FRAME_PARITY_ODD 0x00000003UL
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#define UART_FRAME_PARITY_DEFAULT (_UART_FRAME_PARITY_DEFAULT << 8)
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#define UART_FRAME_PARITY_NONE (_UART_FRAME_PARITY_NONE << 8)
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#define UART_FRAME_PARITY_EVEN (_UART_FRAME_PARITY_EVEN << 8)
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#define UART_FRAME_PARITY_ODD (_UART_FRAME_PARITY_ODD << 8)
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#define _UART_FRAME_STOPBITS_SHIFT 12
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#define _UART_FRAME_STOPBITS_MASK 0x3000UL
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#define _UART_FRAME_STOPBITS_HALF 0x00000000UL
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#define _UART_FRAME_STOPBITS_DEFAULT 0x00000001UL
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#define _UART_FRAME_STOPBITS_ONE 0x00000001UL
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#define _UART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL
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#define _UART_FRAME_STOPBITS_TWO 0x00000003UL
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#define UART_FRAME_STOPBITS_HALF (_UART_FRAME_STOPBITS_HALF << 12)
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#define UART_FRAME_STOPBITS_DEFAULT (_UART_FRAME_STOPBITS_DEFAULT << 12)
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#define UART_FRAME_STOPBITS_ONE (_UART_FRAME_STOPBITS_ONE << 12)
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#define UART_FRAME_STOPBITS_ONEANDAHALF (_UART_FRAME_STOPBITS_ONEANDAHALF << 12)
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#define UART_FRAME_STOPBITS_TWO (_UART_FRAME_STOPBITS_TWO << 12)
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/* Bit fields for UART TRIGCTRL */
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#define _UART_TRIGCTRL_RESETVALUE 0x00000000UL
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#define _UART_TRIGCTRL_MASK 0x00000037UL
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#define _UART_TRIGCTRL_TSEL_SHIFT 0
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#define _UART_TRIGCTRL_TSEL_MASK 0x7UL
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#define _UART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL
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#define _UART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL
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#define _UART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL
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#define _UART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL
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#define _UART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL
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#define _UART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL
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#define _UART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL
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#define _UART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL
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#define _UART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL
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#define UART_TRIGCTRL_TSEL_DEFAULT (_UART_TRIGCTRL_TSEL_DEFAULT << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH0 (_UART_TRIGCTRL_TSEL_PRSCH0 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH1 (_UART_TRIGCTRL_TSEL_PRSCH1 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH2 (_UART_TRIGCTRL_TSEL_PRSCH2 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH3 (_UART_TRIGCTRL_TSEL_PRSCH3 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH4 (_UART_TRIGCTRL_TSEL_PRSCH4 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH5 (_UART_TRIGCTRL_TSEL_PRSCH5 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH6 (_UART_TRIGCTRL_TSEL_PRSCH6 << 0)
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#define UART_TRIGCTRL_TSEL_PRSCH7 (_UART_TRIGCTRL_TSEL_PRSCH7 << 0)
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#define UART_TRIGCTRL_RXTEN (0x1UL << 4)
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#define _UART_TRIGCTRL_RXTEN_SHIFT 4
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#define _UART_TRIGCTRL_RXTEN_MASK 0x10UL
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#define _UART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL
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#define UART_TRIGCTRL_RXTEN_DEFAULT (_UART_TRIGCTRL_RXTEN_DEFAULT << 4)
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#define UART_TRIGCTRL_TXTEN (0x1UL << 5)
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#define _UART_TRIGCTRL_TXTEN_SHIFT 5
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#define _UART_TRIGCTRL_TXTEN_MASK 0x20UL
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#define _UART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL
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#define UART_TRIGCTRL_TXTEN_DEFAULT (_UART_TRIGCTRL_TXTEN_DEFAULT << 5)
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/* Bit fields for UART CMD */
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#define _UART_CMD_RESETVALUE 0x00000000UL
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#define _UART_CMD_MASK 0x00000FFFUL
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#define UART_CMD_RXEN (0x1UL << 0)
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#define _UART_CMD_RXEN_SHIFT 0
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#define _UART_CMD_RXEN_MASK 0x1UL
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#define _UART_CMD_RXEN_DEFAULT 0x00000000UL
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#define UART_CMD_RXEN_DEFAULT (_UART_CMD_RXEN_DEFAULT << 0)
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#define UART_CMD_RXDIS (0x1UL << 1)
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#define _UART_CMD_RXDIS_SHIFT 1
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#define _UART_CMD_RXDIS_MASK 0x2UL
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#define _UART_CMD_RXDIS_DEFAULT 0x00000000UL
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#define UART_CMD_RXDIS_DEFAULT (_UART_CMD_RXDIS_DEFAULT << 1)
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#define UART_CMD_TXEN (0x1UL << 2)
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#define _UART_CMD_TXEN_SHIFT 2
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#define _UART_CMD_TXEN_MASK 0x4UL
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#define _UART_CMD_TXEN_DEFAULT 0x00000000UL
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#define UART_CMD_TXEN_DEFAULT (_UART_CMD_TXEN_DEFAULT << 2)
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#define UART_CMD_TXDIS (0x1UL << 3)
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#define _UART_CMD_TXDIS_SHIFT 3
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#define _UART_CMD_TXDIS_MASK 0x8UL
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#define _UART_CMD_TXDIS_DEFAULT 0x00000000UL
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#define UART_CMD_TXDIS_DEFAULT (_UART_CMD_TXDIS_DEFAULT << 3)
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#define UART_CMD_MASTEREN (0x1UL << 4)
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#define _UART_CMD_MASTEREN_SHIFT 4
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#define _UART_CMD_MASTEREN_MASK 0x10UL
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#define _UART_CMD_MASTEREN_DEFAULT 0x00000000UL
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#define UART_CMD_MASTEREN_DEFAULT (_UART_CMD_MASTEREN_DEFAULT << 4)
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#define UART_CMD_MASTERDIS (0x1UL << 5)
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#define _UART_CMD_MASTERDIS_SHIFT 5
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#define _UART_CMD_MASTERDIS_MASK 0x20UL
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#define _UART_CMD_MASTERDIS_DEFAULT 0x00000000UL
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#define UART_CMD_MASTERDIS_DEFAULT (_UART_CMD_MASTERDIS_DEFAULT << 5)
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#define UART_CMD_RXBLOCKEN (0x1UL << 6)
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#define _UART_CMD_RXBLOCKEN_SHIFT 6
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#define _UART_CMD_RXBLOCKEN_MASK 0x40UL
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#define _UART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL
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#define UART_CMD_RXBLOCKEN_DEFAULT (_UART_CMD_RXBLOCKEN_DEFAULT << 6)
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#define UART_CMD_RXBLOCKDIS (0x1UL << 7)
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#define _UART_CMD_RXBLOCKDIS_SHIFT 7
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#define _UART_CMD_RXBLOCKDIS_MASK 0x80UL
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#define _UART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL
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#define UART_CMD_RXBLOCKDIS_DEFAULT (_UART_CMD_RXBLOCKDIS_DEFAULT << 7)
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#define UART_CMD_TXTRIEN (0x1UL << 8)
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#define _UART_CMD_TXTRIEN_SHIFT 8
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#define _UART_CMD_TXTRIEN_MASK 0x100UL
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#define _UART_CMD_TXTRIEN_DEFAULT 0x00000000UL
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#define UART_CMD_TXTRIEN_DEFAULT (_UART_CMD_TXTRIEN_DEFAULT << 8)
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#define UART_CMD_TXTRIDIS (0x1UL << 9)
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#define _UART_CMD_TXTRIDIS_SHIFT 9
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#define _UART_CMD_TXTRIDIS_MASK 0x200UL
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#define _UART_CMD_TXTRIDIS_DEFAULT 0x00000000UL
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#define UART_CMD_TXTRIDIS_DEFAULT (_UART_CMD_TXTRIDIS_DEFAULT << 9)
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#define UART_CMD_CLEARTX (0x1UL << 10)
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#define _UART_CMD_CLEARTX_SHIFT 10
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#define _UART_CMD_CLEARTX_MASK 0x400UL
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#define _UART_CMD_CLEARTX_DEFAULT 0x00000000UL
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#define UART_CMD_CLEARTX_DEFAULT (_UART_CMD_CLEARTX_DEFAULT << 10)
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#define UART_CMD_CLEARRX (0x1UL << 11)
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#define _UART_CMD_CLEARRX_SHIFT 11
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#define _UART_CMD_CLEARRX_MASK 0x800UL
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#define _UART_CMD_CLEARRX_DEFAULT 0x00000000UL
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#define UART_CMD_CLEARRX_DEFAULT (_UART_CMD_CLEARRX_DEFAULT << 11)
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/* Bit fields for UART STATUS */
356
#define _UART_STATUS_RESETVALUE 0x00000040UL
357
#define _UART_STATUS_MASK 0x000001FFUL
358
#define UART_STATUS_RXENS (0x1UL << 0)
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#define _UART_STATUS_RXENS_SHIFT 0
360
#define _UART_STATUS_RXENS_MASK 0x1UL
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#define _UART_STATUS_RXENS_DEFAULT 0x00000000UL
362
#define UART_STATUS_RXENS_DEFAULT (_UART_STATUS_RXENS_DEFAULT << 0)
363
#define UART_STATUS_TXENS (0x1UL << 1)
364
#define _UART_STATUS_TXENS_SHIFT 1
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#define _UART_STATUS_TXENS_MASK 0x2UL
366
#define _UART_STATUS_TXENS_DEFAULT 0x00000000UL
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#define UART_STATUS_TXENS_DEFAULT (_UART_STATUS_TXENS_DEFAULT << 1)
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#define UART_STATUS_MASTER (0x1UL << 2)
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#define _UART_STATUS_MASTER_SHIFT 2
370
#define _UART_STATUS_MASTER_MASK 0x4UL
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#define _UART_STATUS_MASTER_DEFAULT 0x00000000UL
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#define UART_STATUS_MASTER_DEFAULT (_UART_STATUS_MASTER_DEFAULT << 2)
373
#define UART_STATUS_RXBLOCK (0x1UL << 3)
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#define _UART_STATUS_RXBLOCK_SHIFT 3
375
#define _UART_STATUS_RXBLOCK_MASK 0x8UL
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#define _UART_STATUS_RXBLOCK_DEFAULT 0x00000000UL
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#define UART_STATUS_RXBLOCK_DEFAULT (_UART_STATUS_RXBLOCK_DEFAULT << 3)
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#define UART_STATUS_TXTRI (0x1UL << 4)
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#define _UART_STATUS_TXTRI_SHIFT 4
380
#define _UART_STATUS_TXTRI_MASK 0x10UL
381
#define _UART_STATUS_TXTRI_DEFAULT 0x00000000UL
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#define UART_STATUS_TXTRI_DEFAULT (_UART_STATUS_TXTRI_DEFAULT << 4)
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#define UART_STATUS_TXC (0x1UL << 5)
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#define _UART_STATUS_TXC_SHIFT 5
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#define _UART_STATUS_TXC_MASK 0x20UL
386
#define _UART_STATUS_TXC_DEFAULT 0x00000000UL
387
#define UART_STATUS_TXC_DEFAULT (_UART_STATUS_TXC_DEFAULT << 5)
388
#define UART_STATUS_TXBL (0x1UL << 6)
389
#define _UART_STATUS_TXBL_SHIFT 6
390
#define _UART_STATUS_TXBL_MASK 0x40UL
391
#define _UART_STATUS_TXBL_DEFAULT 0x00000001UL
392
#define UART_STATUS_TXBL_DEFAULT (_UART_STATUS_TXBL_DEFAULT << 6)
393
#define UART_STATUS_RXDATAV (0x1UL << 7)
394
#define _UART_STATUS_RXDATAV_SHIFT 7
395
#define _UART_STATUS_RXDATAV_MASK 0x80UL
396
#define _UART_STATUS_RXDATAV_DEFAULT 0x00000000UL
397
#define UART_STATUS_RXDATAV_DEFAULT (_UART_STATUS_RXDATAV_DEFAULT << 7)
398
#define UART_STATUS_RXFULL (0x1UL << 8)
399
#define _UART_STATUS_RXFULL_SHIFT 8
400
#define _UART_STATUS_RXFULL_MASK 0x100UL
401
#define _UART_STATUS_RXFULL_DEFAULT 0x00000000UL
402
#define UART_STATUS_RXFULL_DEFAULT (_UART_STATUS_RXFULL_DEFAULT << 8)
404
/* Bit fields for UART CLKDIV */
405
#define _UART_CLKDIV_RESETVALUE 0x00000000UL
406
#define _UART_CLKDIV_MASK 0x001FFFC0UL
407
#define _UART_CLKDIV_DIV_SHIFT 6
408
#define _UART_CLKDIV_DIV_MASK 0x1FFFC0UL
409
#define _UART_CLKDIV_DIV_DEFAULT 0x00000000UL
410
#define UART_CLKDIV_DIV_DEFAULT (_UART_CLKDIV_DIV_DEFAULT << 6)
412
/* Bit fields for UART RXDATAX */
413
#define _UART_RXDATAX_RESETVALUE 0x00000000UL
414
#define _UART_RXDATAX_MASK 0x0000C1FFUL
415
#define _UART_RXDATAX_RXDATA_SHIFT 0
416
#define _UART_RXDATAX_RXDATA_MASK 0x1FFUL
417
#define _UART_RXDATAX_RXDATA_DEFAULT 0x00000000UL
418
#define UART_RXDATAX_RXDATA_DEFAULT (_UART_RXDATAX_RXDATA_DEFAULT << 0)
419
#define UART_RXDATAX_PERR (0x1UL << 14)
420
#define _UART_RXDATAX_PERR_SHIFT 14
421
#define _UART_RXDATAX_PERR_MASK 0x4000UL
422
#define _UART_RXDATAX_PERR_DEFAULT 0x00000000UL
423
#define UART_RXDATAX_PERR_DEFAULT (_UART_RXDATAX_PERR_DEFAULT << 14)
424
#define UART_RXDATAX_FERR (0x1UL << 15)
425
#define _UART_RXDATAX_FERR_SHIFT 15
426
#define _UART_RXDATAX_FERR_MASK 0x8000UL
427
#define _UART_RXDATAX_FERR_DEFAULT 0x00000000UL
428
#define UART_RXDATAX_FERR_DEFAULT (_UART_RXDATAX_FERR_DEFAULT << 15)
430
/* Bit fields for UART RXDATA */
431
#define _UART_RXDATA_RESETVALUE 0x00000000UL
432
#define _UART_RXDATA_MASK 0x000000FFUL
433
#define _UART_RXDATA_RXDATA_SHIFT 0
434
#define _UART_RXDATA_RXDATA_MASK 0xFFUL
435
#define _UART_RXDATA_RXDATA_DEFAULT 0x00000000UL
436
#define UART_RXDATA_RXDATA_DEFAULT (_UART_RXDATA_RXDATA_DEFAULT << 0)
438
/* Bit fields for UART RXDOUBLEX */
439
#define _UART_RXDOUBLEX_RESETVALUE 0x00000000UL
440
#define _UART_RXDOUBLEX_MASK 0xC1FFC1FFUL
441
#define _UART_RXDOUBLEX_RXDATA0_SHIFT 0
442
#define _UART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL
443
#define _UART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL
444
#define UART_RXDOUBLEX_RXDATA0_DEFAULT (_UART_RXDOUBLEX_RXDATA0_DEFAULT << 0)
445
#define UART_RXDOUBLEX_PERR0 (0x1UL << 14)
446
#define _UART_RXDOUBLEX_PERR0_SHIFT 14
447
#define _UART_RXDOUBLEX_PERR0_MASK 0x4000UL
448
#define _UART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL
449
#define UART_RXDOUBLEX_PERR0_DEFAULT (_UART_RXDOUBLEX_PERR0_DEFAULT << 14)
450
#define UART_RXDOUBLEX_FERR0 (0x1UL << 15)
451
#define _UART_RXDOUBLEX_FERR0_SHIFT 15
452
#define _UART_RXDOUBLEX_FERR0_MASK 0x8000UL
453
#define _UART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL
454
#define UART_RXDOUBLEX_FERR0_DEFAULT (_UART_RXDOUBLEX_FERR0_DEFAULT << 15)
455
#define _UART_RXDOUBLEX_RXDATA1_SHIFT 16
456
#define _UART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL
457
#define _UART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL
458
#define UART_RXDOUBLEX_RXDATA1_DEFAULT (_UART_RXDOUBLEX_RXDATA1_DEFAULT << 16)
459
#define UART_RXDOUBLEX_PERR1 (0x1UL << 30)
460
#define _UART_RXDOUBLEX_PERR1_SHIFT 30
461
#define _UART_RXDOUBLEX_PERR1_MASK 0x40000000UL
462
#define _UART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL
463
#define UART_RXDOUBLEX_PERR1_DEFAULT (_UART_RXDOUBLEX_PERR1_DEFAULT << 30)
464
#define UART_RXDOUBLEX_FERR1 (0x1UL << 31)
465
#define _UART_RXDOUBLEX_FERR1_SHIFT 31
466
#define _UART_RXDOUBLEX_FERR1_MASK 0x80000000UL
467
#define _UART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL
468
#define UART_RXDOUBLEX_FERR1_DEFAULT (_UART_RXDOUBLEX_FERR1_DEFAULT << 31)
470
/* Bit fields for UART RXDOUBLE */
471
#define _UART_RXDOUBLE_RESETVALUE 0x00000000UL
472
#define _UART_RXDOUBLE_MASK 0x0000FFFFUL
473
#define _UART_RXDOUBLE_RXDATA0_SHIFT 0
474
#define _UART_RXDOUBLE_RXDATA0_MASK 0xFFUL
475
#define _UART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL
476
#define UART_RXDOUBLE_RXDATA0_DEFAULT (_UART_RXDOUBLE_RXDATA0_DEFAULT << 0)
477
#define _UART_RXDOUBLE_RXDATA1_SHIFT 8
478
#define _UART_RXDOUBLE_RXDATA1_MASK 0xFF00UL
479
#define _UART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL
480
#define UART_RXDOUBLE_RXDATA1_DEFAULT (_UART_RXDOUBLE_RXDATA1_DEFAULT << 8)
482
/* Bit fields for UART RXDATAXP */
483
#define _UART_RXDATAXP_RESETVALUE 0x00000000UL
484
#define _UART_RXDATAXP_MASK 0x0000C1FFUL
485
#define _UART_RXDATAXP_RXDATAP_SHIFT 0
486
#define _UART_RXDATAXP_RXDATAP_MASK 0x1FFUL
487
#define _UART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL
488
#define UART_RXDATAXP_RXDATAP_DEFAULT (_UART_RXDATAXP_RXDATAP_DEFAULT << 0)
489
#define UART_RXDATAXP_PERRP (0x1UL << 14)
490
#define _UART_RXDATAXP_PERRP_SHIFT 14
491
#define _UART_RXDATAXP_PERRP_MASK 0x4000UL
492
#define _UART_RXDATAXP_PERRP_DEFAULT 0x00000000UL
493
#define UART_RXDATAXP_PERRP_DEFAULT (_UART_RXDATAXP_PERRP_DEFAULT << 14)
494
#define UART_RXDATAXP_FERRP (0x1UL << 15)
495
#define _UART_RXDATAXP_FERRP_SHIFT 15
496
#define _UART_RXDATAXP_FERRP_MASK 0x8000UL
497
#define _UART_RXDATAXP_FERRP_DEFAULT 0x00000000UL
498
#define UART_RXDATAXP_FERRP_DEFAULT (_UART_RXDATAXP_FERRP_DEFAULT << 15)
500
/* Bit fields for UART RXDOUBLEXP */
501
#define _UART_RXDOUBLEXP_RESETVALUE 0x00000000UL
502
#define _UART_RXDOUBLEXP_MASK 0xC1FFC1FFUL
503
#define _UART_RXDOUBLEXP_RXDATAP0_SHIFT 0
504
#define _UART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL
505
#define _UART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL
506
#define UART_RXDOUBLEXP_RXDATAP0_DEFAULT (_UART_RXDOUBLEXP_RXDATAP0_DEFAULT << 0)
507
#define UART_RXDOUBLEXP_PERRP0 (0x1UL << 14)
508
#define _UART_RXDOUBLEXP_PERRP0_SHIFT 14
509
#define _UART_RXDOUBLEXP_PERRP0_MASK 0x4000UL
510
#define _UART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL
511
#define UART_RXDOUBLEXP_PERRP0_DEFAULT (_UART_RXDOUBLEXP_PERRP0_DEFAULT << 14)
512
#define UART_RXDOUBLEXP_FERRP0 (0x1UL << 15)
513
#define _UART_RXDOUBLEXP_FERRP0_SHIFT 15
514
#define _UART_RXDOUBLEXP_FERRP0_MASK 0x8000UL
515
#define _UART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL
516
#define UART_RXDOUBLEXP_FERRP0_DEFAULT (_UART_RXDOUBLEXP_FERRP0_DEFAULT << 15)
517
#define _UART_RXDOUBLEXP_RXDATAP1_SHIFT 16
518
#define _UART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL
519
#define _UART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL
520
#define UART_RXDOUBLEXP_RXDATAP1_DEFAULT (_UART_RXDOUBLEXP_RXDATAP1_DEFAULT << 16)
521
#define UART_RXDOUBLEXP_PERRP1 (0x1UL << 30)
522
#define _UART_RXDOUBLEXP_PERRP1_SHIFT 30
523
#define _UART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL
524
#define _UART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL
525
#define UART_RXDOUBLEXP_PERRP1_DEFAULT (_UART_RXDOUBLEXP_PERRP1_DEFAULT << 30)
526
#define UART_RXDOUBLEXP_FERRP1 (0x1UL << 31)
527
#define _UART_RXDOUBLEXP_FERRP1_SHIFT 31
528
#define _UART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL
529
#define _UART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL
530
#define UART_RXDOUBLEXP_FERRP1_DEFAULT (_UART_RXDOUBLEXP_FERRP1_DEFAULT << 31)
532
/* Bit fields for UART TXDATAX */
533
#define _UART_TXDATAX_RESETVALUE 0x00000000UL
534
#define _UART_TXDATAX_MASK 0x0000F9FFUL
535
#define _UART_TXDATAX_TXDATAX_SHIFT 0
536
#define _UART_TXDATAX_TXDATAX_MASK 0x1FFUL
537
#define _UART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL
538
#define UART_TXDATAX_TXDATAX_DEFAULT (_UART_TXDATAX_TXDATAX_DEFAULT << 0)
539
#define UART_TXDATAX_UBRXAT (0x1UL << 11)
540
#define _UART_TXDATAX_UBRXAT_SHIFT 11
541
#define _UART_TXDATAX_UBRXAT_MASK 0x800UL
542
#define _UART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL
543
#define UART_TXDATAX_UBRXAT_DEFAULT (_UART_TXDATAX_UBRXAT_DEFAULT << 11)
544
#define UART_TXDATAX_TXTRIAT (0x1UL << 12)
545
#define _UART_TXDATAX_TXTRIAT_SHIFT 12
546
#define _UART_TXDATAX_TXTRIAT_MASK 0x1000UL
547
#define _UART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL
548
#define UART_TXDATAX_TXTRIAT_DEFAULT (_UART_TXDATAX_TXTRIAT_DEFAULT << 12)
549
#define UART_TXDATAX_TXBREAK (0x1UL << 13)
550
#define _UART_TXDATAX_TXBREAK_SHIFT 13
551
#define _UART_TXDATAX_TXBREAK_MASK 0x2000UL
552
#define _UART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL
553
#define UART_TXDATAX_TXBREAK_DEFAULT (_UART_TXDATAX_TXBREAK_DEFAULT << 13)
554
#define UART_TXDATAX_TXDISAT (0x1UL << 14)
555
#define _UART_TXDATAX_TXDISAT_SHIFT 14
556
#define _UART_TXDATAX_TXDISAT_MASK 0x4000UL
557
#define _UART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL
558
#define UART_TXDATAX_TXDISAT_DEFAULT (_UART_TXDATAX_TXDISAT_DEFAULT << 14)
559
#define UART_TXDATAX_RXENAT (0x1UL << 15)
560
#define _UART_TXDATAX_RXENAT_SHIFT 15
561
#define _UART_TXDATAX_RXENAT_MASK 0x8000UL
562
#define _UART_TXDATAX_RXENAT_DEFAULT 0x00000000UL
563
#define UART_TXDATAX_RXENAT_DEFAULT (_UART_TXDATAX_RXENAT_DEFAULT << 15)
565
/* Bit fields for UART TXDATA */
566
#define _UART_TXDATA_RESETVALUE 0x00000000UL
567
#define _UART_TXDATA_MASK 0x000000FFUL
568
#define _UART_TXDATA_TXDATA_SHIFT 0
569
#define _UART_TXDATA_TXDATA_MASK 0xFFUL
570
#define _UART_TXDATA_TXDATA_DEFAULT 0x00000000UL
571
#define UART_TXDATA_TXDATA_DEFAULT (_UART_TXDATA_TXDATA_DEFAULT << 0)
573
/* Bit fields for UART TXDOUBLEX */
574
#define _UART_TXDOUBLEX_RESETVALUE 0x00000000UL
575
#define _UART_TXDOUBLEX_MASK 0xF9FFF9FFUL
576
#define _UART_TXDOUBLEX_TXDATA0_SHIFT 0
577
#define _UART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL
578
#define _UART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL
579
#define UART_TXDOUBLEX_TXDATA0_DEFAULT (_UART_TXDOUBLEX_TXDATA0_DEFAULT << 0)
580
#define UART_TXDOUBLEX_UBRXAT0 (0x1UL << 11)
581
#define _UART_TXDOUBLEX_UBRXAT0_SHIFT 11
582
#define _UART_TXDOUBLEX_UBRXAT0_MASK 0x800UL
583
#define _UART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL
584
#define UART_TXDOUBLEX_UBRXAT0_DEFAULT (_UART_TXDOUBLEX_UBRXAT0_DEFAULT << 11)
585
#define UART_TXDOUBLEX_TXTRIAT0 (0x1UL << 12)
586
#define _UART_TXDOUBLEX_TXTRIAT0_SHIFT 12
587
#define _UART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL
588
#define _UART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL
589
#define UART_TXDOUBLEX_TXTRIAT0_DEFAULT (_UART_TXDOUBLEX_TXTRIAT0_DEFAULT << 12)
590
#define UART_TXDOUBLEX_TXBREAK0 (0x1UL << 13)
591
#define _UART_TXDOUBLEX_TXBREAK0_SHIFT 13
592
#define _UART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL
593
#define _UART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL
594
#define UART_TXDOUBLEX_TXBREAK0_DEFAULT (_UART_TXDOUBLEX_TXBREAK0_DEFAULT << 13)
595
#define UART_TXDOUBLEX_TXDISAT0 (0x1UL << 14)
596
#define _UART_TXDOUBLEX_TXDISAT0_SHIFT 14
597
#define _UART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL
598
#define _UART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL
599
#define UART_TXDOUBLEX_TXDISAT0_DEFAULT (_UART_TXDOUBLEX_TXDISAT0_DEFAULT << 14)
600
#define UART_TXDOUBLEX_RXENAT0 (0x1UL << 15)
601
#define _UART_TXDOUBLEX_RXENAT0_SHIFT 15
602
#define _UART_TXDOUBLEX_RXENAT0_MASK 0x8000UL
603
#define _UART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL
604
#define UART_TXDOUBLEX_RXENAT0_DEFAULT (_UART_TXDOUBLEX_RXENAT0_DEFAULT << 15)
605
#define _UART_TXDOUBLEX_TXDATA1_SHIFT 16
606
#define _UART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL
607
#define _UART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL
608
#define UART_TXDOUBLEX_TXDATA1_DEFAULT (_UART_TXDOUBLEX_TXDATA1_DEFAULT << 16)
609
#define UART_TXDOUBLEX_UBRXAT1 (0x1UL << 27)
610
#define _UART_TXDOUBLEX_UBRXAT1_SHIFT 27
611
#define _UART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL
612
#define _UART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL
613
#define UART_TXDOUBLEX_UBRXAT1_DEFAULT (_UART_TXDOUBLEX_UBRXAT1_DEFAULT << 27)
614
#define UART_TXDOUBLEX_TXTRIAT1 (0x1UL << 28)
615
#define _UART_TXDOUBLEX_TXTRIAT1_SHIFT 28
616
#define _UART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL
617
#define _UART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL
618
#define UART_TXDOUBLEX_TXTRIAT1_DEFAULT (_UART_TXDOUBLEX_TXTRIAT1_DEFAULT << 28)
619
#define UART_TXDOUBLEX_TXBREAK1 (0x1UL << 29)
620
#define _UART_TXDOUBLEX_TXBREAK1_SHIFT 29
621
#define _UART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL
622
#define _UART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL
623
#define UART_TXDOUBLEX_TXBREAK1_DEFAULT (_UART_TXDOUBLEX_TXBREAK1_DEFAULT << 29)
624
#define UART_TXDOUBLEX_TXDISAT1 (0x1UL << 30)
625
#define _UART_TXDOUBLEX_TXDISAT1_SHIFT 30
626
#define _UART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL
627
#define _UART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL
628
#define UART_TXDOUBLEX_TXDISAT1_DEFAULT (_UART_TXDOUBLEX_TXDISAT1_DEFAULT << 30)
629
#define UART_TXDOUBLEX_RXENAT1 (0x1UL << 31)
630
#define _UART_TXDOUBLEX_RXENAT1_SHIFT 31
631
#define _UART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL
632
#define _UART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL
633
#define UART_TXDOUBLEX_RXENAT1_DEFAULT (_UART_TXDOUBLEX_RXENAT1_DEFAULT << 31)
635
/* Bit fields for UART TXDOUBLE */
636
#define _UART_TXDOUBLE_RESETVALUE 0x00000000UL
637
#define _UART_TXDOUBLE_MASK 0x0000FFFFUL
638
#define _UART_TXDOUBLE_TXDATA0_SHIFT 0
639
#define _UART_TXDOUBLE_TXDATA0_MASK 0xFFUL
640
#define _UART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL
641
#define UART_TXDOUBLE_TXDATA0_DEFAULT (_UART_TXDOUBLE_TXDATA0_DEFAULT << 0)
642
#define _UART_TXDOUBLE_TXDATA1_SHIFT 8
643
#define _UART_TXDOUBLE_TXDATA1_MASK 0xFF00UL
644
#define _UART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL
645
#define UART_TXDOUBLE_TXDATA1_DEFAULT (_UART_TXDOUBLE_TXDATA1_DEFAULT << 8)
647
/* Bit fields for UART IF */
648
#define _UART_IF_RESETVALUE 0x00000002UL
649
#define _UART_IF_MASK 0x00001FFFUL
650
#define UART_IF_TXC (0x1UL << 0)
651
#define _UART_IF_TXC_SHIFT 0
652
#define _UART_IF_TXC_MASK 0x1UL
653
#define _UART_IF_TXC_DEFAULT 0x00000000UL
654
#define UART_IF_TXC_DEFAULT (_UART_IF_TXC_DEFAULT << 0)
655
#define UART_IF_TXBL (0x1UL << 1)
656
#define _UART_IF_TXBL_SHIFT 1
657
#define _UART_IF_TXBL_MASK 0x2UL
658
#define _UART_IF_TXBL_DEFAULT 0x00000001UL
659
#define UART_IF_TXBL_DEFAULT (_UART_IF_TXBL_DEFAULT << 1)
660
#define UART_IF_RXDATAV (0x1UL << 2)
661
#define _UART_IF_RXDATAV_SHIFT 2
662
#define _UART_IF_RXDATAV_MASK 0x4UL
663
#define _UART_IF_RXDATAV_DEFAULT 0x00000000UL
664
#define UART_IF_RXDATAV_DEFAULT (_UART_IF_RXDATAV_DEFAULT << 2)
665
#define UART_IF_RXFULL (0x1UL << 3)
666
#define _UART_IF_RXFULL_SHIFT 3
667
#define _UART_IF_RXFULL_MASK 0x8UL
668
#define _UART_IF_RXFULL_DEFAULT 0x00000000UL
669
#define UART_IF_RXFULL_DEFAULT (_UART_IF_RXFULL_DEFAULT << 3)
670
#define UART_IF_RXOF (0x1UL << 4)
671
#define _UART_IF_RXOF_SHIFT 4
672
#define _UART_IF_RXOF_MASK 0x10UL
673
#define _UART_IF_RXOF_DEFAULT 0x00000000UL
674
#define UART_IF_RXOF_DEFAULT (_UART_IF_RXOF_DEFAULT << 4)
675
#define UART_IF_RXUF (0x1UL << 5)
676
#define _UART_IF_RXUF_SHIFT 5
677
#define _UART_IF_RXUF_MASK 0x20UL
678
#define _UART_IF_RXUF_DEFAULT 0x00000000UL
679
#define UART_IF_RXUF_DEFAULT (_UART_IF_RXUF_DEFAULT << 5)
680
#define UART_IF_TXOF (0x1UL << 6)
681
#define _UART_IF_TXOF_SHIFT 6
682
#define _UART_IF_TXOF_MASK 0x40UL
683
#define _UART_IF_TXOF_DEFAULT 0x00000000UL
684
#define UART_IF_TXOF_DEFAULT (_UART_IF_TXOF_DEFAULT << 6)
685
#define UART_IF_TXUF (0x1UL << 7)
686
#define _UART_IF_TXUF_SHIFT 7
687
#define _UART_IF_TXUF_MASK 0x80UL
688
#define _UART_IF_TXUF_DEFAULT 0x00000000UL
689
#define UART_IF_TXUF_DEFAULT (_UART_IF_TXUF_DEFAULT << 7)
690
#define UART_IF_PERR (0x1UL << 8)
691
#define _UART_IF_PERR_SHIFT 8
692
#define _UART_IF_PERR_MASK 0x100UL
693
#define _UART_IF_PERR_DEFAULT 0x00000000UL
694
#define UART_IF_PERR_DEFAULT (_UART_IF_PERR_DEFAULT << 8)
695
#define UART_IF_FERR (0x1UL << 9)
696
#define _UART_IF_FERR_SHIFT 9
697
#define _UART_IF_FERR_MASK 0x200UL
698
#define _UART_IF_FERR_DEFAULT 0x00000000UL
699
#define UART_IF_FERR_DEFAULT (_UART_IF_FERR_DEFAULT << 9)
700
#define UART_IF_MPAF (0x1UL << 10)
701
#define _UART_IF_MPAF_SHIFT 10
702
#define _UART_IF_MPAF_MASK 0x400UL
703
#define _UART_IF_MPAF_DEFAULT 0x00000000UL
704
#define UART_IF_MPAF_DEFAULT (_UART_IF_MPAF_DEFAULT << 10)
705
#define UART_IF_SSM (0x1UL << 11)
706
#define _UART_IF_SSM_SHIFT 11
707
#define _UART_IF_SSM_MASK 0x800UL
708
#define _UART_IF_SSM_DEFAULT 0x00000000UL
709
#define UART_IF_SSM_DEFAULT (_UART_IF_SSM_DEFAULT << 11)
710
#define UART_IF_CCF (0x1UL << 12)
711
#define _UART_IF_CCF_SHIFT 12
712
#define _UART_IF_CCF_MASK 0x1000UL
713
#define _UART_IF_CCF_DEFAULT 0x00000000UL
714
#define UART_IF_CCF_DEFAULT (_UART_IF_CCF_DEFAULT << 12)
716
/* Bit fields for UART IFS */
717
#define _UART_IFS_RESETVALUE 0x00000000UL
718
#define _UART_IFS_MASK 0x00001FF9UL
719
#define UART_IFS_TXC (0x1UL << 0)
720
#define _UART_IFS_TXC_SHIFT 0
721
#define _UART_IFS_TXC_MASK 0x1UL
722
#define _UART_IFS_TXC_DEFAULT 0x00000000UL
723
#define UART_IFS_TXC_DEFAULT (_UART_IFS_TXC_DEFAULT << 0)
724
#define UART_IFS_RXFULL (0x1UL << 3)
725
#define _UART_IFS_RXFULL_SHIFT 3
726
#define _UART_IFS_RXFULL_MASK 0x8UL
727
#define _UART_IFS_RXFULL_DEFAULT 0x00000000UL
728
#define UART_IFS_RXFULL_DEFAULT (_UART_IFS_RXFULL_DEFAULT << 3)
729
#define UART_IFS_RXOF (0x1UL << 4)
730
#define _UART_IFS_RXOF_SHIFT 4
731
#define _UART_IFS_RXOF_MASK 0x10UL
732
#define _UART_IFS_RXOF_DEFAULT 0x00000000UL
733
#define UART_IFS_RXOF_DEFAULT (_UART_IFS_RXOF_DEFAULT << 4)
734
#define UART_IFS_RXUF (0x1UL << 5)
735
#define _UART_IFS_RXUF_SHIFT 5
736
#define _UART_IFS_RXUF_MASK 0x20UL
737
#define _UART_IFS_RXUF_DEFAULT 0x00000000UL
738
#define UART_IFS_RXUF_DEFAULT (_UART_IFS_RXUF_DEFAULT << 5)
739
#define UART_IFS_TXOF (0x1UL << 6)
740
#define _UART_IFS_TXOF_SHIFT 6
741
#define _UART_IFS_TXOF_MASK 0x40UL
742
#define _UART_IFS_TXOF_DEFAULT 0x00000000UL
743
#define UART_IFS_TXOF_DEFAULT (_UART_IFS_TXOF_DEFAULT << 6)
744
#define UART_IFS_TXUF (0x1UL << 7)
745
#define _UART_IFS_TXUF_SHIFT 7
746
#define _UART_IFS_TXUF_MASK 0x80UL
747
#define _UART_IFS_TXUF_DEFAULT 0x00000000UL
748
#define UART_IFS_TXUF_DEFAULT (_UART_IFS_TXUF_DEFAULT << 7)
749
#define UART_IFS_PERR (0x1UL << 8)
750
#define _UART_IFS_PERR_SHIFT 8
751
#define _UART_IFS_PERR_MASK 0x100UL
752
#define _UART_IFS_PERR_DEFAULT 0x00000000UL
753
#define UART_IFS_PERR_DEFAULT (_UART_IFS_PERR_DEFAULT << 8)
754
#define UART_IFS_FERR (0x1UL << 9)
755
#define _UART_IFS_FERR_SHIFT 9
756
#define _UART_IFS_FERR_MASK 0x200UL
757
#define _UART_IFS_FERR_DEFAULT 0x00000000UL
758
#define UART_IFS_FERR_DEFAULT (_UART_IFS_FERR_DEFAULT << 9)
759
#define UART_IFS_MPAF (0x1UL << 10)
760
#define _UART_IFS_MPAF_SHIFT 10
761
#define _UART_IFS_MPAF_MASK 0x400UL
762
#define _UART_IFS_MPAF_DEFAULT 0x00000000UL
763
#define UART_IFS_MPAF_DEFAULT (_UART_IFS_MPAF_DEFAULT << 10)
764
#define UART_IFS_SSM (0x1UL << 11)
765
#define _UART_IFS_SSM_SHIFT 11
766
#define _UART_IFS_SSM_MASK 0x800UL
767
#define _UART_IFS_SSM_DEFAULT 0x00000000UL
768
#define UART_IFS_SSM_DEFAULT (_UART_IFS_SSM_DEFAULT << 11)
769
#define UART_IFS_CCF (0x1UL << 12)
770
#define _UART_IFS_CCF_SHIFT 12
771
#define _UART_IFS_CCF_MASK 0x1000UL
772
#define _UART_IFS_CCF_DEFAULT 0x00000000UL
773
#define UART_IFS_CCF_DEFAULT (_UART_IFS_CCF_DEFAULT << 12)
775
/* Bit fields for UART IFC */
776
#define _UART_IFC_RESETVALUE 0x00000000UL
777
#define _UART_IFC_MASK 0x00001FF9UL
778
#define UART_IFC_TXC (0x1UL << 0)
779
#define _UART_IFC_TXC_SHIFT 0
780
#define _UART_IFC_TXC_MASK 0x1UL
781
#define _UART_IFC_TXC_DEFAULT 0x00000000UL
782
#define UART_IFC_TXC_DEFAULT (_UART_IFC_TXC_DEFAULT << 0)
783
#define UART_IFC_RXFULL (0x1UL << 3)
784
#define _UART_IFC_RXFULL_SHIFT 3
785
#define _UART_IFC_RXFULL_MASK 0x8UL
786
#define _UART_IFC_RXFULL_DEFAULT 0x00000000UL
787
#define UART_IFC_RXFULL_DEFAULT (_UART_IFC_RXFULL_DEFAULT << 3)
788
#define UART_IFC_RXOF (0x1UL << 4)
789
#define _UART_IFC_RXOF_SHIFT 4
790
#define _UART_IFC_RXOF_MASK 0x10UL
791
#define _UART_IFC_RXOF_DEFAULT 0x00000000UL
792
#define UART_IFC_RXOF_DEFAULT (_UART_IFC_RXOF_DEFAULT << 4)
793
#define UART_IFC_RXUF (0x1UL << 5)
794
#define _UART_IFC_RXUF_SHIFT 5
795
#define _UART_IFC_RXUF_MASK 0x20UL
796
#define _UART_IFC_RXUF_DEFAULT 0x00000000UL
797
#define UART_IFC_RXUF_DEFAULT (_UART_IFC_RXUF_DEFAULT << 5)
798
#define UART_IFC_TXOF (0x1UL << 6)
799
#define _UART_IFC_TXOF_SHIFT 6
800
#define _UART_IFC_TXOF_MASK 0x40UL
801
#define _UART_IFC_TXOF_DEFAULT 0x00000000UL
802
#define UART_IFC_TXOF_DEFAULT (_UART_IFC_TXOF_DEFAULT << 6)
803
#define UART_IFC_TXUF (0x1UL << 7)
804
#define _UART_IFC_TXUF_SHIFT 7
805
#define _UART_IFC_TXUF_MASK 0x80UL
806
#define _UART_IFC_TXUF_DEFAULT 0x00000000UL
807
#define UART_IFC_TXUF_DEFAULT (_UART_IFC_TXUF_DEFAULT << 7)
808
#define UART_IFC_PERR (0x1UL << 8)
809
#define _UART_IFC_PERR_SHIFT 8
810
#define _UART_IFC_PERR_MASK 0x100UL
811
#define _UART_IFC_PERR_DEFAULT 0x00000000UL
812
#define UART_IFC_PERR_DEFAULT (_UART_IFC_PERR_DEFAULT << 8)
813
#define UART_IFC_FERR (0x1UL << 9)
814
#define _UART_IFC_FERR_SHIFT 9
815
#define _UART_IFC_FERR_MASK 0x200UL
816
#define _UART_IFC_FERR_DEFAULT 0x00000000UL
817
#define UART_IFC_FERR_DEFAULT (_UART_IFC_FERR_DEFAULT << 9)
818
#define UART_IFC_MPAF (0x1UL << 10)
819
#define _UART_IFC_MPAF_SHIFT 10
820
#define _UART_IFC_MPAF_MASK 0x400UL
821
#define _UART_IFC_MPAF_DEFAULT 0x00000000UL
822
#define UART_IFC_MPAF_DEFAULT (_UART_IFC_MPAF_DEFAULT << 10)
823
#define UART_IFC_SSM (0x1UL << 11)
824
#define _UART_IFC_SSM_SHIFT 11
825
#define _UART_IFC_SSM_MASK 0x800UL
826
#define _UART_IFC_SSM_DEFAULT 0x00000000UL
827
#define UART_IFC_SSM_DEFAULT (_UART_IFC_SSM_DEFAULT << 11)
828
#define UART_IFC_CCF (0x1UL << 12)
829
#define _UART_IFC_CCF_SHIFT 12
830
#define _UART_IFC_CCF_MASK 0x1000UL
831
#define _UART_IFC_CCF_DEFAULT 0x00000000UL
832
#define UART_IFC_CCF_DEFAULT (_UART_IFC_CCF_DEFAULT << 12)
834
/* Bit fields for UART IEN */
835
#define _UART_IEN_RESETVALUE 0x00000000UL
836
#define _UART_IEN_MASK 0x00001FFFUL
837
#define UART_IEN_TXC (0x1UL << 0)
838
#define _UART_IEN_TXC_SHIFT 0
839
#define _UART_IEN_TXC_MASK 0x1UL
840
#define _UART_IEN_TXC_DEFAULT 0x00000000UL
841
#define UART_IEN_TXC_DEFAULT (_UART_IEN_TXC_DEFAULT << 0)
842
#define UART_IEN_TXBL (0x1UL << 1)
843
#define _UART_IEN_TXBL_SHIFT 1
844
#define _UART_IEN_TXBL_MASK 0x2UL
845
#define _UART_IEN_TXBL_DEFAULT 0x00000000UL
846
#define UART_IEN_TXBL_DEFAULT (_UART_IEN_TXBL_DEFAULT << 1)
847
#define UART_IEN_RXDATAV (0x1UL << 2)
848
#define _UART_IEN_RXDATAV_SHIFT 2
849
#define _UART_IEN_RXDATAV_MASK 0x4UL
850
#define _UART_IEN_RXDATAV_DEFAULT 0x00000000UL
851
#define UART_IEN_RXDATAV_DEFAULT (_UART_IEN_RXDATAV_DEFAULT << 2)
852
#define UART_IEN_RXFULL (0x1UL << 3)
853
#define _UART_IEN_RXFULL_SHIFT 3
854
#define _UART_IEN_RXFULL_MASK 0x8UL
855
#define _UART_IEN_RXFULL_DEFAULT 0x00000000UL
856
#define UART_IEN_RXFULL_DEFAULT (_UART_IEN_RXFULL_DEFAULT << 3)
857
#define UART_IEN_RXOF (0x1UL << 4)
858
#define _UART_IEN_RXOF_SHIFT 4
859
#define _UART_IEN_RXOF_MASK 0x10UL
860
#define _UART_IEN_RXOF_DEFAULT 0x00000000UL
861
#define UART_IEN_RXOF_DEFAULT (_UART_IEN_RXOF_DEFAULT << 4)
862
#define UART_IEN_RXUF (0x1UL << 5)
863
#define _UART_IEN_RXUF_SHIFT 5
864
#define _UART_IEN_RXUF_MASK 0x20UL
865
#define _UART_IEN_RXUF_DEFAULT 0x00000000UL
866
#define UART_IEN_RXUF_DEFAULT (_UART_IEN_RXUF_DEFAULT << 5)
867
#define UART_IEN_TXOF (0x1UL << 6)
868
#define _UART_IEN_TXOF_SHIFT 6
869
#define _UART_IEN_TXOF_MASK 0x40UL
870
#define _UART_IEN_TXOF_DEFAULT 0x00000000UL
871
#define UART_IEN_TXOF_DEFAULT (_UART_IEN_TXOF_DEFAULT << 6)
872
#define UART_IEN_TXUF (0x1UL << 7)
873
#define _UART_IEN_TXUF_SHIFT 7
874
#define _UART_IEN_TXUF_MASK 0x80UL
875
#define _UART_IEN_TXUF_DEFAULT 0x00000000UL
876
#define UART_IEN_TXUF_DEFAULT (_UART_IEN_TXUF_DEFAULT << 7)
877
#define UART_IEN_PERR (0x1UL << 8)
878
#define _UART_IEN_PERR_SHIFT 8
879
#define _UART_IEN_PERR_MASK 0x100UL
880
#define _UART_IEN_PERR_DEFAULT 0x00000000UL
881
#define UART_IEN_PERR_DEFAULT (_UART_IEN_PERR_DEFAULT << 8)
882
#define UART_IEN_FERR (0x1UL << 9)
883
#define _UART_IEN_FERR_SHIFT 9
884
#define _UART_IEN_FERR_MASK 0x200UL
885
#define _UART_IEN_FERR_DEFAULT 0x00000000UL
886
#define UART_IEN_FERR_DEFAULT (_UART_IEN_FERR_DEFAULT << 9)
887
#define UART_IEN_MPAF (0x1UL << 10)
888
#define _UART_IEN_MPAF_SHIFT 10
889
#define _UART_IEN_MPAF_MASK 0x400UL
890
#define _UART_IEN_MPAF_DEFAULT 0x00000000UL
891
#define UART_IEN_MPAF_DEFAULT (_UART_IEN_MPAF_DEFAULT << 10)
892
#define UART_IEN_SSM (0x1UL << 11)
893
#define _UART_IEN_SSM_SHIFT 11
894
#define _UART_IEN_SSM_MASK 0x800UL
895
#define _UART_IEN_SSM_DEFAULT 0x00000000UL
896
#define UART_IEN_SSM_DEFAULT (_UART_IEN_SSM_DEFAULT << 11)
897
#define UART_IEN_CCF (0x1UL << 12)
898
#define _UART_IEN_CCF_SHIFT 12
899
#define _UART_IEN_CCF_MASK 0x1000UL
900
#define _UART_IEN_CCF_DEFAULT 0x00000000UL
901
#define UART_IEN_CCF_DEFAULT (_UART_IEN_CCF_DEFAULT << 12)
903
/* Bit fields for UART IRCTRL */
904
#define _UART_IRCTRL_RESETVALUE 0x00000000UL
905
#define _UART_IRCTRL_MASK 0x000000FFUL
906
#define UART_IRCTRL_IREN (0x1UL << 0)
907
#define _UART_IRCTRL_IREN_SHIFT 0
908
#define _UART_IRCTRL_IREN_MASK 0x1UL
909
#define _UART_IRCTRL_IREN_DEFAULT 0x00000000UL
910
#define UART_IRCTRL_IREN_DEFAULT (_UART_IRCTRL_IREN_DEFAULT << 0)
911
#define _UART_IRCTRL_IRPW_SHIFT 1
912
#define _UART_IRCTRL_IRPW_MASK 0x6UL
913
#define _UART_IRCTRL_IRPW_DEFAULT 0x00000000UL
914
#define _UART_IRCTRL_IRPW_ONE 0x00000000UL
915
#define _UART_IRCTRL_IRPW_TWO 0x00000001UL
916
#define _UART_IRCTRL_IRPW_THREE 0x00000002UL
917
#define _UART_IRCTRL_IRPW_FOUR 0x00000003UL
918
#define UART_IRCTRL_IRPW_DEFAULT (_UART_IRCTRL_IRPW_DEFAULT << 1)
919
#define UART_IRCTRL_IRPW_ONE (_UART_IRCTRL_IRPW_ONE << 1)
920
#define UART_IRCTRL_IRPW_TWO (_UART_IRCTRL_IRPW_TWO << 1)
921
#define UART_IRCTRL_IRPW_THREE (_UART_IRCTRL_IRPW_THREE << 1)
922
#define UART_IRCTRL_IRPW_FOUR (_UART_IRCTRL_IRPW_FOUR << 1)
923
#define UART_IRCTRL_IRFILT (0x1UL << 3)
924
#define _UART_IRCTRL_IRFILT_SHIFT 3
925
#define _UART_IRCTRL_IRFILT_MASK 0x8UL
926
#define _UART_IRCTRL_IRFILT_DEFAULT 0x00000000UL
927
#define UART_IRCTRL_IRFILT_DEFAULT (_UART_IRCTRL_IRFILT_DEFAULT << 3)
928
#define _UART_IRCTRL_IRPRSSEL_SHIFT 4
929
#define _UART_IRCTRL_IRPRSSEL_MASK 0x70UL
930
#define _UART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL
931
#define _UART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL
932
#define _UART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL
933
#define _UART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL
934
#define _UART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL
935
#define _UART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL
936
#define _UART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL
937
#define _UART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL
938
#define _UART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL
939
#define UART_IRCTRL_IRPRSSEL_DEFAULT (_UART_IRCTRL_IRPRSSEL_DEFAULT << 4)
940
#define UART_IRCTRL_IRPRSSEL_PRSCH0 (_UART_IRCTRL_IRPRSSEL_PRSCH0 << 4)
941
#define UART_IRCTRL_IRPRSSEL_PRSCH1 (_UART_IRCTRL_IRPRSSEL_PRSCH1 << 4)
942
#define UART_IRCTRL_IRPRSSEL_PRSCH2 (_UART_IRCTRL_IRPRSSEL_PRSCH2 << 4)
943
#define UART_IRCTRL_IRPRSSEL_PRSCH3 (_UART_IRCTRL_IRPRSSEL_PRSCH3 << 4)
944
#define UART_IRCTRL_IRPRSSEL_PRSCH4 (_UART_IRCTRL_IRPRSSEL_PRSCH4 << 4)
945
#define UART_IRCTRL_IRPRSSEL_PRSCH5 (_UART_IRCTRL_IRPRSSEL_PRSCH5 << 4)
946
#define UART_IRCTRL_IRPRSSEL_PRSCH6 (_UART_IRCTRL_IRPRSSEL_PRSCH6 << 4)
947
#define UART_IRCTRL_IRPRSSEL_PRSCH7 (_UART_IRCTRL_IRPRSSEL_PRSCH7 << 4)
948
#define UART_IRCTRL_IRPRSEN (0x1UL << 7)
949
#define _UART_IRCTRL_IRPRSEN_SHIFT 7
950
#define _UART_IRCTRL_IRPRSEN_MASK 0x80UL
951
#define _UART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL
952
#define UART_IRCTRL_IRPRSEN_DEFAULT (_UART_IRCTRL_IRPRSEN_DEFAULT << 7)
954
/* Bit fields for UART ROUTE */
955
#define _UART_ROUTE_RESETVALUE 0x00000000UL
956
#define _UART_ROUTE_MASK 0x0000030FUL
957
#define UART_ROUTE_RXPEN (0x1UL << 0)
958
#define _UART_ROUTE_RXPEN_SHIFT 0
959
#define _UART_ROUTE_RXPEN_MASK 0x1UL
960
#define _UART_ROUTE_RXPEN_DEFAULT 0x00000000UL
961
#define UART_ROUTE_RXPEN_DEFAULT (_UART_ROUTE_RXPEN_DEFAULT << 0)
962
#define UART_ROUTE_TXPEN (0x1UL << 1)
963
#define _UART_ROUTE_TXPEN_SHIFT 1
964
#define _UART_ROUTE_TXPEN_MASK 0x2UL
965
#define _UART_ROUTE_TXPEN_DEFAULT 0x00000000UL
966
#define UART_ROUTE_TXPEN_DEFAULT (_UART_ROUTE_TXPEN_DEFAULT << 1)
967
#define UART_ROUTE_CSPEN (0x1UL << 2)
968
#define _UART_ROUTE_CSPEN_SHIFT 2
969
#define _UART_ROUTE_CSPEN_MASK 0x4UL
970
#define _UART_ROUTE_CSPEN_DEFAULT 0x00000000UL
971
#define UART_ROUTE_CSPEN_DEFAULT (_UART_ROUTE_CSPEN_DEFAULT << 2)
972
#define UART_ROUTE_CLKPEN (0x1UL << 3)
973
#define _UART_ROUTE_CLKPEN_SHIFT 3
974
#define _UART_ROUTE_CLKPEN_MASK 0x8UL
975
#define _UART_ROUTE_CLKPEN_DEFAULT 0x00000000UL
976
#define UART_ROUTE_CLKPEN_DEFAULT (_UART_ROUTE_CLKPEN_DEFAULT << 3)
977
#define _UART_ROUTE_LOCATION_SHIFT 8
978
#define _UART_ROUTE_LOCATION_MASK 0x300UL
979
#define _UART_ROUTE_LOCATION_LOC0 0x00000000UL
980
#define _UART_ROUTE_LOCATION_DEFAULT 0x00000000UL
981
#define _UART_ROUTE_LOCATION_LOC1 0x00000001UL
982
#define _UART_ROUTE_LOCATION_LOC2 0x00000002UL
983
#define _UART_ROUTE_LOCATION_LOC3 0x00000003UL
984
#define UART_ROUTE_LOCATION_LOC0 (_UART_ROUTE_LOCATION_LOC0 << 8)
985
#define UART_ROUTE_LOCATION_DEFAULT (_UART_ROUTE_LOCATION_DEFAULT << 8)
986
#define UART_ROUTE_LOCATION_LOC1 (_UART_ROUTE_LOCATION_LOC1 << 8)
987
#define UART_ROUTE_LOCATION_LOC2 (_UART_ROUTE_LOCATION_LOC2 << 8)
988
#define UART_ROUTE_LOCATION_LOC3 (_UART_ROUTE_LOCATION_LOC3 << 8)
platform
Device
SiliconLabs
EFM32G
Include
efm32g_uart.h
Generated on Thu Mar 9 2017 20:44:29 for EFM32 Gecko Software Documentation by
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