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CMSIS-CORE
Version 4.30
CMSIS-CORE support for Cortex-M processor-based devices
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CMSIS-CORE
Version 4.30
CMSIS-CORE support for Cortex-M processor-based devices
|
| Version | Description |
|---|---|
| V4.30 | Corrected: DoxyGen function parameter comments. Corrected: IAR toolchain: removed for NVIC_SystemReset the attribute(noreturn). Corrected: GCC toolchain: supressed irrelevant compiler warnings. Added: Support files for ARM Compiler v6 (cmsis_armcc_v6.h). |
| V4.20 | Corrected: MISRA-C:2004 violations. Corrected: predefined macro for TI CCS Compiler. Corrected: function __SHADD16 in arm_math.h. Updated: cache functions for Cortex-M7. Added: macros _VAL2FLD, _FLD2VAL to core_*.h. Updated: functions __QASX, __QSAX, __SHASX, __SHSAX. Corrected: potential bug in function __SHADD16. |
| V4.10 | Corrected: MISRA-C:2004 violations. Corrected: intrinsic functions __DSB, __DMB, __ISB. Corrected: register definitions for ITCMCR register. Corrected: register definitions for CONTROL_Type register. Added: functions SCB_GetFPUType, SCB_InvalidateDCache_by_Addr to core_cm7.h. Added: register definitions for APSR_Type, IPSR_Type, xPSR_Type register. Added: __set_BASEPRI_MAX function to core_cmFunc.h. Added: intrinsic functions __RBIT, __CLZ for Cortex-M0/CortexM0+. |
| V4.00 | Added: Cortex-M7 support. Added: intrinsic functions for __RRX, __LDRBT, __LDRHT, __LDRT, __STRBT, __STRHT, and __STRT |
| V3.40 | Corrected: C++ include guard settings. |
| V3.30 | Added: COSMIC tool chain support. Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4. Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4. Corrected: GCC/CLang warnings. |
| V3.20 | Added: __BKPT instruction intrinsic. Added: __SMMLA instruction intrinsic for Cortex-M4. Corrected: ITM_SendChar. Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler. Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000. Corrected: rework of in-line assembly functions to remove potential compiler warnings. |
| V3.01 | Added support for Cortex-M0+ processor. |
| V3.00 | Added support for GNU GCC ARM Embedded Compiler. Added function __ROR. Added Register Mapping for TPIU, DWT. Added support for SC000 and SC300 processors. Corrected ITM_SendChar function. Corrected the functions __STREXB, __STREXH, __STREXW for the GNU GCC compiler section. Documentation restructured. |
| V2.10 | Updated documentation. Updated CMSIS core include files. Changed CMSIS/Device folder structure. Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library. Reworked CMSIS DSP library examples. |
| V2.00 | Added support for Cortex-M4 processor. |
| V1.30 | Reworked Startup Concept. Added additional Debug Functionality. Changed folder structure. Added doxygen comments. Added definitions for bit. |
| V1.01 | Added support for Cortex-M0 processor. |
| V1.01 | Added intrinsic functions for __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, and __CLREX |
| V1.00 | Initial Release for Cortex-M3 processor. |
